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A 2–20 GHz SiGe HBT single-stage cascode LNA with linearity enhancement
Microelectronics Journal 86 (2019) 130–139
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A 2–20 GHz SiGe HBT single-stage cascode LNA with linearity enhancement Zhenrong Li, Shuang Liu *, Chaoyue Zhang, Yiqi Zhuang School of Microelectronics, Xidian University, Xian, 710071, China
A R T I C L E I N F O
A B S T R A C T
Keywords: Low noise amplifier Linearity Cascode Passive network SiGe HBT
A wideband high-gain low-noise amplifier (LNA) with improved linearity is presented in this paper. To suppress the gain compression of large signal under high gain conditions, the single-stage cascode topology using resistive shunt-shunt feedback and an emmiter degenerate resistor are adopted. Wideband input matching is thus realized in conjunction with the preceding L-type passive network. A passive network inserted between the cascode structure and load enhances the gain bandwidth as well as the impedance matching. The LNA is based on a 0.18μm SiGe HBT BiCMOS process and the post simulation results show that the LNA features 2–20 GHz bandwidth, 16.1–18.1 dB power gain and 2.5–3.7 dB noise figure (NF). It exhibits input 1-dB compression point of 12dBm above 14 GHz and consumes 55 mW power form a 3.3-V supply. The chip size is 0.435 mm2 without pads.
1. Introduction Recently, ultra-wideband communication system has attracted wide interest due to its high data rate, low complexity and harmonious coexistence with other wireless communication systems [1–5]. In such a system, LNA is usually designed as the first block and thus has a significant effect on the performance of the overall system. In order to effectively receive the signal power of the antenna over the entire bandwidth, the LNA must achieve good input matching, flat high gain, low noise, and high linearity over the frequency band of interest [6, 7]. For a system with third order nonlinearity, the desired signal can be disturbed by the mixing effect and third interception point is used to characterize the extent of disruption. However, for an ultra-wideband system, it has weak frequency selectivity, thus the preceding LNA amplifies the integral power in the whole band. The problem is that the excessive power may compress the gain of the LNA, so the concept of P1dB appears important in this situation [8]. For different applications, many LNA structures have been designed and verified. For example, The LNA based on a CMOS process in Ref. [9] adopts cascode structure with negative feedback resistant to achieve flat gain and noise in the wideband. But the gain is only about 10 dB, so it is certain to worsen the linearity if the gain is increased. The three-stage cascaded LNA in Ref. [10] achieves a gain of 17 dB, but the noise figure is as high as 6 dB in the high frequency band, and its linearity performance is poor due to the multi-stage resulting in more nonlinear effects. In order to obtain a high linearity index expressed by IIP3, many
CMOS-based LNAs use a derivative superposition (DS) technique [8,11, 12]. The basic principle is that transistors biased at different voltage present different coefficient of third order nonlinearity term. It is possible to bias two transistors at opposite third order nonlinearity term coefficient, acquiring zero third order nonlinearity when the two are connected in parallel. Similarly, using complement transistors in circuit can also partly cancel third order nonlinearity, improving the IIP3 [13]. DS technique greatly improves the IIP3 of a circuit, however, it is of little help to P1dB. As the frequency increases, nonlinearity terms higher than third order term manifest themselves, still compressing the gain. In addition, in a wider operating frequency band, the intermodulation of even and odd terms will also fall within the band. Which in turn deteriorates linearity. Compared to DS, feedback technique [14] is more promising in enhancing linearity characterized by compression point. This paper presents a single-stage ultra-wideband high-gain highlinearity LNA. In this paper, voltage parallel negative feedback is adopted, combined with an L-type passive matching network, to realize an excellent input matching. Output buffer is replaced by a relatively complex output passive network to achieve wideband output matching as well as high P1dB. Peaking inductor is introduced, cooperating with the output passive network, to compensate the gain at high frequency. Between the emitter of the input transistor and the ground is a resistor, which is designed to improve the nonlinearity of this active device and thus the P1dB of the LNA.
* Corresponding author. E-mail address: [email protected] (S. Liu). https://doi.org/10.1016/j.mejo.2019.03.001 Received 21 January 2019; Received in revised form 1 March 2019; Accepted 2 March 2019 Available online 5 March 2019 0026-2692/© 2019 Elsevier Ltd. All rights reserved.
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Microelectronics Journal 86 (2019) 130–139
2. Complex passive load network
maintain the gain at high frequency. Above analysis demonstrates the high frequency gain is promoted due to the assistance of complex number poles and a zero. However, the simple parallel compensation technique does not allow the load impedance to exhibit a more ridiculously rising trend over a wider frequency band, which means that it is not sufficient to offset the high frequency gain degradation caused by other nodes in the LNA circuit. The novel method is to adopt the circuit structure in Fig. 2. In this configuration, the high-order passive network is used to provide more poles and zeros, and can be used for output impedance matching. The aforementioned parasitic capacitance Cp is absorbed into C2. The impedance equations (4) and (5) of the complex network can be obtained by using the basic circuit analysis principle.
Ultra-wideband LNA should provide about the same gain both at low and high frequency. But various parasitic effects degenerates it especially at high frequency. Parallel compensation technique can be used to cancel parasitic capacitance at the output node, maintaining the gain as frequency increases [15–18]. Though parallel compensation technique combined with output buffer is able to provide a wideband gain as well as a perfect output matching, the nonlinearity of buffer will limit the available P1dB. Therefore, the buffer is removed in this paper. In addition, this paper uses more complex passive load networks to provide more poles and zeros, which enables flatter high gain over a wide frequency range, while optimizing output matching performance. To understand how complex passive load network improve performance, we should precisely understand the compensation principle and matching problem， consider the circuit depicted in Fig. 1. Symbol v represents the input small signal and G the transconductance of the amplifier. LL and RL are the load. Cp is the parasitic capacitance associated with the output node. The port with a resistance of Rp is directly connected to the output node. From Fig. 1, the impedance seen by the controlled source vG can be derived as Zx1 ¼
ðsLL þ RL ÞRP s2 LL Cp Rp þ s Cp Rp RL þ LL þ Rp þ RL
Zx2 ¼
(2)
Rp RL 0.5 (LL/Cp) holds in this paper, therefore, ζzx1 0.71. A damping factor lower than 1 means Zx1/(sLL þ RL) exists a response peak in the frequency domain. For simplicity, though ζzx1 is close to 1, the peak response frequency is still expressed as 1 2π
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Rp þ RL 1 1 pffiffiffi ⋅ pffiffiffiffiffiffiffiffiffiffi LL Cp Rp LL Cp 2π
Vo ¼ Vx2
(3)
RP s3 R1 RP C1 C2 L1 þ s2 L1 ðR1 C1 þ RP C2 Þ þ sðR1 RP C1 þ R1 RP C2 þ L1 Þ þ R1 þ RP (6)
The result is as frequency increases in the band (0, fp), Zx1/(sLL þ RL) rises due to the effect of complex number poles. Another important observation from equation (1) is that the serial combination of LL and RL introduces a zero of –RL/LL which can set to cancel an inherent pole and
// 5/
(5)
Numerical analysis of the equation and simulation under the condition of LL ¼ 520 pH，RL ¼ 60Ω，Rp ¼ 50Ω，C1 ¼ 150 fF，L1 ¼ 650 pH, C2 ¼ 30 fF gives the orange curve marked in Fig. 3, and the red curve is the load impedance when the network is not added. Obviously, under the action of R1、C1、C2 and L1, the increase number of the zeros and poles makes the impedance value show a more obvious upward trend in the range of 15–30 GHz. According to Fig. 2, the small signal current vG flows through Zx2 resulting voltage Vx2 and then Vx2 goes through the passive π-matching network, producing Vo. The gain curves in Fig. 3 can be expressed as Vo/Vx2 in equation (6).
From the point of second order system, the damping factor of equation (1) is
fp ¼
(4)
A ¼ R1 RP C1 C2 L1 LL ; B ¼ L1 ðR1 RP RL C1 C2 þ R1 C1 LL þ RP C2 LL Þ; C ¼ L1 LL þ R1 RP C1 LL þ R1 RP C2 LL þ R1 RL C1 L1 þ RP RL C2 L1 ; D ¼ sRp ðLL þ C2 L1 LL þ R1 RL C2 þ R1 RL C1 Þ; X ¼ RL Rp þ R1 ; E ¼ Rp C1C2 L1 LL ; F ¼ C1 L1 LL þ R1 C2 RP þ RL Rp C2 ; G ¼ Rp C2 L1 þ R1 C1 L1 þ Rp C2 LL þ Rp C1 LL þ RL C1 L1 ; H ¼ R1 þ Rp þ RL ;
(1)
Cp Rp RL þ LL ζ zx1 ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffi 2 LL Cp Rp RL þ Rp
As4 þ Bs3 þ Cs2 þ Ds þ X Es4 þ Fs3 þ Gs2 þ Hs þ Y
For the frequency band we care about, the s3 term is much smaller than the s1 term, so equation (6) can be simplified to
LL
Parallel compensation technique
RL Complex passive network
Vo
Vx2
Y*
&S
5S
vG
Fig. 1. Parallel compensation technique.
R1 Zx2
C1
L1
C2
Fig. 2. Load structure with passive network. 131
Rp
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Microelectronics Journal 86 (2019) 130–139
Fig. 3. Impact of the network on impedance and gain. Fig. 5. Reflection coefficient result.
Vo RP ¼ Vx2 ω2 L1 ðR1 C1 þ RP C2 Þ þ jωðR1 RP C1 þ R1 RP C2 þ L1 Þ þ R1 þ RP
(7)
at the output below 15 GHz is significantly better, but in the frequency above 20 GHz, the function of R1 is gradually weakened. L1 and C1 provide a zero to the reflection coefficient at about 25 GHz at the output, which enables the LNA to achieve a good matching in a wider frequency range. The usual output matching is by inserting an emitter follower between the LNA output node and the load, but it will limit the P1dB. And to suppress the nonlinearity caused by the emitter follower, it's necessary to set a large operating current, resulting in an increase in power consumption. Therefore, for LNAs with higher linearity requirements, a passive output matching network with weaker nonlinearity is used, and power consumption is greatly reduced without a DC path.
At low frequency, Vo/Vx2RP/(R1þRP). Based on reasonable component values, the secondary term for ω below 30 GHz plays a leading role. Consequently, as the frequency increase, Vo gradually approaches Vx2, This voltage division effect makes the voltage gain rise as the frequency increases compared to the circuit that does not join the passive network, as represented by the blue and black curves in Fig. 3. Although the gain at low frequency is reduced, the bandwidth expansion effect is remarkable under the condition of providing a sufficiently high gain. It's worth mentioning that the output impedance of Fig. 1 varies severely with frequency, resulting in inferior output matching, and the addition of passive network allows output matching to reach a good level throughout the bandwidth. The impedance matching results obtained is shown in the Smith chart in Fig. 4. The function of R1 is to increase the real resistance in the low frequency band. It can also be seen from Fig. 5 that the reflection coefficient
3. Proposed LNA circuit Based on the consideration of ultra-wideband matching, high frequency gain compensation, and negative feedback on linearity, the circuit schematic of the LNA as shown in Fig. 6 is designed. The overall circuit uses a cascode structure with negative feedback, and a π-matching network is inserted to provide a wideband output matching in conjunction with a wideband gain. The feedback resistor Re between the emitter of Q1 and ground is used to improve the nonlinearity of transistor Q1. 3.1. Input impedance matching A favorable input matching throughout the interested band is necessary for a LNA, which not only facilitates the sensed signal to reach the LNA core with negligible reflection, but keeps right filtering characteristics when a band selection filter is inserted between the antenna and LNA. Various circuit structures have been explored to match LNA input to specific impedance [19–21]. Fig. 7(a) depicts such a structure employing resistive shunt-shunt feedback technique. Between the base of Q1 and collector of Q2 is the feedback resistor Rf, providing a input real part (Cf is large enough to ignore). In Fig. 7(a), feedback resistor Re is inserted between the emitter of Q1 and ground. For simplicity, the serial combination of Q1 and Re can be equivalent to that Fig. 7(b) shows. Zπ is the shunt impedance of rπ and Cπ of Q1. With the addition of Re, the effective impedance is increased by Re and the transconductance Gm is decreased by a factor of (1þgmRe). Using the equivalent circuit of Q1 and Re and ignoring the influence of Q2, the small-signal circuit of Fig. 7(a) can be shown as Fig. 7(c). Now, the input impedance of Zin can be derived as
Fig. 4. Output impedance shown in the Smith chart. 132
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Microelectronics Journal 86 (2019) 130–139
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Zin ¼
ZL þ Z þR
Rf
1 þ ZLπ þRef þ Gm ZL
Zin ¼
(8)
ðRf þZL Þ ðgm2 Z2 þ 1Þ ðRe þZ1 þgm1 Re Z1 Þ Re þRf þZ1 þZL þgm1 Re Z1 þgm2 Z2 Re þ Rf þ Z1 þ ZL þgm1 gm2 Z1 Z2 ðRe þ ZL Þ
where ZL represents the shunt combination of load resistor RL、inductance LL and Zm. At low frequency, the influence of some capacitors is ignorable. Thus, equation (8) is simplified as Zin ¼
RL þ Rf 1 þ Gm RL
(11) With the assumption of an infinite Zπ2 and considering Rf » Re holds in the design process, Equation (11) is further simplified to
(9)
Zin ¼
The above equation shows that reasonable selection of parameters in Fig. 7(a) makes the input resistance 50Ω, therefore reaching a good matching. However, as the frequency increases, image part of the input impedance becomes comparable with that of the real part, deteriorating matching result obtained at high frequency. For parameters Cπ ¼ 450 fF, rπ ¼ 380Ω, Re ¼ 1Ω, gm ¼ 530 mS, CL ¼ 80 fF, RL ¼ 60Ω, Rf ¼ 580Ω and Rs ¼ 50Ω, the calculated result of S11 versus frequency is shown in Fig. 2. Clearly, resistive shunt-shunt feedback technique realizes a S11 lower than 20 dB at relative low frequency, implying a perfect matching. However, it becomes worse as frequency increases. S11 is larger than 10dB when frequency exceeds 15 GHz. It is noticeable that above calculation is finished without the consideration of Q2. When taking Q2 into account, the result will be worse. Obviously, it is difficult to achieve matching over the 2–20 GHz band only using shunt-shunt feedback technique. To broaden the available band, a preceding L-type passive network is designed, transforming original input impedance Zin to Ztot, i.e. 50Ohm at higher frequency. Fig. 8 shows the passive matching network. It is easy to find Ztot ¼
sL1 þ Zin s2 L1 C1 þ sC1 Zin þ 1
ðRf þZL Þ ðRe þ αZπ 1 Þ Rf þ αZπ 1 þZL ð1 þ gm1 Zπ 1 Þ
(12)
where α ¼ 1þgmRe, whose value is controlled between 1 and 2. Then the impedance after adding the preceding L-matching network is
Ztot
ðRe þaZp1 ÞðRf þZL Þ sL2 þ R þaZ þZ 1þg Z Lð f p1 m1 p1 Þ ¼ ðRe þaZp1 ÞðRf þZL Þ s2 L2 C2 þ sC2 R þaZ þZ 1þg Z þ 1 Lð p1 m1 p1 Þ f
(13)
It can be seen that the addition of L2 and C2 extends the bandwidth of both structures. But due to different loads in that two LNA structures, the matching expansion effect still exists. However, due to the influence of the negative feedback path, complex passive load networks make input matching better at high frequency. Besides, the positon of the ac coupling capacitor also affects the effect of input impedance matching to a large extent at high frequency. The effect of the passive load network and the position of Cf on S11 is shown in Fig. 11. As can be seen from the figure, the R1、C1 and L1 makes the reflection coefficient at the input have a higher frequency zero point, and the bandwidth satisfying 10dB is expanded by about 4 GHz. While the overall matching bandwidth didn't expanded if Cf is placed close to the output, but the impedance is closer to 50Ω in the 15–27 GHz, thus achieving a better match.
(10)
For parameters L1 ¼ 300 pH, C1 ¼ 200 fF, the calculated S11 after adding L1 and C1 is also displayed in Fig. 9. Compared with the former, the preceding passive network introduces a minimum in S11 at about 20 GHz, widening the matching bandwidth. After analyzing the simple model, calculate the input impedance of the low noise amplifier based on the accurate small signal equivalent model and considering the influence of Q.
3.2. Linearity improvement A circuit block consists of basic components. Therefore, nonlinear components like transistors limit the available P1dB or IIP3 [22,23]. To improve the linearity of a module, for example LNA, well-designed structure should be used. In this paper, bipolar transistors are used whose relation between collector current and base-emitter voltage is 133
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Microelectronics Journal 86 (2019) 130–139
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Fig. 7. (a) Resistive shunt-shunt feedback amplifier. (b) Small-signal equivalent circuit of Q1 and Re. (c)Equivalent circuit of Fig. 7(a).
Vbe0 þ v Ic ¼ IS exp VT
where α1 is the linear gain and α2, α3 are the second-order and third-order nonlinearity coefficients, respectively and αn is expressed as
(14)
where Vbe0 and v are bias voltage and input small signal voltage, respectively, Ic is the total current controlled by Vbe0 and v. Apparently, there exists serious nonlinearity between Ic and v. Since the input signal is assumed to be small, equation (11) can be expanded at the bias point, reaching ic ¼ α1 v þ α2 v2 þ α3 v3 þ
αn ¼
1 ∂n Ic ⋅ n! ð∂vÞn v¼0
(16)
In the method of derivative superposition, two transistors are biased at different voltage and have opposite third-order coefficient. The output presents almost zero third-order nonlinearity when the collector (or drain) current are added. However, as frequency goes higher, equation (16) does not approximate (15) any more. High order nonlinearity terms manifest themselves and compress the small signal gain. Hence, methods
(15)
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5V
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Fig. 11. The influence of the position of Cf on S11.
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Fig. 12. Block diagram of (a) open loop and (b) closed loop amplifier.
only to decrease the α3 such as derivative superposition technique do little to boost the P1dB. Now, consider the negative feedback technique [24]. Shown in Fig. 12 are basic open loop and closed loop block diagram. Block A and F represent a nonlinearity amplifier and an ideal feedback network, respectively. In Fig. 12(a), an ideal sin wave is amplified by A and appears with apparent distortion at the output. If the input sin wave and output are expressed as Xi1’ and Xo, respectively, the mathematic relationship between input and output can be written as Xo ¼
AX 'i1
þ
X 'o
X ''o ¼ X 'o AFX ''o
(18)
That is X ''o ¼
X 'o 1 þ AF
(19)
From which it is observed that the THD is decreased by a factor of (1 þ AF). To understand the dependence of nonlinearity on feedback more directly, circuit in Fig. 7 is simulated based on parameters of Cf ¼ 2 pF, CL ¼ 0, Rf ¼ 580Ω, RL ¼ 60Ω，Q1:4 6μ 0.15μ, Q2:2 7μ 0.15μ, Vb,Q1 ¼ 0.9 V, Vb,Q2 ¼ 2 V, Pin ¼ 15dBm, f ¼ 10 GHz. Re increases form 0Ω–5Ω and Fig. 13 plots the simulated result. Since the gain decreases as feedback increase, the obtained THD is normalized to the gain to take gain reduction into account. Obviously, in Fig. 13 the THD becomes lower due to a larger Re.
(17)
where Xo’ is the total harmonic distortion. Now, close the open loop as Fig. 12(b) depicts. To make the distortion comparable before and after closing the loop, Xi is increased to keep the fundamental of Xi2’ in Fig. 12(b) equal to that of Xi1’. Then, the output distortion Xo’’ in Fig. 12(b) can be divided into two. One is Xo’ which is produced by the fundamental of Xi2’ and the nonlinearity of A, and the other is the amplified Xo’’ by a factor of –AF. Above analysis indicates 135
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emitter junction of Q2 contributes all the noise to the point m. According to the definition of NF and with the condition of gm1RfReal(Zπ1)»Re, the result is expressed as Rf ðRe þ Zπ 1 þ Zin Þ þ Zπ1 Zin 2 2qIc1 ⋅ NF ¼ 1 þ ð1 þ sC1 Rs Þð 4kTRs þ gm1 Rf Zπ1 gm1 Zπ1 Rf þ Zin þ Zin 2 Re 2qIb1 ⋅ þ jRe þ Zin j2 ⋅ þ R 4kTRs gm1 Rf Zπ1 s 2 Re þ Zπ1 þ Zin þ gm1 Zπ1 ðRe þ Zin Þ Rf rL1 ⋅ þ þ R gm1 Rf Zπ1 Rs s 2 2qIb2 1 ⋅ RL þ 4kTRs gm1 Rf Zπ1 ðRL þ sLL Þ Rs
(22)
The following conclusions are reached base on (22) 1) 2) 3) 4)
Fig. 13. Dependence of THD on resistor Re.
The NF decreases with the increase of Rf; A lower Re causes a lower NF; The NF is optimized with the increase of gm (or power consumption); A higher Q of L1 results in a lower NF.
4. Simulation results 3.3. Power gain and noise figure
The layout of this ultra-wideband LNA is finished based on TowerJazz 0.18 μm SiGe technology. This process provides one layer of poly and six layers of metal for interconnection. Bipolar transistors in the library have an fT as high as 200 GHz, which is beneficial for circuits applied to high frequency. The inductors are constructed using the topmost layer for a wake coupling to substrate and a high Q. this process provides MIM capacitors constructed between M4 and M5, having a capacitance density of 2 fF/μm2. Well resistors, poly resistors and metal resistors are also supplied for different applications. Exhibited in Fig. 15 is the finished layout of the designed LNA. Si is the input pad of the RF signal, and So the output pad. Lying at the top left of Fig. 15 is the biasing circuit including a bandgap reference circuit to provide bias voltage for Q1 and Q2. In the layout, the effect of C3 is replaced by the parasitic capacitance of ESD diodes and input pad, thus, C3 is not an explicit capacitor any more in Fig. 15. Similarly, C2 is replaced by the parasitic capacitance of ESD diodes and output pad. According to equation (22), a high Q inductor is employed in the preceding L-matching network to suppress the NF. After several iterative design stage, the final components parameters are listed in the following
To obtain the small signal gain, a well matching is assumed, thus, half of the source power reaches the input of the LNA in Fig. 10. Therefore, the small signal gain is approximate to s21 ¼ 2 ⋅
vb vm vo ⋅ ⋅ vs vb vm
(20)
The same assumption of an infinite Zπ2 is used, thus ZL Re gm1 Rf Zπ1 Zin ⋅ s C1 L1 Rs þ sðL1 þ C1 Rs Zin Þ þ Rs þ Zin Rf þ ZL ðRe þ αZπ1 Þ Rp ⋅ 2 s L2 C3 Rp þ sL2 þ Rp
s21 2 ⋅
2
(21) With the additional conditions of gm1RfReal(Zπ1)»Re, Rf»|ZL|,
αReal(Zπ1)»Re, the second fraction in (21) is reduced to ZLgm1/α. As
elaborated in section II, the addition of peaking inductor and the passive π-matching network increases the high frequency load impedance of ZL, compensating the gain reduction due to the poles introduced by the other two fractions in (21). Finally, a wideband flat gain is achieved. Negative feedback is favorable to the linearity, however, the physical feedback resistors cause extra noise, deteriorating the available NF. In the noise analysis, since L1 precedes the amplification stage, the noise of its parasitic resistance should be considered. In addition, the shot noise of Q1 and Q2, the thermal noise of Re, Rf and RL and the thermal noise of Rs are also taken into account. Ignore all other noise not mentioned. The small signal circuit for noise analysis is shown in Fig. 14. To simplify the calculation, Zπ2 is assumed infinity and all the noises are equivalent to output current of point m which is shorted to ground. The resulting noises are expressed as equation (22)–(30). It is noteworthy that equation (27) shows shot noise of collector junction of Q2 contributes no noise and (28) shows shot noise of base-
+ -
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Fig. 14. Small signal circuit for noise analysis.
Fig. 15. The finished layout of the designed LNA. 136
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Table 1 Parameters of core components. Element
Value
Element
Value
L1 L2 LL Cf C2
473 pH 648 pH 518 pH 2 pF 80 fF
Rf RL Q1 Q2
580Ω 60Ω 4 6 μm 0.15 μm 2 8 μm 0.15 μm
Fig. 17. Compression point simulation.
3.7 dB (at 20 GHz), respectively. And due to careful selection of components and rational layout, the post layout simulation is consistent with the schematic simulation result over the 2–20 GHz band. Fig. 17 is the linearity characterized by compression point. It shows the achieved input 1-dB compression point is 11.7dBm at 15 GHz. To better predict the performance after taping out, Monte Carlo simulation based on process and mismatch has been performed. The obtained S parameters and NF results are shown in Fig. 18. From the figures, S11 and S22 vary with process and mismatch, however good input and output matching still realized. The maximum variation of S21 is 2.5 dB over the 100 simulation and almost all the curves are above 15 dB over the 2–20 GHz bandwidth. The NF is less sensitive than the s parameters and has a maximum variation of about 0.4 dB. In Table 2, performance of the designed LNA is compared with similar broadband LNAs, where indicates the designed LNA has good performance in comparison to other works.
(a)
5. Conclusion This paper first gives the theoretical analysis of techniques of wideband matching, gain enhancement and linearity improvement and then designs a wideband LNA. It uses an L-matching network and π-matching network to achieve good input and output matching, respectively. Parallel compensation technique is used to maintain the gain at high frequency and feedback technique is adopted to enhance the large signal linearity. Post layout simulation has been performed and the results show that this LNA achieves good performance over the 2–20 GHz band. Meanwhile, Monte Carlo analysis demonstrates the robustness of the LNA.
(b) Fig. 16. The post and pre-simulation results of (a) S11 and S22 (b) S21 and NF.
table (see Table 1). Fig. 16(a) displays the post and pre-simulation results of input and output matching of the wideband LNA. The post simulated S11 is below 10.8 dB over the 2–20 GHz band. At low frequency, the post simulation is consistent with the pre-simulation. At high frequency, the post layout S11 degrades due to the parasitic parameters. To achieve a favorable output matching, a passive π-matching network is inserted in this circuit. From the simulation results, this structure has a good effect on the output matching. The obtained post-layout S22 is better than 12dB over the 2–20 GHz bandwidth and is close to the pre-simulation result. Fig. 16(b) depicts the gain and NF response versus frequency. The results show that the post-layout S21 is above 16.1 dB over the interested band and is consistent with the schematic simulation. The minimum and maximum of the post layout NF for the LNA are 2.5 dB (at 2.4 GHz) and
2 Rf ðRe þ Zπ 1 þ Zin Þ þ Zπ1 Zin ⋅ 2qIc1 i2o;c1 ¼ Rf ðRe þ Zπ1 þ Zin Þ þ Zin ðRe þ Zπ1 Þ þ gm1 Re Zπ 1 Zin þ Rf (23)
i2o;b1
2 gm1 Rf Zπ1 ðRe þ Zin Þ ⋅ 2qIb1 ¼ Rf ðRe þ Zπ 1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ1 Zin þ Rf (24)
2 gm1 Zπ1 Rf þ Zin þ Zin ⋅ 4kTRe i2o;Re ¼ Rf ðRe þ Zπ1 þ Zin Þ þ Zin ðRe þ Zπ1 Þ þ gm1 Re Zπ1 Zin þ Rf (25)
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Fig. 18. Monte Carlo simulation results of (a) S11, (b) S22, (c) S21 and (d) NF.
Table 2 Comparisons of the designed LNA with some recent published linear LNAs.
Tech (nm) BW (GHz) S11 (dB) Gain (dB) NF (dB) IP1dB (dBm) IIP3 Area (mm2)
[9]
[10]
[15]
[16]
This work
90 1.6–28 <10 9.6 1.1 3.66 0.74 9
SiGe 0.05–23.5 <6 17 1 6 19
180 3.1–10.6 <-8.6 12.26 0.63 <4.74 22
180 1.6–9.7 <10 9.6–12.6 3.9–5.8 –
SiGe 180 2–20 <10 16.1–18.1 <3.7 11.7
– 0.139
8.3 0.25
11 0.536
10.1–12.6 –
– 0.435
i2o;c2 ¼ 0
(28)
i2o;b2 ¼ 2qIb2
(29)
2 1 ⋅ 4kTRL i2o;RL ¼ RL þ sLL
(30)
2 1 i2o;Rs ¼ 1 þ sC1 Rs 2 Re gm1 Rf Zπ1 ⋅ 4kTRs ⋅ Rf ðRe þ Zπ1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ 1 Zin þ Rf (31)
i2o;Rf
2 Re þ Zπ 1 þ Zin þ gm1 Zπ1 ðRe þ Zin Þ ⋅ 4kTRf ¼ Rf ðRe þ Zπ 1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ 1 Zin þ Rf
In equations (22)–(30), Zin ¼ Rs||(1/sC1)þsL1. Zπ1、Ic1 and Ib2 represents the emitter junction impedance、collector quiescent current and base quiescent current of the transistor Q1.
(26)
i2o;rL1
Acknowledgement
2 Re gm1 Rf Zπ1 ⋅ 4kTrL1 ¼ Rf ðRe þ Zπ 1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ 1 Zin þ Rf
This work was supported in part by the National Natural Science Foundation of China under Grant 61574111.
(27)
138
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Microelectronics Journal 86 (2019) 130–139
References
[13] Benqing Guo, Jun Chen, Lei Li, Haiyan Jin, Gunning Yang, A wideband noisecanceling CMOS LNA with enhanced linearity by using complementary nMOS and pMOS configurations, IEEE J. Solid State Circuits 52 (5) (May, 2017) 1331–1344. [14] Murat Davulcu, et al., X-band high dynamic range flat gain site BiCMOS low noise amplifier, in: Proceedings of the 10th European Microwave Integrated Circuits Conference, Sept., 2015, pp. 7–8. Paris, France. [15] Yo-Sheng Lin, Chang-Zhi Chen, Hong-Yu Yang, Chi-Chen Chen, Jen-How Lee, GuoWei Huang, Shey-Shi Lu, Analysis and design of a CMOS UWB LNA with dual-RLCbranch wideband input matching network, IEEE Trans. Microw. Theory Tech. 48 (2) (January, 2010) 287–296. [16] Benqing Guo, Xiaolei Li, A 1.6-9.7GHz CMOS LNA linearized by post distortion technique, IEEE Microwave Theory Tech. Soci. 23 (11) (Nov, 2013) 608–610. [17] Hui-I. Wu, Robert Hu, Christina, Complementary UWB LNA design using asymmetrical inductive source degeneration, IEEE Microw. Wirel. Compon. Lett. 20 (7) (June 2010) 402–404. [18] Heng Zhang, Xiaohua Fan, Edgar Sanchez Sinencio, A low-power, linearized, ultrawideband LNA design technique, IEEE J. Solid State Circuits 44 (2) (January, 2009) 320–330. [19] Pei Qin, xue Quan, Compact wideband LNA with gain and input matching bandwidth extensions by transformer, IEEE Microw. Wirel. Compon. Lett. 27 (7) (July, 2017) 657–659. [20] Yo-Sheng Lin, Chien-Chin Wang, Guan-Lin Lee, Chih-Chung Chen, Highperformance wideband low-noise amplifier using enhanced π-match input network, IEEE Microw. Wirel. Compon. Lett. 24 (3) (January, 2014) 200–202. [21] Y.-S. Lin, C.-C. Wang, G.-L. Lee, C.-C. Chen, High-performance wideband low noise amplifier using enhanced-match input network, IEEE Microw. Wirel. Compon. Lett. 24 (2014) 200–202. [22] B. Mazhab Jafari, M. Yavari, A UWB CMOS low-noise amplifier with noise reduction and linearity improvement techniques, Microelectron. J. 46 (2014) 198–206. [23] X. Fan, H. Zhang, E. Sa 0 nchez-Sinencio, A noise reduction and linearity improvement technique for a differential cascode LNA, IEEE J. Solid State Circuit. 43 (3) (2008) 588–599. [24] Heng Zhang, Edgar Sanchez Sinencio, Linearization techniques for CMOS low noise amplifiers: a tutorial, IEEE Circuit. Syst. Soc. 58 (1) (August, 2010) 22–36.
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139
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Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo
A 2–20 GHz SiGe HBT single-stage cascode LNA with linearity enhancement Zhenrong Li, Shuang Liu *, Chaoyue Zhang, Yiqi Zhuang School of Microelectronics, Xidian University, Xian, 710071, China
A R T I C L E I N F O
A B S T R A C T
Keywords: Low noise amplifier Linearity Cascode Passive network SiGe HBT
A wideband high-gain low-noise amplifier (LNA) with improved linearity is presented in this paper. To suppress the gain compression of large signal under high gain conditions, the single-stage cascode topology using resistive shunt-shunt feedback and an emmiter degenerate resistor are adopted. Wideband input matching is thus realized in conjunction with the preceding L-type passive network. A passive network inserted between the cascode structure and load enhances the gain bandwidth as well as the impedance matching. The LNA is based on a 0.18μm SiGe HBT BiCMOS process and the post simulation results show that the LNA features 2–20 GHz bandwidth, 16.1–18.1 dB power gain and 2.5–3.7 dB noise figure (NF). It exhibits input 1-dB compression point of 12dBm above 14 GHz and consumes 55 mW power form a 3.3-V supply. The chip size is 0.435 mm2 without pads.
1. Introduction Recently, ultra-wideband communication system has attracted wide interest due to its high data rate, low complexity and harmonious coexistence with other wireless communication systems [1–5]. In such a system, LNA is usually designed as the first block and thus has a significant effect on the performance of the overall system. In order to effectively receive the signal power of the antenna over the entire bandwidth, the LNA must achieve good input matching, flat high gain, low noise, and high linearity over the frequency band of interest [6, 7]. For a system with third order nonlinearity, the desired signal can be disturbed by the mixing effect and third interception point is used to characterize the extent of disruption. However, for an ultra-wideband system, it has weak frequency selectivity, thus the preceding LNA amplifies the integral power in the whole band. The problem is that the excessive power may compress the gain of the LNA, so the concept of P1dB appears important in this situation [8]. For different applications, many LNA structures have been designed and verified. For example, The LNA based on a CMOS process in Ref. [9] adopts cascode structure with negative feedback resistant to achieve flat gain and noise in the wideband. But the gain is only about 10 dB, so it is certain to worsen the linearity if the gain is increased. The three-stage cascaded LNA in Ref. [10] achieves a gain of 17 dB, but the noise figure is as high as 6 dB in the high frequency band, and its linearity performance is poor due to the multi-stage resulting in more nonlinear effects. In order to obtain a high linearity index expressed by IIP3, many
CMOS-based LNAs use a derivative superposition (DS) technique [8,11, 12]. The basic principle is that transistors biased at different voltage present different coefficient of third order nonlinearity term. It is possible to bias two transistors at opposite third order nonlinearity term coefficient, acquiring zero third order nonlinearity when the two are connected in parallel. Similarly, using complement transistors in circuit can also partly cancel third order nonlinearity, improving the IIP3 [13]. DS technique greatly improves the IIP3 of a circuit, however, it is of little help to P1dB. As the frequency increases, nonlinearity terms higher than third order term manifest themselves, still compressing the gain. In addition, in a wider operating frequency band, the intermodulation of even and odd terms will also fall within the band. Which in turn deteriorates linearity. Compared to DS, feedback technique [14] is more promising in enhancing linearity characterized by compression point. This paper presents a single-stage ultra-wideband high-gain highlinearity LNA. In this paper, voltage parallel negative feedback is adopted, combined with an L-type passive matching network, to realize an excellent input matching. Output buffer is replaced by a relatively complex output passive network to achieve wideband output matching as well as high P1dB. Peaking inductor is introduced, cooperating with the output passive network, to compensate the gain at high frequency. Between the emitter of the input transistor and the ground is a resistor, which is designed to improve the nonlinearity of this active device and thus the P1dB of the LNA.
* Corresponding author. E-mail address: [email protected] (S. Liu). https://doi.org/10.1016/j.mejo.2019.03.001 Received 21 January 2019; Received in revised form 1 March 2019; Accepted 2 March 2019 Available online 5 March 2019 0026-2692/© 2019 Elsevier Ltd. All rights reserved.
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Microelectronics Journal 86 (2019) 130–139
2. Complex passive load network
maintain the gain at high frequency. Above analysis demonstrates the high frequency gain is promoted due to the assistance of complex number poles and a zero. However, the simple parallel compensation technique does not allow the load impedance to exhibit a more ridiculously rising trend over a wider frequency band, which means that it is not sufficient to offset the high frequency gain degradation caused by other nodes in the LNA circuit. The novel method is to adopt the circuit structure in Fig. 2. In this configuration, the high-order passive network is used to provide more poles and zeros, and can be used for output impedance matching. The aforementioned parasitic capacitance Cp is absorbed into C2. The impedance equations (4) and (5) of the complex network can be obtained by using the basic circuit analysis principle.
Ultra-wideband LNA should provide about the same gain both at low and high frequency. But various parasitic effects degenerates it especially at high frequency. Parallel compensation technique can be used to cancel parasitic capacitance at the output node, maintaining the gain as frequency increases [15–18]. Though parallel compensation technique combined with output buffer is able to provide a wideband gain as well as a perfect output matching, the nonlinearity of buffer will limit the available P1dB. Therefore, the buffer is removed in this paper. In addition, this paper uses more complex passive load networks to provide more poles and zeros, which enables flatter high gain over a wide frequency range, while optimizing output matching performance. To understand how complex passive load network improve performance, we should precisely understand the compensation principle and matching problem， consider the circuit depicted in Fig. 1. Symbol v represents the input small signal and G the transconductance of the amplifier. LL and RL are the load. Cp is the parasitic capacitance associated with the output node. The port with a resistance of Rp is directly connected to the output node. From Fig. 1, the impedance seen by the controlled source vG can be derived as Zx1 ¼
ðsLL þ RL ÞRP s2 LL Cp Rp þ s Cp Rp RL þ LL þ Rp þ RL
Zx2 ¼
(2)
Rp RL 0.5 (LL/Cp) holds in this paper, therefore, ζzx1 0.71. A damping factor lower than 1 means Zx1/(sLL þ RL) exists a response peak in the frequency domain. For simplicity, though ζzx1 is close to 1, the peak response frequency is still expressed as 1 2π
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Rp þ RL 1 1 pffiffiffi ⋅ pffiffiffiffiffiffiffiffiffiffi LL Cp Rp LL Cp 2π
Vo ¼ Vx2
(3)
RP s3 R1 RP C1 C2 L1 þ s2 L1 ðR1 C1 þ RP C2 Þ þ sðR1 RP C1 þ R1 RP C2 þ L1 Þ þ R1 þ RP (6)
The result is as frequency increases in the band (0, fp), Zx1/(sLL þ RL) rises due to the effect of complex number poles. Another important observation from equation (1) is that the serial combination of LL and RL introduces a zero of –RL/LL which can set to cancel an inherent pole and
// 5/
(5)
Numerical analysis of the equation and simulation under the condition of LL ¼ 520 pH，RL ¼ 60Ω，Rp ¼ 50Ω，C1 ¼ 150 fF，L1 ¼ 650 pH, C2 ¼ 30 fF gives the orange curve marked in Fig. 3, and the red curve is the load impedance when the network is not added. Obviously, under the action of R1、C1、C2 and L1, the increase number of the zeros and poles makes the impedance value show a more obvious upward trend in the range of 15–30 GHz. According to Fig. 2, the small signal current vG flows through Zx2 resulting voltage Vx2 and then Vx2 goes through the passive π-matching network, producing Vo. The gain curves in Fig. 3 can be expressed as Vo/Vx2 in equation (6).
From the point of second order system, the damping factor of equation (1) is
fp ¼
(4)
A ¼ R1 RP C1 C2 L1 LL ; B ¼ L1 ðR1 RP RL C1 C2 þ R1 C1 LL þ RP C2 LL Þ; C ¼ L1 LL þ R1 RP C1 LL þ R1 RP C2 LL þ R1 RL C1 L1 þ RP RL C2 L1 ; D ¼ sRp ðLL þ C2 L1 LL þ R1 RL C2 þ R1 RL C1 Þ; X ¼ RL Rp þ R1 ; E ¼ Rp C1C2 L1 LL ; F ¼ C1 L1 LL þ R1 C2 RP þ RL Rp C2 ; G ¼ Rp C2 L1 þ R1 C1 L1 þ Rp C2 LL þ Rp C1 LL þ RL C1 L1 ; H ¼ R1 þ Rp þ RL ;
(1)
Cp Rp RL þ LL ζ zx1 ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ffi 2 LL Cp Rp RL þ Rp
As4 þ Bs3 þ Cs2 þ Ds þ X Es4 þ Fs3 þ Gs2 þ Hs þ Y
For the frequency band we care about, the s3 term is much smaller than the s1 term, so equation (6) can be simplified to
LL
Parallel compensation technique
RL Complex passive network
Vo
Vx2
Y*
&S
5S
vG
Fig. 1. Parallel compensation technique.
R1 Zx2
C1
L1
C2
Fig. 2. Load structure with passive network. 131
Rp
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Microelectronics Journal 86 (2019) 130–139
Fig. 3. Impact of the network on impedance and gain. Fig. 5. Reflection coefficient result.
Vo RP ¼ Vx2 ω2 L1 ðR1 C1 þ RP C2 Þ þ jωðR1 RP C1 þ R1 RP C2 þ L1 Þ þ R1 þ RP
(7)
at the output below 15 GHz is significantly better, but in the frequency above 20 GHz, the function of R1 is gradually weakened. L1 and C1 provide a zero to the reflection coefficient at about 25 GHz at the output, which enables the LNA to achieve a good matching in a wider frequency range. The usual output matching is by inserting an emitter follower between the LNA output node and the load, but it will limit the P1dB. And to suppress the nonlinearity caused by the emitter follower, it's necessary to set a large operating current, resulting in an increase in power consumption. Therefore, for LNAs with higher linearity requirements, a passive output matching network with weaker nonlinearity is used, and power consumption is greatly reduced without a DC path.
At low frequency, Vo/Vx2RP/(R1þRP). Based on reasonable component values, the secondary term for ω below 30 GHz plays a leading role. Consequently, as the frequency increase, Vo gradually approaches Vx2, This voltage division effect makes the voltage gain rise as the frequency increases compared to the circuit that does not join the passive network, as represented by the blue and black curves in Fig. 3. Although the gain at low frequency is reduced, the bandwidth expansion effect is remarkable under the condition of providing a sufficiently high gain. It's worth mentioning that the output impedance of Fig. 1 varies severely with frequency, resulting in inferior output matching, and the addition of passive network allows output matching to reach a good level throughout the bandwidth. The impedance matching results obtained is shown in the Smith chart in Fig. 4. The function of R1 is to increase the real resistance in the low frequency band. It can also be seen from Fig. 5 that the reflection coefficient
3. Proposed LNA circuit Based on the consideration of ultra-wideband matching, high frequency gain compensation, and negative feedback on linearity, the circuit schematic of the LNA as shown in Fig. 6 is designed. The overall circuit uses a cascode structure with negative feedback, and a π-matching network is inserted to provide a wideband output matching in conjunction with a wideband gain. The feedback resistor Re between the emitter of Q1 and ground is used to improve the nonlinearity of transistor Q1. 3.1. Input impedance matching A favorable input matching throughout the interested band is necessary for a LNA, which not only facilitates the sensed signal to reach the LNA core with negligible reflection, but keeps right filtering characteristics when a band selection filter is inserted between the antenna and LNA. Various circuit structures have been explored to match LNA input to specific impedance [19–21]. Fig. 7(a) depicts such a structure employing resistive shunt-shunt feedback technique. Between the base of Q1 and collector of Q2 is the feedback resistor Rf, providing a input real part (Cf is large enough to ignore). In Fig. 7(a), feedback resistor Re is inserted between the emitter of Q1 and ground. For simplicity, the serial combination of Q1 and Re can be equivalent to that Fig. 7(b) shows. Zπ is the shunt impedance of rπ and Cπ of Q1. With the addition of Re, the effective impedance is increased by Re and the transconductance Gm is decreased by a factor of (1þgmRe). Using the equivalent circuit of Q1 and Re and ignoring the influence of Q2, the small-signal circuit of Fig. 7(a) can be shown as Fig. 7(c). Now, the input impedance of Zin can be derived as
Fig. 4. Output impedance shown in the Smith chart. 132
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Microelectronics Journal 86 (2019) 130–139
,
9''
%LDVFLUFXLW
4
5
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Zin ¼
ZL þ Z þR
Rf
1 þ ZLπ þRef þ Gm ZL
Zin ¼
(8)
ðRf þZL Þ ðgm2 Z2 þ 1Þ ðRe þZ1 þgm1 Re Z1 Þ Re þRf þZ1 þZL þgm1 Re Z1 þgm2 Z2 Re þ Rf þ Z1 þ ZL þgm1 gm2 Z1 Z2 ðRe þ ZL Þ
where ZL represents the shunt combination of load resistor RL、inductance LL and Zm. At low frequency, the influence of some capacitors is ignorable. Thus, equation (8) is simplified as Zin ¼
RL þ Rf 1 þ Gm RL
(11) With the assumption of an infinite Zπ2 and considering Rf » Re holds in the design process, Equation (11) is further simplified to
(9)
Zin ¼
The above equation shows that reasonable selection of parameters in Fig. 7(a) makes the input resistance 50Ω, therefore reaching a good matching. However, as the frequency increases, image part of the input impedance becomes comparable with that of the real part, deteriorating matching result obtained at high frequency. For parameters Cπ ¼ 450 fF, rπ ¼ 380Ω, Re ¼ 1Ω, gm ¼ 530 mS, CL ¼ 80 fF, RL ¼ 60Ω, Rf ¼ 580Ω and Rs ¼ 50Ω, the calculated result of S11 versus frequency is shown in Fig. 2. Clearly, resistive shunt-shunt feedback technique realizes a S11 lower than 20 dB at relative low frequency, implying a perfect matching. However, it becomes worse as frequency increases. S11 is larger than 10dB when frequency exceeds 15 GHz. It is noticeable that above calculation is finished without the consideration of Q2. When taking Q2 into account, the result will be worse. Obviously, it is difficult to achieve matching over the 2–20 GHz band only using shunt-shunt feedback technique. To broaden the available band, a preceding L-type passive network is designed, transforming original input impedance Zin to Ztot, i.e. 50Ohm at higher frequency. Fig. 8 shows the passive matching network. It is easy to find Ztot ¼
sL1 þ Zin s2 L1 C1 þ sC1 Zin þ 1
ðRf þZL Þ ðRe þ αZπ 1 Þ Rf þ αZπ 1 þZL ð1 þ gm1 Zπ 1 Þ
(12)
where α ¼ 1þgmRe, whose value is controlled between 1 and 2. Then the impedance after adding the preceding L-matching network is
Ztot
ðRe þaZp1 ÞðRf þZL Þ sL2 þ R þaZ þZ 1þg Z Lð f p1 m1 p1 Þ ¼ ðRe þaZp1 ÞðRf þZL Þ s2 L2 C2 þ sC2 R þaZ þZ 1þg Z þ 1 Lð p1 m1 p1 Þ f
(13)
It can be seen that the addition of L2 and C2 extends the bandwidth of both structures. But due to different loads in that two LNA structures, the matching expansion effect still exists. However, due to the influence of the negative feedback path, complex passive load networks make input matching better at high frequency. Besides, the positon of the ac coupling capacitor also affects the effect of input impedance matching to a large extent at high frequency. The effect of the passive load network and the position of Cf on S11 is shown in Fig. 11. As can be seen from the figure, the R1、C1 and L1 makes the reflection coefficient at the input have a higher frequency zero point, and the bandwidth satisfying 10dB is expanded by about 4 GHz. While the overall matching bandwidth didn't expanded if Cf is placed close to the output, but the impedance is closer to 50Ω in the 15–27 GHz, thus achieving a better match.
(10)
For parameters L1 ¼ 300 pH, C1 ¼ 200 fF, the calculated S11 after adding L1 and C1 is also displayed in Fig. 9. Compared with the former, the preceding passive network introduces a minimum in S11 at about 20 GHz, widening the matching bandwidth. After analyzing the simple model, calculate the input impedance of the low noise amplifier based on the accurate small signal equivalent model and considering the influence of Q.
3.2. Linearity improvement A circuit block consists of basic components. Therefore, nonlinear components like transistors limit the available P1dB or IIP3 [22,23]. To improve the linearity of a module, for example LNA, well-designed structure should be used. In this paper, bipolar transistors are used whose relation between collector current and base-emitter voltage is 133
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Microelectronics Journal 86 (2019) 130–139
9'' // 5/ 5I
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YEH
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Fig. 7. (a) Resistive shunt-shunt feedback amplifier. (b) Small-signal equivalent circuit of Q1 and Re. (c)Equivalent circuit of Fig. 7(a).
Vbe0 þ v Ic ¼ IS exp VT
where α1 is the linear gain and α2, α3 are the second-order and third-order nonlinearity coefficients, respectively and αn is expressed as
(14)
where Vbe0 and v are bias voltage and input small signal voltage, respectively, Ic is the total current controlled by Vbe0 and v. Apparently, there exists serious nonlinearity between Ic and v. Since the input signal is assumed to be small, equation (11) can be expanded at the bias point, reaching ic ¼ α1 v þ α2 v2 þ α3 v3 þ
αn ¼
1 ∂n Ic ⋅ n! ð∂vÞn v¼0
(16)
In the method of derivative superposition, two transistors are biased at different voltage and have opposite third-order coefficient. The output presents almost zero third-order nonlinearity when the collector (or drain) current are added. However, as frequency goes higher, equation (16) does not approximate (15) any more. High order nonlinearity terms manifest themselves and compress the small signal gain. Hence, methods
(15)
134
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Microelectronics Journal 86 (2019) 130–139
5V
/
YV
=LQ
& Fig. 8. L-type matching network.
Fig. 11. The influence of the position of Cf on S11.
;L'
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Fig. 10. Small-signal equivalent circuit of Fig. 6.
Fig. 12. Block diagram of (a) open loop and (b) closed loop amplifier.
only to decrease the α3 such as derivative superposition technique do little to boost the P1dB. Now, consider the negative feedback technique [24]. Shown in Fig. 12 are basic open loop and closed loop block diagram. Block A and F represent a nonlinearity amplifier and an ideal feedback network, respectively. In Fig. 12(a), an ideal sin wave is amplified by A and appears with apparent distortion at the output. If the input sin wave and output are expressed as Xi1’ and Xo, respectively, the mathematic relationship between input and output can be written as Xo ¼
AX 'i1
þ
X 'o
X ''o ¼ X 'o AFX ''o
(18)
That is X ''o ¼
X 'o 1 þ AF
(19)
From which it is observed that the THD is decreased by a factor of (1 þ AF). To understand the dependence of nonlinearity on feedback more directly, circuit in Fig. 7 is simulated based on parameters of Cf ¼ 2 pF, CL ¼ 0, Rf ¼ 580Ω, RL ¼ 60Ω，Q1:4 6μ 0.15μ, Q2:2 7μ 0.15μ, Vb,Q1 ¼ 0.9 V, Vb,Q2 ¼ 2 V, Pin ¼ 15dBm, f ¼ 10 GHz. Re increases form 0Ω–5Ω and Fig. 13 plots the simulated result. Since the gain decreases as feedback increase, the obtained THD is normalized to the gain to take gain reduction into account. Obviously, in Fig. 13 the THD becomes lower due to a larger Re.
(17)
where Xo’ is the total harmonic distortion. Now, close the open loop as Fig. 12(b) depicts. To make the distortion comparable before and after closing the loop, Xi is increased to keep the fundamental of Xi2’ in Fig. 12(b) equal to that of Xi1’. Then, the output distortion Xo’’ in Fig. 12(b) can be divided into two. One is Xo’ which is produced by the fundamental of Xi2’ and the nonlinearity of A, and the other is the amplified Xo’’ by a factor of –AF. Above analysis indicates 135
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Microelectronics Journal 86 (2019) 130–139
emitter junction of Q2 contributes all the noise to the point m. According to the definition of NF and with the condition of gm1RfReal(Zπ1)»Re, the result is expressed as Rf ðRe þ Zπ 1 þ Zin Þ þ Zπ1 Zin 2 2qIc1 ⋅ NF ¼ 1 þ ð1 þ sC1 Rs Þð 4kTRs þ gm1 Rf Zπ1 gm1 Zπ1 Rf þ Zin þ Zin 2 Re 2qIb1 ⋅ þ jRe þ Zin j2 ⋅ þ R 4kTRs gm1 Rf Zπ1 s 2 Re þ Zπ1 þ Zin þ gm1 Zπ1 ðRe þ Zin Þ Rf rL1 ⋅ þ þ R gm1 Rf Zπ1 Rs s 2 2qIb2 1 ⋅ RL þ 4kTRs gm1 Rf Zπ1 ðRL þ sLL Þ Rs
(22)
The following conclusions are reached base on (22) 1) 2) 3) 4)
Fig. 13. Dependence of THD on resistor Re.
The NF decreases with the increase of Rf; A lower Re causes a lower NF; The NF is optimized with the increase of gm (or power consumption); A higher Q of L1 results in a lower NF.
4. Simulation results 3.3. Power gain and noise figure
The layout of this ultra-wideband LNA is finished based on TowerJazz 0.18 μm SiGe technology. This process provides one layer of poly and six layers of metal for interconnection. Bipolar transistors in the library have an fT as high as 200 GHz, which is beneficial for circuits applied to high frequency. The inductors are constructed using the topmost layer for a wake coupling to substrate and a high Q. this process provides MIM capacitors constructed between M4 and M5, having a capacitance density of 2 fF/μm2. Well resistors, poly resistors and metal resistors are also supplied for different applications. Exhibited in Fig. 15 is the finished layout of the designed LNA. Si is the input pad of the RF signal, and So the output pad. Lying at the top left of Fig. 15 is the biasing circuit including a bandgap reference circuit to provide bias voltage for Q1 and Q2. In the layout, the effect of C3 is replaced by the parasitic capacitance of ESD diodes and input pad, thus, C3 is not an explicit capacitor any more in Fig. 15. Similarly, C2 is replaced by the parasitic capacitance of ESD diodes and output pad. According to equation (22), a high Q inductor is employed in the preceding L-matching network to suppress the NF. After several iterative design stage, the final components parameters are listed in the following
To obtain the small signal gain, a well matching is assumed, thus, half of the source power reaches the input of the LNA in Fig. 10. Therefore, the small signal gain is approximate to s21 ¼ 2 ⋅
vb vm vo ⋅ ⋅ vs vb vm
(20)
The same assumption of an infinite Zπ2 is used, thus ZL Re gm1 Rf Zπ1 Zin ⋅ s C1 L1 Rs þ sðL1 þ C1 Rs Zin Þ þ Rs þ Zin Rf þ ZL ðRe þ αZπ1 Þ Rp ⋅ 2 s L2 C3 Rp þ sL2 þ Rp
s21 2 ⋅
2
(21) With the additional conditions of gm1RfReal(Zπ1)»Re, Rf»|ZL|,
αReal(Zπ1)»Re, the second fraction in (21) is reduced to ZLgm1/α. As
elaborated in section II, the addition of peaking inductor and the passive π-matching network increases the high frequency load impedance of ZL, compensating the gain reduction due to the poles introduced by the other two fractions in (21). Finally, a wideband flat gain is achieved. Negative feedback is favorable to the linearity, however, the physical feedback resistors cause extra noise, deteriorating the available NF. In the noise analysis, since L1 precedes the amplification stage, the noise of its parasitic resistance should be considered. In addition, the shot noise of Q1 and Q2, the thermal noise of Re, Rf and RL and the thermal noise of Rs are also taken into account. Ignore all other noise not mentioned. The small signal circuit for noise analysis is shown in Fig. 14. To simplify the calculation, Zπ2 is assumed infinity and all the noises are equivalent to output current of point m which is shorted to ground. The resulting noises are expressed as equation (22)–(30). It is noteworthy that equation (27) shows shot noise of collector junction of Q2 contributes no noise and (28) shows shot noise of base-
+ -
5V
vrL2 1
U/
5I
/
+ -
2 vRs
+ -
&
ib21
vRf2
JPY
Z1
ic21
ib22
JPY
Z2
ic22
5H + -
5/ + -
2 vRL
=P
//
2 vRe
Fig. 14. Small signal circuit for noise analysis.
Fig. 15. The finished layout of the designed LNA. 136
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Table 1 Parameters of core components. Element
Value
Element
Value
L1 L2 LL Cf C2
473 pH 648 pH 518 pH 2 pF 80 fF
Rf RL Q1 Q2
580Ω 60Ω 4 6 μm 0.15 μm 2 8 μm 0.15 μm
Fig. 17. Compression point simulation.
3.7 dB (at 20 GHz), respectively. And due to careful selection of components and rational layout, the post layout simulation is consistent with the schematic simulation result over the 2–20 GHz band. Fig. 17 is the linearity characterized by compression point. It shows the achieved input 1-dB compression point is 11.7dBm at 15 GHz. To better predict the performance after taping out, Monte Carlo simulation based on process and mismatch has been performed. The obtained S parameters and NF results are shown in Fig. 18. From the figures, S11 and S22 vary with process and mismatch, however good input and output matching still realized. The maximum variation of S21 is 2.5 dB over the 100 simulation and almost all the curves are above 15 dB over the 2–20 GHz bandwidth. The NF is less sensitive than the s parameters and has a maximum variation of about 0.4 dB. In Table 2, performance of the designed LNA is compared with similar broadband LNAs, where indicates the designed LNA has good performance in comparison to other works.
(a)
5. Conclusion This paper first gives the theoretical analysis of techniques of wideband matching, gain enhancement and linearity improvement and then designs a wideband LNA. It uses an L-matching network and π-matching network to achieve good input and output matching, respectively. Parallel compensation technique is used to maintain the gain at high frequency and feedback technique is adopted to enhance the large signal linearity. Post layout simulation has been performed and the results show that this LNA achieves good performance over the 2–20 GHz band. Meanwhile, Monte Carlo analysis demonstrates the robustness of the LNA.
(b) Fig. 16. The post and pre-simulation results of (a) S11 and S22 (b) S21 and NF.
table (see Table 1). Fig. 16(a) displays the post and pre-simulation results of input and output matching of the wideband LNA. The post simulated S11 is below 10.8 dB over the 2–20 GHz band. At low frequency, the post simulation is consistent with the pre-simulation. At high frequency, the post layout S11 degrades due to the parasitic parameters. To achieve a favorable output matching, a passive π-matching network is inserted in this circuit. From the simulation results, this structure has a good effect on the output matching. The obtained post-layout S22 is better than 12dB over the 2–20 GHz bandwidth and is close to the pre-simulation result. Fig. 16(b) depicts the gain and NF response versus frequency. The results show that the post-layout S21 is above 16.1 dB over the interested band and is consistent with the schematic simulation. The minimum and maximum of the post layout NF for the LNA are 2.5 dB (at 2.4 GHz) and
2 Rf ðRe þ Zπ 1 þ Zin Þ þ Zπ1 Zin ⋅ 2qIc1 i2o;c1 ¼ Rf ðRe þ Zπ1 þ Zin Þ þ Zin ðRe þ Zπ1 Þ þ gm1 Re Zπ 1 Zin þ Rf (23)
i2o;b1
2 gm1 Rf Zπ1 ðRe þ Zin Þ ⋅ 2qIb1 ¼ Rf ðRe þ Zπ 1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ1 Zin þ Rf (24)
2 gm1 Zπ1 Rf þ Zin þ Zin ⋅ 4kTRe i2o;Re ¼ Rf ðRe þ Zπ1 þ Zin Þ þ Zin ðRe þ Zπ1 Þ þ gm1 Re Zπ1 Zin þ Rf (25)
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Fig. 18. Monte Carlo simulation results of (a) S11, (b) S22, (c) S21 and (d) NF.
Table 2 Comparisons of the designed LNA with some recent published linear LNAs.
Tech (nm) BW (GHz) S11 (dB) Gain (dB) NF (dB) IP1dB (dBm) IIP3 Area (mm2)
[9]
[10]
[15]
[16]
This work
90 1.6–28 <10 9.6 1.1 3.66 0.74 9
SiGe 0.05–23.5 <6 17 1 6 19
180 3.1–10.6 <-8.6 12.26 0.63 <4.74 22
180 1.6–9.7 <10 9.6–12.6 3.9–5.8 –
SiGe 180 2–20 <10 16.1–18.1 <3.7 11.7
– 0.139
8.3 0.25
11 0.536
10.1–12.6 –
– 0.435
i2o;c2 ¼ 0
(28)
i2o;b2 ¼ 2qIb2
(29)
2 1 ⋅ 4kTRL i2o;RL ¼ RL þ sLL
(30)
2 1 i2o;Rs ¼ 1 þ sC1 Rs 2 Re gm1 Rf Zπ1 ⋅ 4kTRs ⋅ Rf ðRe þ Zπ1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ 1 Zin þ Rf (31)
i2o;Rf
2 Re þ Zπ 1 þ Zin þ gm1 Zπ1 ðRe þ Zin Þ ⋅ 4kTRf ¼ Rf ðRe þ Zπ 1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ 1 Zin þ Rf
In equations (22)–(30), Zin ¼ Rs||(1/sC1)þsL1. Zπ1、Ic1 and Ib2 represents the emitter junction impedance、collector quiescent current and base quiescent current of the transistor Q1.
(26)
i2o;rL1
Acknowledgement
2 Re gm1 Rf Zπ1 ⋅ 4kTrL1 ¼ Rf ðRe þ Zπ 1 þ Zin Þ þ Zin ðRe þ Zπ 1 Þ þ gm1 Re Zπ 1 Zin þ Rf
This work was supported in part by the National Natural Science Foundation of China under Grant 61574111.
(27)
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References
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