An X-ray diffraction study of the effects of rapid thermal annealing on GaAs layers on Si substrates

An X-ray diffraction study of the effects of rapid thermal annealing on GaAs layers on Si substrates

Volume 10, number MATERIALS 1,2 September LETTERS 1990 An X-ray diffraction study of the effects of rapid thermal annealing on GaAs layers on S...

287KB Sizes 1 Downloads 28 Views

Volume

10, number

MATERIALS

1,2

September

LETTERS

1990

An X-ray diffraction study of the effects of rapid thermal annealing on GaAs layers on Si substrates J. Varrio,

F. Riesz

‘, J. Lammasniemi,

M. Hovinen

and

M. Pessa

Department ofPhysics, Tampere University of Technology, P.O. Box 527, SF-33101 Received

Tampere, Finland

9 May 1990; in final form 2 July 1990

The rapid thermal annealing method was applied to improve the crystalline quality of GaAs layers grown by molecular beam epitaxy (MBE) on Si ( 100) substrates. The annealed GaAs-on-Si samples exhibited remarkably better crystal structure than did the as-grown samples, as revealed by X-ray diffraction (XRD). The smallest XRD linewidth was 145 arc set for a GaAs layer of 4 urn in thickness. The optimum temperature and time of annealing were found to be 930°C and 10 s for the layers having 1 urn in thickness but longer annealing times at this temperature were needed for thicker layers. Growth of a buffer layer by migrationenhanced epitaxy, prior to growing the final layer by MBE, also improved the crystalline quality when compared to that of the unannealed layers grown by the two-step MBE procedure.

Growth of GaAs layers on Si substrates encounters several problems. The difference in chemical nature of the two materials, the lattice mismatch of 4%, and the different thermal expansion coefficients result in poorer crystalline quality for GaAs-on-Si than for homoepitaxial GaAs #I. Thermal annealing is an efficient method of reducing the defect density in GaAs-on-Si. In-situ annealing [ 21 and rapid thermal annealing (RTA) [ 3,4] are particularly attractive alternatives to conventional post-growth furnace annealing [ 5 1. Both in-situ annealing and RTA minimize interdiffusion between the layer and the substrate and do not significantly increase the stress in GaAs. In-situ annealing can be carried out immediately after depositing the buffer layer and thus the final (device) layer is not affected. RTA is a very short process, so that interdiffusion remains as little as possible [ 41. RTA has other advantages as well: it requires no arsenic overpressure, and the processing time and power consumption are small [ 6 1.



Permanent address: Research Institute for Technical Physics of the Hungarian Academy of Sciences, H-l 325 Budapest, P.O. Box 16. Hungary. II’ For the latest references see ref. [ 11. 0167-577x/90/$

03.50 0 1990 - Elsevier Science Publishers

In the present paper we investigate effects of RTA on crystal structure of GaAs-on-Si, as detected by double-crystal X-ray diffraction. By analyzing the linewidth of the rocking curve of the sample we made an attempt to optimize the temperature and time of annealing for 1 urn thick GaAs layers grown on Si substrates. We then made other experiments where annealing temperature has been the same as that for the 1 urn thick layers while the annealing time and layer thickness were varied. Since the quality of a buffer layer is important for subsequent growth of a device layer, in particular if the device layer is thin [ 7 1, we also studied GaAson-Si samples where very thin buffer layers ( ~250 A) were deposited by the migration-enhanced epitaxy (MEE) technique, prior to further growth by MBE. Tentative results of these experiments are also given in this paper. MBE was used for film growth, and the common two-step procedure was applied to ensure singlecrystalline growth. The growth procedure was as follows. - Chemical and thermal cleaning of the substrate [ 71. - Buffer layer growth by MBE or MEE layer thickness = 250 A, growth temperature = 300°C

B.V. (North-Holland

)

49

Volume

10, number

MATERIALS

1,2

growth rate = 0.25 urn/h (by MBE) and 0.5 urn/h (by MEE). - Final layer growth by MBE layer thickness = l-4 urn, growth temperature = 580°C growth rate = 1 urn/h. The previously published papers [ 3,4] suggest that annealing temperatures above 940°C cause damages to crystal structure. Temperatures below 800°C have no significant effect on crystal structure. We annealed the samples for 10 to 40 s at temperatures varying from 850 to 930°C. Our aim was to find the optimum set of annealing parameters for the films of different thicknesses. The anneal was carried out in an AST SHS 100 system which uses halogen lamps and flowing nitrogen gas ambient. The temperature was measured by an optical pyrometer calibrated by a thermocouple. The samples were placed on a Si wafer, the GaAs layer side downwards. The pyrometer was placed under the wafer. During calibration the pure Si wafer had the same position. The thermocouple was attached with ceramic adhesive on the bottom of the wafer. Before and after annealing a purging step was applied (fig. 1). The (004) X-ray diffraction (XRD) rocking curves were measured for the samples before and after annealing with a Bede model 150 double-crystal diffractometer employing Cu Ku radiation. The measurements were carried out using Si as a first (monochromator) crystal. From the linewidth of the layer peak, rGaAs, one

Temperature

and Gas Flow

Profile

of the

RTA Process

10

0

60 -

Time

70 (see)

70+1,

90+1,

110+1,

_

Fig. I. Temperature and gas flow profiles of the RTA process. There was no significant overshoot during heating up.

50

September

LETTERS

can estimate D=l&,,/9b2.

the dislocation

1990

density D [2,4,8]: (1)

Here b is the absolute value of the Burgers vector. Assuming that the dislocations are of type II (60 o dislocations), eq. ( 1) yields D=410r&,As,

(2)

where D is given in units of cmP2 and roaAs in arc sec. It should be noted that this relationship assumes a uniform distribution of dislocations across the film and mosaic structure with low-angle grain boundaries. Therefore, D is not the true dislocation density, but it can be used as a figure of merit of the crystalline quality. To study the effect of RTA on the amount of stress of a sample the linewidth for X-ray diffraction from Si substrate was measured before and after annealing. From this linewidth one can calculate the wafer curvature which, in turn, is related to the stress value. Furthermore, for completely relaxed Si and GaAs lattices a certain difference in peak positions (“splitting”) exists, due to the lattice mismatch. If the measured splitting is larger than the splitting for the relaxed lattices then the stress is compressive, if it is smaller, the stress is tensile. The as-grown layers had smooth orange-peel-like surface morphology structures, and the RTA treatment did not alter this morphology. Table 1 shows the XRD results for 1 urn thick layers grown on substrates cut exactly along the ( 100 ) crystal plane. The dislocation density was calculated using eq. (2 ). The dislocation reduction factor was defined as a ratio of D (before RTA) to D (after RTA ). The roaAs values for as-grown GaAs are comparable to those published in the literature [ 2,4]. It can be seen that RTA has, indeed, a remarkable effect on the crystalline quality; the maximum dislocation reduction factor in these experiments is 5.7. The closely optimized annealing conditions were found to be 930°C and 10 s for the 1 urn layers. Fig. 2 summarizes the rGaAs values for the layers of 1, 2, and 4 urn in thickness before and after annealing as a function of the annealing time (the 2 and 4 urn films were grown on ( 100) substrates misoriented with 4” towards [ 0111). It was necessary to use longer annealing times for the thicker films to obtain minimum rGaAs. The rGaAs versus t, curves saturate

Volume 10, number I,2

September 1990

MATERIALS LETTERS

Table 1 Data of the XRD rocking curves and the dislocation reduction factor for the 1 urn thick GaAs tilms on ( 100) Si substrates Sample number

Annealing parameters

rsi (arc set)

r GaAJ (arc see)

D (cm-‘)

11

Dislocation reduction factor

TInax(“Cl

t. (s)

1 1

900

10

21

645 275

1.7x IO8 3.1x10’

5.5

2 2

930

10

21

630 260

1.6X IO8 2.8x 10’

5.7

3 3

850

40

19

450 280

8.3x 10’ 3.2x IO’

2.6

4 4

850

10

15 18

546 320

1.2x to* 4.2x IO’

2.86

t

X-RAY DIFFRACTION

FROM GaAslSi

I

m after RTA. This is to say that while reducing the dislocation density by RTA, the stress in the GaAs layer was increased. Fu~he~ore, from the relative positions of the diffraction peaks of GaAs and Si one may conclude that the RTA treatment increases the tensile stress in the layer. In other words, the lattice mismatch upon annealing is accommodated by an increased tensile st.ress in GaAs rather than by creation of misfit dislocations. This work was supported, in part, by Technology Development Centre, Academy of Finland, Nokia Corporation, Wallac Ltd., DCA Instruments Ltd., and Wihuri Foundation. References

Fig. 2. Linewidths of X-ray diffraction from GaAs-on-Si samples after annealing.

after 10, 20 and 30 s of annealing for the 1, 2, and 4 urn thick layers, respectively. It is worth noting that the annealed 4 urn layer exhibits a linewidth of only 145 arc set, which is among the best values ever reported in the literature of GaAs-on-!%. Fig. 2 also shows that the use of the RTA is a more effective way of reducing the disl~tion density than the use of the MEE buffer layers alone. The linewidths for Si, Irsi, were measured before and after annealing. The typical values were 15 and 20 arc set, respectively. Assuming that the diameter of the X-ray beam was 1 mm the sample curvature radii were of the order of 14 m before RTA and 10

[ 11Mater. Res. Sot. Symp. Proc. 145 ( 1989) Part 6. [ 2] A. Freundhch, J.C. Grenet, G. Neu, A. Leycuras and C. Verie, Appl. Phys. Letters 52 ( 1988) 1976. [3] N. Chand, R. People, F.A. Baiocchi, K.W. Wecht and A.Y. Cho, Appl. Phys. Letters 49 ( 1986) 8 15. [4] N. Chand, J. Allam, J.M. Gibson, F. Capasso, F. Behram, A.T. Macrander, A.L. Hutchinson, L.C. Hopkins, C.G. Bethe, B.F. Levine and Y. Cho, J. Vacuum Sci. Technol. B 5 ( 1987) 822. [ 5 ] J.W. Lee, H. Schicbijo, H.L. Tsai and R.J. Matyi, Appl. Phys. Letters50 (1987) 31. [6] R. Sin&r, J. Appl. Phys. 63 (1988) R59. [ 71 J. Varrio, H. Asonen, A. Salokatve, M. Pessa, E. Rauhala and J. Keinonen, Appl. Phys. Letters 51 (1987) 1801; J. Vanio, H. Asonen, M. Hovinen, M. Pessa, K. Ishida and H. Kitijawe, Mater. Res. Sot. Symp. Proc. 110 ( 1988) 91. [S] R.J. Matyi, J.W. Lee and H.F. Schaake, J. Electron. Mater. 17 (1988) 87.

51