Analysis of the quasi-saturation region of high voltage VDMOS devices

Solid-State Electronics Vol. 30, No. 2, PP. 1777180, 1987 Printed in Great Britain. All rights reserved

0038-I lOI/ $3.00 + 0.00 Copyright 0 1987 Pergamon Journals Ltd

ANALYSIS OF THE QUASI-SATURATION REGION OF HIGH VOLTAGE VDMOS DEVICES J. REBOLLO, E. FIGUERAS, J. MILLAN, Centro

E. LORA-TAMAYO

and F. SERRA-MESTRES

National de Microelectronica, CSIC-UAB, Dept”- de Fisica (Div. Electrbnica), Universitat Autonoma de Barcelona, Bellaterra, Barcelona, Spain (Received 27 November 1985; in revisedform

13 March 1986)

Abstract-The effect of the epitaxial layer on the quasi-saturation region of the Io(Vo) characteristic of a high voltage n-channel VDMOS structure is analysed. The proposed model takes into account the cylindrical shape of the P-well/N--epilayer junction and the pinching effect of the current between neighbouring cells.

NOTATION A C”, Eo H h 1, K L I N.4 No 4 4 R ON r V,, Vo VFB VG VX 22 6 es p’o PO Y

active chip area [Z(I + r)] gate oxide capacitance per unit area critical field for the saturation of the electron velocity epitaxial thickness P-well depth drain current 2 z I”0 C”,IL channel length distance between neighbouring P-wells channel acceptor impurity density epilayer donor impurity density intrinsic concentration electron charge drain-source resistance (Vo-0) P-well length built-in potential drain bias flat-band voltage gate bias channel edge potential effective channel width tube length semiconductor permittivity low field electron surface mobility low field epilayer resistivity transversal reduction coefficient of the mobility

carrier

I. INTRODUCTION

MOS devices have recently received much attention. Important advances in processing technology and the appearance of new structures have allowed improvements in the current, voltage and power-handling capabilities of MOS devices. They are made up of a multitude of short channel transistor cells associated in parallel in order to achieve high current capabilities. They also differ from the conventional MOSFET in a low-doped drain epitaxial layer necessary to support high voltages in the OFF state[l,2]. This epitaxial layer gives rise to a resistance in series with the short channel MOSFET, this resistance being the main component of the device Power

resistance in the ON state (RON) for high voltage devices. The aim of this work is to analize the ZD(VD) characteristics for a high voltage (2 1000 V) VDMOS structure and, especially, the quasisaturation region of the ID(VD) curve. The quasisaturation region is typical of power MOS devices and it is a consequence of the drain epitaxial layer. This region is characterized by a current not saturated with respect to the drain voltage and by a non-dependence of the current on gate bias[3,4]. Therefore, current is not governed by the gate bias in the quasi-saturation region. The epilayer resistance does not allow MOS channel pinching in this operation mode. Under these conditions, current is controlled by the epilayer resistance that accounts for the independence of the current on gate voltage. This paper is devoted to a mode1 for the epitaxial layer resistance which explains the progressive drain pinching through neighbouring cells.

2. DEVICE MODEL The resistance of the VDMOS structure section is shown in Fig. 1) has components[5,6]:

(a cross4 main

(i) the channel resistance, (ii) the accumulated layer resistance at the epilayer surface under the gate electrode, (iii) the JFET resistance between neighbouring cells, and (iv) the bulk epitaxial resistance that accounts for the current spreading in the semiconductor bulk. Given that we are dealing with very high voltage structures, the more significant components of the device resistance are the JFET and the bulk epilayer ones. Accordingly, in the following we will not consider the accumulated resistance for these structures. Likewise we shall assume that the radius of the 177

J.

178

REBOLLO el

al

1h t --

ti

/

i

Fig.

I. Cross-section

of the VDMOS

structure.

The resistance components indicated.

cyhndrical P-well between neighbouring cells is equal to the junction depth. In order to explain the influence of the epitaxial layer on the I,,( V,) characteristics, 3 components can be distinguished within the epilayer resistance: (a) a trapezoidal resistance; (b) a tube resistance[4]; and (c) a trapezoidal/rectangular resistance, as it is shown in Fig. 1. Previous works[4] have modelled the I,( VD) characteristic assuming a constant epitaxial resistivity. However, the electric field in this epilayer can be high enough to achieve carrier velocity saturation. Consequently, in this model, the following resistivity variation with the electric field has been assumed[7]: p = po[l + (E,IE,)‘l’:*

of the epitaxinl layer are

yr being the width of the voltage-dependent layer along the radial axis. Accordingly, the trapezoidal resistance as: Pmlp

R i,“,’= -

z

Consequently, the sistance component

1 ~ 2atg/I

I(V) is:

In

depletion is written

1 (4)

I-2hatgp’

characteristic

for this

1, = (5 - J’x)lR,,,,.

re-

(5)

where V,- is the voltage at the MOST short channel edge and V, is determined by the cylindrical shape of P-well/N --epilayer junction[3]:

(1)

Rigorously, we should take into account a different resistivity at any epitaxial point but, in order to simplify, we have assumed for each epitaxial region a constant resistivity which depends on the mean value of the electric field for that resistance component.

x]2In(J

+y,ih)-

I]+

1 -v,,. i

(6)

(h) Tube resistance (a) Trapezoidal

resistance

It spans from the epilayer

surface under the gate electrode up to the P-well edge. The resistance of an elemental section is given by:

dR,r, =

~,,a,, dl’ z(l-2yatgp)

where tl is a reduction factor width which will be discussed in Fig. 1 is expressed by

tgp =[(I +y,/h)*-

of the tube resistance later, and p as shown

1]“2_ 1

(3)

This resistance component is the more critical one. In our model, the cylindrical shape of the P--N junction has been taken into account in order to determine the tube-length. The diameter of this tube is determined by the bottom base of the former resistance and its length, 6, by assuming a zero lateral depletion layer of the cylindrical P-N _ junction at the tube bottom (see Fig. 1). In this case, the tube resistance length and the depletion layer width, _v?. are related by: yZ = h [(l + (1 + 6/h)‘)‘,’

-

11.

(7)

Quasi-saturation Then, the expression R

of this resistance

region of high voltage VDMOS devices

is:

current

through

179

the MOS transistor

is given by:

ID=p +fYyy

PlUbe 6 ‘“b’=Z(I-2&@/3)

The factor c[ has been introduced in order not to overestimate the epilayer resistance, since the largest pinching of the current between neighbouring cells does not occur along the whole tube length but only at a point. This is especially important when the tube width is much smaller than the distance between cells. Likewise, the hypothesis that the P-well/N-epilayer junction has a cylindrical shape is only an approximation which can play an important role in case of very lightly doped epitaxies. In our case, we have considered the fitting parameter GIto be de endent on the external drain voltage VD: c( = 1 - J- VJa. Accordingly, the Z(V) characteristic for this resistance is: 1, = (vz - V,)/R,ube>

(9)

where V2 is determined by the depletion layer width y, of the cylindrical P-N- junction, as in the case of

x

{

V, + Y In

2&,qN,

+p

CO,

[ x

Y + v;;-2v,-

v,

Y + VA - 2 v,

1

U=

2[(2 VP+ VJ”2 - (zv,)‘!=]

[

+(lp + Vb)“2 x

ln(2V” + V,)“’ -(Y (

(25

+ Vb)“’

+ V,)“’ + (Y + V;,)‘j’

_ In (2 V,)“’ - (Y + V’&‘Q (2VJ”X + (Y + V;;)“2 where two channels Fig. 1).

’ >I>

per cell have been considered

(14) (see

3. RESULTS

v,

(c) Trapezoidal /rectangular resistance It spans from the former resistance up to the drain N+ region. A 45” angle[8] has been considered to account for the spreading effect of the current. The resistance of an elemental trapezoidal section is: ~wap/reerd.v

dR~rap= Z(l-2hutg/3+2y)’ Consequently, is written as:

the trapezoidal/rectangular

l+r Prrop/rrer R mp,recr= -fin Z 2 I-2hcitgp + and its Z(V) characteristic ID = (Vo -

H-h-r/2-hcttgp-6 I+r

(10) resistance

The 1,( VD) characteristics of the VDMOS device is obtained by solving the set of equations (5), (9), (12) and (14) where V,, y, , 6 and I, are unknowns. Results are plotted on Fig. 2 where an effective electrical channel length L = 1.5 pm was necessary to fit the saturation current. In this figure, the ZD(VD) characteristics, without considering the tube reduction factor c(, are also represented. Let us mention that the effect of the parameter o! is negligible at low drain voltages (R,, does not depend on c(), but for higher drain voltages the current is limited as a consequence of the overestimated tube resistance.

1?(11)

is:

VJR,,,rrcr .

(12)

_

In order to obtain the ID( VD) characteristic, the short channel length MOS has to be considered in series with the epilayer resistance. Assuming a distributed analysis and a carrier mobility dependence on both longitudinal and transversal fields as[7,9]:

p=

(i

PO 1+

Y X(l/[l

50

0

V,) - v - 2 v,

v*

> +[21’]112),

(13)

where VG = V, - VFB, V, = kT/q [In (NJ+)], V is the channel potential and E, is the longitudinal field, the

100

(V)

Fig. 2. ID(V,) characteristics, ~ with reduction factor a, ---- without reduction factor a, a = 1200 V. Parameters[4]: po=615cm2/Vs; Y =45 v; N = 2.5 x 10’6cm-‘; N1, = 5.5 x lO”cm-‘; H = 120 pm; 22 “=45 cm; h = 5 pm; L = 1.5pm;I = 20pm; r = 30pm; C,,, = 1.92 x lO~“F/cm’ l experimental points[4].

J. ~BOLLO

180

et a/.

quasi-saturation effect. For high voltage devices, the more critical component of this resistance is found to be caused by the current pinching between neighbouring cells which has been characterized by the cylindrical shape of the P-well/N cpilayer junction. Likewise, we have assumed a variation on the electric field for the channel and epitaxial mobilities. In order to evaluate the pinching effect properly, a reduction factor has been included to explain the fact that the pinching does not occur along the whole length of the tube. Good agreement exists between the proposed model and experimental data. Acknowledgement-The authors would like to thank Rossel for the continuous support and suggestions.

Fig. 3. Io( V,) characteristics for I = 50 and 20 pm, for the same active area. ~ with reduction factor a, ----- without reduction factor a.

REFERENCES

I. E. Fong, D. C. Pitzer and R. J. Zeman. 2.

Note that theoretical and experimental close agreement in the quasi-saturation In Figure

without

3, the

reduction

ID(VD)

factor

characteristics

results are in region. (with

and

for a greater distance between neighbouring cells (1 = 50 pm) but remaining the active chip area constant. Note that the effect of the overestimated tube resistance is lowered as I increases.

3. 4.

a) are also shown

5. 6.

7. 8.

4. SUMMARY

9.

A model has been proposed sistance of a VDMOS structure

for the epilayer rethat accounts for the

Dr P.

IEEE Trtr~r.\. Electron. Dev. ED-27, 322 (1980). B. J. Baliea and J. P. Walden. So/id-St. Ekcc~rorz. 26. 1133 (1981). S. C. Sun, Physics and Technology of Power MOSFET’s, Ph.D. Thesis, Stanford, U.S.A. (1982). J. L. Sanchez, M. Gharbi, H. Tranduc and P. Rossel. IEE Proc. 132, 42 (1985). P. L. Hower and M. J. Geisler. /EEE Trtms. Ek~r,ou. Deu. ED-28, 1098 (1981). S. C. Sun and J. D. Plummer, IEEE Tran.,. E/~/ror~. Dev. ED-27. , 356 (1980). \ , T. Grotjohn and B. Hoefflinger, IEEE Truru. Ek,c/rrm Dev. ED-31, 234 (1984). C. Hu, M. Chi and V. M. Patel, IEEE Trans. Nrc~rrrm Del>. ED-31, 1693 (1984). J. L. Sanchez, Proprietes a I’etat passant des transistors D.MOS de puissance coplanaires ou verticaux. These du Titre de Docteur-Ingtnieur. Toulouse. France ( 1984).