Analysis of thin film polysilicon on graphite substrates deposited in a thermal CVD system

Analysis of thin film polysilicon on graphite substrates deposited in a thermal CVD system

Journal of Crystal Growth 191 (1998) 386—392 Analysis of thin film polysilicon on graphite substrates deposited in a thermal CVD system D. Angermeier...

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Journal of Crystal Growth 191 (1998) 386—392

Analysis of thin film polysilicon on graphite substrates deposited in a thermal CVD system D. Angermeier*, R. Monna, A. Slaoui, J.C. Muller Laboratoire PHASE (UPR 292 CNRS), BP 20, 67037 Strasbourg Cedex 2, France Received 18 August 1997; accepted 15 January 1998

Abstract Thin films of polycrystalline silicon of 10—30 lm were grown on graphite substrates. The deposition experiments were conducted in a horizontal, atmospheric pressure RTCVD reactor from 800 to 1200°C employing the precursor trichlorosilane (TCS) and the dopant trichloroborine (TCB) diluted in a hydrogen carrier gas. The polycrystalline Si layers were analyzed by means of Nomarski microscopy, scanning electron microscopy (SEM), X-ray diffraction (XRD), and by high-resolution transmission electron microscopy (HRTEM). The electrical properties of the deposited films were evaluated by spreading resistance profiler (SRP), by Van der Pauw, and by microwave-deduced photoconductivity decay (MW—PCD) measurements. Deposition rates of the as-grown Si films were in the range of 1—3 lm min~1 resulting in grain sizes varying from 0.1 to 6 lm. The grain sizes of the deposited layer increases when the temperature or/and the input partial pressure of the reactant were raised. Additionally, preferred growth orientation conditions were found. Thus, crystallites grown between 900 and 1100°C showed a maximum diffraction peak for the (2 2 0)-orientation. A highly resistive region was also observed at the silicon—graphite interface due to the formation of SiC agglomerates. ( 1998 Elsevier Science B.V. All rights reserved.

1. Introduction The deposition of silicon thin films on low-cost foreign substrates has recently become a major objective in the search for processes having energy consumption and reaching a better cost evaluation [1—3]. Hence, combining inexpensive deposition techniques with the growth of crystalline silicon seems to be a straightforward way of ensuring reduced production costs of photovoltaic devices. As

* Corresponding author. Fax: #33 3 881063 35; e-mail: [email protected].

it has been proved by the semiconductor industry, chemical vapor deposition by rapid thermal processing (RTCVD) is advantageous as a low thermal budget process system even for thin solar cells production. In this processing, fast heating-up and cooling down cycles and the ability to integrate subsequent process steps guarantees low production costs. Principally, thin films of the order of 30 lm can be generated within a couple of minutes at high deposition temperatures (¹'1000°C) with subsequent emitter formation [4]. Indeed, in order to attain a high production throughput of solar cells, one anticipates that the growth rate should be of the order of 1 lm/min or

0022-0248/98/$19.00 ( 1998 Elsevier Science B.V. All rights reserved. PII S 0 0 2 2 - 0 2 4 8 ( 9 8 ) 0 0 1 4 2 - 0

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higher with a production process involving a conveyor belt system or using larger wafer sizes (/'8 in). By applying rapid temperature cycling, one is likewise able to control more efficiently the thermally driven surface reactions of the transient thermal processing with the potential for a quick change of the chemical gas ambient. Numerous results have been published recently on the epitaxial growth of thin film layers on silicon substrates by this processing utilizing costly precursors such as silane or dichlorosilane at a reduced reactor pressure [5]. Conversely, the use of the precursor trichlorosilane (TCS) offers the advantage of being inexpensive and reducing the risk of gas-phase nucleation and particle formation at high temperatures (1000—1200°C) [6]. Regarding inexpensive substrates, it is possible to use some ceramics, graphite or silicon-crystalline or metallurgically grade-material. We have chosen a commercially produced graphite substrate being chemically stable up to more than 3000°C and electrically conductive for a back contact of the solar cell. It is available at low cost in large amounts providing a high material purity and presenting a thermal expansion coefficient comparable to silicon. In this contribution, the undoped and borondoped deposition of 10—30 lm thin silicon films on graphite substrates using an atmospheric pressure RTCVD system are discussed. The Si deposition rate has been studied with respect to its dependence on substrate temperatures and as a function of the dilution in H of the reactant trichlorosilane (TCS) 2 and the dopant trichloroborine (TCB). The main purpose of the present work is to probe the impact of the operational parameters on the morphology, the growth rate, and preferred orientations of the crystallites. In addition, the deposition mechanism, the hydrodynamic effects, and the electrical properties are discussed in this context.

2. Experimental procedure 2.1. Deposition Polysilicon thin films were deposited on graphite substrates supplied in an isostatically pressed form,

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having a size of 50]50 mm2, and being of high purity (by Carbone Lorraine, France). A significant property of this graphite substrate is that it possesses a thermal expansion coefficient very similar to that of silicon at high deposition temperatures. It shows a high porosity and the surface roughness that does not exceed 1—3 lm. The RTCVD singlewafer system (Jipelec, France) used in this study has been previously reported in Ref. [7]. The polycrystalline thin films were grown at temperatures between 800 and 1200°C in a horizontal reactor chamber. The RTCVD system (Jipelec, France) functions as a single-wafer stainless-steel reaction chamber which separates on opening into a twopiece chamber. The substrate was located by three quartz pins during the processing and heated only from above by radiant energy from a bank of 12 tungsten halogen lamps. The side walls and the top quartz window were water cooled. The cold wall design greatly minimizes chamber memory effects and is particularly useful in CVD applications by preventing heavy deposition on the reactor walls and quartz windows. The temperature measurements were carried out by using a pyrometer viewing the back-side of the wafer carrier. The experimental studies involved the deposition of p-type Si-layers were grown from SiHCl diluted 3 with hydrogen and mixed with the dopant BCl . 3 The total flow rate of the carrier gas was fixed at 3.3 slm with additional flows varying from 1 to 5 g/min for the reactant TCS and from 20 to 100 sccm for the dopant BCl . Before depositing 3 silicon, the graphite substrates were cleaned in an isopropanol bath and finally blown dry by N . 2 Then, the chamber was pumped down to base pressure of 1 mTorr. Afterwards, H was introduced to 2 flush the chamber and establish a steady flow rate to remove residual oxides at atmospheric pressure. The sample was generally heated up in less than 20 s and the Si deposition commenced at atmospheric pressure. After each growth cycle the chamber was purged with N , before opening the reactor 2 cell. In order to investigate polycrystalline silicon layers on graphite substrates, a series of depositions were carried out for different growth periods and input partial pressures of the precursor, each at

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a specific substrate temperatures, constant reactor pressure and total flow rate. 2.2. Characterization Material examination of the deposited films was performed using Nomarski microscopy, scanning electron microscopy (SEM), and high-resolution transmission electron microscopy (HRTEM) measurements. Prior to grain size determination and cross-section evaluation, the grown layers were polished and submitted to a short Secco-etching in order to reveal the grain boundaries. Generically, the chemical etching is based on an aqueous alkaline solution whose anisotropic etching depends on the crystallographic orientation and/or on defects such as dislocations, grain boundaries, swirls, etc. The specimen structure and preferential orientations of the crystallites at distinct growth temperatures were evaluated by double-crystal diffractometry in reflection (Bragg case). Eventually, electrical properties in terms of Hall mobility, minority carriers lifetimes, and doping profiles were evaluated by Van de Pauw, microwave-detected photoconductivity decay (MW—PCD), and spreading resistance profiler (SRP) methods, respectively.

3. Results and discussion For the analyses of the polysilicon layers deposited under various growth conditions, we considered only the temperature range where the deposition rate is sensitive to the delivery of the precursor and is independent of the surface temperature. In this regime, we obtained a thickness uniformity and hence a Si deposition rate uniformity for 5]5 cm2 samples which did not exceed 5% across and along the specimen in our thermal CVD apparatus. It has been found that the layer thickness for doped and for nondoped layers follows a linear function of the growth time without any incubation period. Thus, the growth rates can be correctly obtained by straightforward calculation. However, in order to determine the transport or feed-rate-limited regime and to distinguish it from the kinetic-limited regime, silicon deposition was studied in the range 800—1200°C and the results are

Fig. 1. Deposition rate of polysilicon films versus temperature for an input concentration of TCS in hydrogen of 15% and a constant flow of 100 sccm BCl . 3

shown in Fig. 1. All other parameters, total pressure, a TCS partial pressure of 15 kPa, and feed rate were kept constant and avoiding diffusion-limited deposition which is susceptible to changes in gasflow rate [8]. A condition of the mass-transport limitation was observed for boron-doped polycrystalline growth on graphite substrates that dominates primarily above 1000°C. The deposition rates in this regime are lower on graphite than on other type of substrates for the same wafer size [9]. Fig. 2 illustrates the Nomarski micrograph cross-section of a 30 lm thick Si film deposited on a graphite substrate at 1100°C. The concentration of TCS was 15% and the TCB flow was set at 100 sccm. The columnar structure of the crystalline grains from the interface to the surface of the layer is readily recognizable. The Si films clearly exhibit grains which range in size from 0.1 to 6 lm. However, the magnitude of the crystallites are not uniform in size. The main reasons for the nonuniformity in size of the crystallites are (1) probably inhomogeneities on the graphite substrate surface which control the nucleation and the

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Fig. 2. Vertical cross-sectional viewgraph (Nomarski microscopy) of a silicon layer deposited on a graphite substrate at 1100°C with 15% TCS in H and a flow of 100 sccm BCl . 2 3

subsequent growth of silicon, and/or (2) the chemical transport of silicon between the neighboring crystallites due to differences in surface energies and/or local deposition temperatures. In Fig. 3, the dependence of the deposition rate on the TCS precursor concentration in H at a con2 stant dopant flow rate is represented for two different temperatures. In both cases with increasing reactant concentration the feed-limited rate first rises to a saturation value of around 25% TCS in H and then decreases linearly. The latter growth 2 rate phenomenon can be attributed partially to the depletion of the reactants the diffusion layer originating from the nucleation in the gas phase. The dominant cause is probably the approach to an etching condition at higher Cl/H ratios. Furthermore, since the input partial pressure of TCS exceeds far the pressure of silicon liquid phase at these growth temperatures, gas-phase nucleation can be enhanced. Next, the crystallographic structure and texture of polycrystalline silicon layers on graphite substrates by the RTCVD process is likewise investigated. In order to characterize the preferential orientation qualitatively, the orientation factor a is introhkl duced as follows: I /I h k l 0h k l a " 100 (%) hkl + I /I h k l h k l 0h k l

(1)

Fig. 3. Growth rate of boron-doped Si films as a function of TCS concentration in hydrogen at a deposition temperature of 900 and 1100°C, respectively.

where I is the Si powder diffraction peak used 0h k l as a standard reference and I represents the hkl measured intensity after the correction, taking into account the absorption coefficient of the X-ray. The a corresponds to the volume fraction of the hkl crystal grain with the lattice orientation (h k l). The crystallographic texture obtained by the RTCVD process is heavily dependent on the process conditions, especially the growth temperature and the reactant input partial pressure. In Fig. 4, the preferential orientation factor a is shown hkl with reference to the deposition temperature. Taking into account five crystallographic orientations of (1 1 1), (2 2 0), (3 1 1), (4 0 0), and (3 3 0), the mean value of 20% denotes a randomly oriented polycrystalline structure [10]. The Si(2 2 0) texture grows favorably at temperatures below a deposition temperature of 1100°C and above 900°C. This implies that the crystallites are formed with the long dimensions normal to the substrate as can be partially recognized in Fig. 2 [8]. At lower deposition temperature (¹ (900°C), $ in the kinetically limited regime, the surface-absorbed atoms are able to migrate to stable sites instead of reacting immediately with the surface sites upon arrival. The accumulation of absorbed atoms to shape a growing front has a better chance

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Fig. 4. The impact of deposition temperature on the preferred texture orientation (boron-doped) with 15% TCS in H . 2

to increase by capturing more species in the diffusion layer [11]. This promotes a continuous nucleation of new crystal growth sites and, hence, forms smooth nonfaceted structures with no preferential orientation [12]. In contrast, at elevated deposition temperature above 1100°C, it can be seen that the intensity of (2 2 0) decreases with the growth temperature. This result indicates once again that the preferred orientation of the films is affected by the surface condition. The random orientation of the Si growth may result from the surface roughness brought about by the supersaturation of Si on the surface or in the gas phase. Fig. 5 delineates the surface morphology of Si sample deposited at 1100°C which has undergone a polish treatment and a subsequent Secco-etching. The average crystal size of Si lies around 1—3 lm which increases further with the deposition temperature. Normally, angular and strongly faceted crystals are obtained in the deposits at high deposition temperatures (Fig. 2). The dependence of the grain size versus the deposition temperature may be likewise explained by the high surface mobility of reaction atoms and by the lower density of nucleii at elevated temperature causing the formation of large clusters and as a result larger crystals. Besides, the surface morphology of the Si reveals the feature of a twin structure

Fig. 5. SEM micrograph of a Secco-etched and polished silicon layer deposited on graphite substrate at 1100°C (boron-doped and 15% TCS in H ). 2

where a group of twin planes running parallel to the lateral faces of the crystal. The crystal twinning could occur as a stacking fault during the growth and/or when two nuclei coalesce and rotate into a precise twin relationship. Principally, the morphology of a crystal is determined by the reactive species and the atomic kinetics of the interface attachment. Conclusively, at high supersaturation and growth rates, the reactive species flux seems to be crucial parameter in determining the overall crystal morphology. The electrical properties of polycrystalline silicon layers are of great importance. In this material, the trapping of the majority carriers at the grain boundaries creates diffusion barriers for the transport of the residual charge carriers adjacent to the grain boundaries. This underlines once again the fact that it is necessary to aim for large crystallite size to diminish the impact of the concentration of recombination centers in the grain boundaries per volume. Spreading resistance profile measurements were performed to determine the resistivity of the layers grown on the graphite substrates. Fig. 6 compares SRP profiles of an undoped and an in situ doped Si films deposited at 1100°C for two different deposition times. The crucial feature of these SRP profiles is the resistivity peak at the interface. The shift of the

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Fig. 6. Spreading resistance profiles of doped and undoped layers deposited on graphite substrates by RTCVD at 1100°C and with 15% TCS in H . 2

Fig. 7. HRTEM cross-sectional micrograph of a doped silicon layer deposited on a graphite substrate at 1100°C with 15% TCS in H . 2

peak of the doped layer toward lower thickness originates from distinct deposition times for the doped and undoped layer. The resistivity peaks at the interface might be attributed to the formation of a less conductive SiC region at the Si—graphite region, or to the grown discontinuities in the Si layer at the interface reducing the application of the substrate as a back surface contact for solar cells. High-resolution transmission electron microscopy (HRTEM) analysis of the deposited Si films at 1100°C have further confirmed the formation of SiC agglomerates at the interface. The HRTEM image reveals in Fig. 7 that at the silicon—graphite interface there occurs a nucleation zone with b-SiC particles as well as nonreacted silicon and carbon compounds, but no continuous Si—C layer was formed. The b-SiC crystallites are in the range of several nm with a preferential orientation of (1 1 1) normal to the substrate surface. The minority carrier lifetime was measured by microwave-deduced photoconductive decay (MW—PCD) technique. In the Si layer deposited at 1100°C on graphite substrate, the minority carrier lifetime was measured to be around 0.1—0.2 ls, in low injection and with no surface passivation.

The mobility of the carriers, carrier concentrations, and the Hall constant were measured using the Van-der-Pauw method on doped samples. 10 lm thick silicon films deposited on graphite substrates at 1100°C manifest hole mobilities in the range of 69 cm2 V~1 s~1 evaluated at room temperature for majority carrier concentrations of 4.0]1017 at cm~3. From these data, we deduced a lower-limit minority carrier diffusion length in the Si layer of about 5—8 lm from the Einstein equation by assuming that the hole mobility is equal to the electron mobility in a polysilicon thin film. The electrical properties can be further improved by subsequent hydrogenation or by gettering of the impurities to reduce the defect densities in the layer and in the grain boundaries.

4. Conclusions The depositions of polysilicon layers on graphite substrates were carried out in an atmospheric pressure RTCVD reactor. The thin film layers were deposited at various growth temperatures and input partial pressures of the precursor TCS. The

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overall deposition rate ranged from 0.4 to 3 lm min~1. Low input partial pressure of TCS seems to be useful to avoid gas-phase nucleation and a rough surface structure. As for the electrical properties of the as-grown polysilicon films, they manifested hole mobilities of 69 cm2 V~1 s~1 for a carrier concentration of 4.0]1017 at cm~3. Ultimately, a preferred crystallographic orientation of (2 2 0) was found for polysilicon layer deposited on a graphite substrate from 900 to 1100°C in our RTCVD system. Hence, good quality thin films for solar cells application can be finally ensured by employing lower input partial pressures of TCS and by retaining growth temperatures between 900 and 1100°C resulting in a preferential crystallographic structure with large grain sizes. Additionally, subsequent layer passivation and the avoidance of a high-resistivity zone at the silicon—substrate interface should significantly contribute to improve the electrical properties of the final cell structure. Acknowledgements This work was funded by ADEME-ECOTECH and by the EU (JOULE-program) under contract No. JOR3-CT95-0080. The authors would like to thank Mr. J. Dugas (CNRS-LPSM, Marseille,

France) for the Hall mobility measurement and Mr. D. Sotta and C. Demanduit (LAAS, Toulouse, France) for intensive HRTEM investigations and helpful discussions.

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