semiconductor devices

Materials Science and Engineering, B9 ( 1991 ) 325-330

325

Characterization of high temperature annealing of InP by scanning photoluminescence and capacitance-voltage measurements of metal/ insulator/semiconductor devices J. Tardy, J. L. Perrossier, F. Krafft, S. K. Krawczyk and I. Thomas Ecole Centrale de Lyon, Laboratoire d'Electronique, d'Automatique et de Mesures Eleetriques, URA CNRS no. 848, 36 Avenue Guy de ('ollongue, BP 163-69131 Ecully Cedex (France)

D. Barbier INSA Lyon, Laboratoire de Physique de la Mati~re, URA CNRS no. 308, 20Avenue Albert Einstein, 69621 Villeurbanne Cedex (France)

Abstract The high temperature annealing of InP was studied. The aim was to define an easily reproducible post implantation annealing method which does not degrade the surface. The results reported here concern both conventional furnace annealing (CFA) and rapid thermal annealing (RTA). In both cases, InP substrates were annealed in a graphite cell with a proximity cap protection provided by another InP crystal. Characterization of the processed samples was carried out using optical microscopy, scanning photoluminescence and capacitance-voltage measurements of metal/insulator/semiconductor devices built on annealed InP (n-type) substrates. We found that both CFA and RTA can lead to good quality InP substrates. However, optimization is much easier and the reproducibility of the results is much better for RTA.

1. Introduction High temperature annealing is required to activate the dopants and to restore the crystallinity of implanted InP wafers. However, extreme care must be taken to avoid thermal degradation of the annealed substrates, which is due to phosphorus out-diffusion from the sample during the heat treatment. This problem has not yet been solved completely. Limited phosphorus loss was reported using a silicon wafer placed face-to-face with the sample [1, 2]. However, a previous report [3] has shown that a silicon contact proximity cap fails to provide good encapsulation. Another commonly used method is to cover the surface with either SiO 2 [4] or Si3N4 films [3]. Although the deposited insulating layers ensure better intimate contact with the annealed sample, stresses at the interface may be detrimental to the electrical properties of the substrate [5, 6]. Furthermore, out-diffusion of phosphorus [7] and in-diffusion of cap atoms [8] have been observed. The outdiffusion of phosphorus atoms can be reduced 0921-5 107/91/$3.50

using a phosphorus-doped plasma-deposited SiO 2 layer [9, 10] or simply by placing an InP crystal on the deposited insulating layer [11]. The presence of phosphorus overpressure is commonly expected to protect the surface against phosphorus out-diffusion from the sample. From thermodynamical and technological points of view, the simplest way should be to perform the annealing in a phosphorus ambiant from phosphine [12]. However, in practice, such a technique is almost never used, because of equipment cost and safety requirements. A solution, at least for the laboratory, is to provide phosphorus overpressure in a small volume. This can be achieved by proximity cap annealing carried out in a closed cell, in which an InP cap is not in contact with the sample to be annealed. Recent reports indicate good surface protection with this technique [13, 14]. Furthermore, an increase in phosphorus overpressure can be obtained with a tin-coated InP cap [15]. Characterization of annealed samples is usually carried out using optical or scanning © Elsevier Sequoia/Printed in The Netherlands

326 electron microscopies and capacitance-voltage (C-V) profiling, associated with the Hall effect, to determine the dopant profile and mobility of carriers in implanted and annealed wafers. However, these techniques are not sensitive enough to detect surface and subsurface thermal degradation, which may occur in non-implanted zones of the substrate during the heat treatment. For example, it has been shown using photoluminescence measurements, that heat treatment of InP crystals or InP insulator structures, even at temperatures much lower than those typically used for post-implant annealing, may induce defects and non-uniformities, which penetrate deeply into the bulk of InP [16]. Furthermore, C - V measurements of metal/insulator/semiconductor (MIS) structures built on annealed n-type InP substrates are expected to provide the most direct information on the electrical properties of the samples. Since the thermal stability of non-implanted regions of the sample is of paramount importance for device performance, this problem must be investigated in detail. The objective of this work was to examine conventional furnace annealing (CFA) and rapid thermal annealing (RTA), to define the annealing conditions which minimize thermal degradation of the annealed InP substrates. 2. Experimental details Experiments were carried out with ready-touse non-intentionally doped (n-type, ND = 101¢~ cm-3) InP wafers from Sumitomo Ltd. A home-made graphite cell was used. It contained the annealed InP sample and pieces of InP crystal, which acted as a proximity cap. For CFA, the InP cap was located a few hundreds of micrometres above the annealed sample. For RTA, better results were obtained by placing the cap beside the sample and by using a silicon lid on the top. RTA was carried out with an Addax R 1000 system under flowing N 2 at 800 °C for 15 s (temperature controlled with a thermocouple). CFA was carried out in a quartz open tube under N~. The graphite cell was located iriside a second quartz cell, to avoid direct contact of phosphorus overpressure with the N 2 flow. CFA was performed at 750 °C for periods of time up to 10 min. The processed samples were characterized by optical (Nomarski type) microscopy, scan-

ning photoluminescence (SPL) and C-V measurements of MIS devices built on annealed InP substrates. SPL measurements were performed at room temperature using a Scat Imageur (Scantek, France). The photoluminescence signal was excited with an He-Ne laser and detected with a silicon photodetector. The images presented here consist of 100 x 100 or 200 x 200 data points and were obtained in about 1-2 min. Before realization of the MIS structures, all the substrates were etched in a phosphoric acid solution, which removed about 300 A of the material. The gate oxide was a 1000 A thick AIzO 3 layer, deposited by electron beam evaporation. Gate contacts were obtained by thermal deposition of aluminium dots. High frequency C-V plots were recorded in the frequency range 1 KHz- 1 MHz. 3. Results and discussion 3.1. Conventional furnace annealing Figure 1 shows optical micrographs of the reference sample (Fig. l(a)) and of three samples annealed by CFA. In each case, a new ("fresh") InP wafer cap was used to obtain the same annealing conditions. Annealing at 750 °C for 10 min of a bare sample only induced a few defects (Fig. l(b)). In contrast, numerous defects were observed (Fig. l(c)), if the sample was covered with a 1000 A thick SiO 2 layer (electron-beam evaporated). This indicates that SiO2 does not protect the surface efficiently, even with phosphorus overpressure in the cell. We have noticed that a reduction in the annealing time to 3 min diminishes the defect creation effect (Fig. l(d)). We found that an InP cap used for one annealing cannot be used for subsequent annealings. This is illustrated by SPL results obtained on the above-described samples and on a sample annealed with a "used" InP cap. Figure 2 shows SPL images of the reference surface (Fig. 2(a)), of the sample annealed with a "fresh" InP cap (Fig. 2(b)), and of the sample annealed with a "used" InP cap (Fig. 2(c)). In both cases annealing was carried out at 750 °C for 10 min. Local depressions of the PL intensity on the reference sample are due to the presence of denuded zones around dislocations in the crystal [17]. Following the annealing with a "fresh" InP cap, the average PL intensity is reduced by a factor of 3.7, and the morphology of the SPL images is changed. In particular, the regions around the dislocations now

327

Fig. 1. Optical micrographs (500 × magnification) of CFA (at 750 °C) InP samples under proximity cap protection: (a) nonannealed reference sample; (b) 10 min annealing; (c) 10 min annealing (sample covered with a 1000 A thick deposited SiO2 layer); (d) 3 min annealing (sample covered with a 1000 A thick deposited SiO2 layer).

appear as hillocks on the PL images. In the case of the sample annealed with a "used" InP cap, the decrease in the average PL intensity is much more significant (about 9.1 times), and the regions around dislocations appear as wide depletions on the SPL image. Lowering of the average PL signal indicates a decrease in the effective lifetime of the minority carriers, which is due to the creation of new nonradiative centres during the annealing (complexes involving phosphorus vacancies). Although the creation of phosphorus vacancies is not completely avoided in the sample annealed with a "fresh" InP cap, their density is much lower than in the sample annealed with a "used" InP cap. Modifications of the morphology of SPL images after annealing (regions around dislocations) can be explained by the double role of dislocations during the annealing. If phosphorus out-diffusion from the sample is not very high (sufficient phosphorus overpressure), the regions around the dislocations are protected from the creation of phosphorus vacancies, owing to a spatial redis-

tribution of the excess phosphorus atoms, initially gettered at dislocations. In consequence, the decrease in the PL intensity around dislocations is less important than that of the "plateau", and the regions around dislocations appear as hillocks on PL images. However, the number of phosphorus atoms gettered at dislocations is limited. If the conditions of annealing favour stronger phosphorus out-diffusion from the sample (e.g. increased time of annealing, not sufficient phosphorus overpressure), the main effect of dislocations is different. The presence of crystal defects and local stresses increases the thermal decomposition of InP and exodiffusion of phosphorus atoms towards the surface. In consequence, the creation of phosphorus vacancies around dislocations is enhanced, and these regions appear as wide depletions on SPL images. The PL results are in good agreement with electrical characterization of MIS structures built on the annealed samples. Figure 3 shows that the C - V curves obtained on the samples annealed with a "fresh" InP cap (Fig. 3(a)) and with a

328

C/Cox

1,

~ U. Q.

~

I

•IOKHJ I~Hz

a

1MHz 0.1

I

(a)

0 era .,..,

i

-5

(a)

0 Q. m

(J

U

......

IOOKHz

~ I M H z

b 0.1 I 5

-5

!b) Voltage (V)

(b)

(c) Fig. 2. Pseudo three-dimensional SPL images (500 ~m x 500/~m) of (a) non-annealed reference sample; (b) sample annealed by CFA (750 °C for 10 min) with a "fresh" lnP cap; (c) sample annealed by CFA (750 °C for 10 rain) with a "used" lnP cap. The normalized average PE intensities are (a) 1, (b) 0.27 and (c) 0.11.

"used" cap (Fig. 3(b)). We have found that the C - V curves obtained on samples annealed with a "fresh" cap have roughly the same shape as those obtained on non-annealed substrates (large Fermi level excursion, low frequency dispersion and hysteresis). The apparent density of near-surface states is much higher in the case of samples annealed with a "used" InP cap.

Fig. 3. C- V characteristics of A1/AI2Os/InP MIS structures built on annealed InP substrates: (a) sample annealed by CFA (750 °C for l0 rain) with a "fresh" InP cap; (b) sample annealed by CFA (750 °C for l 0 rain) with a "used" InP cap.

In conclusion, we can state that good quality annealing can be carried out by CFA with a closed graphite cell and non-contact proximity cap with another InP crystal as the phosphorus source. Even though it is impossible to avoid completely phosphorus out-diffusion from the sample under these conditions (since the annealed InP sample is protected with another InP crystal, and both of them must lose some phosphorus), this effect is sufficiently small not to affect the C - V curves of MIS structures fabricated on the annealed substrates. However, we found it difficult to obtain reproducible results using this technique. This is attributed to the fact that the protective properties of the cap are strongly degraded during the annealing. In addition, this process is expensive, since a new InP cap must be used for each run.

3.2. Rapid thermal annealing Figure 4 shows optical photographs of three samples successively annealed by RTA (800 °C, 15 s) in the graphite cell without changing the inP

329

(a)

(b)

Fig. 4. Optical micrographs (500 x magnification) of samples annealed by RTA (800 °C, 15 s). Different samples ((a), (b) and (c)) were successively annealed without changing the lnP cap.

(c)

encapsulant from run to run. No optical degradation is observed on these samples. Figure 5 shows SPL images obtained on the above samples. We found that the average PL intensity on annealed samples was always lower than on the reference substrate. However, in contrast with the results obtained after CFA, the average PL intensity increased for the samples annealed with a used InP cap. The relative increase in the PL intensity for the successively annealed samples (without changing the cap)

correlated well with the improved electrical properties of these samples. The shape of the C - V plots, presented in Fig. 6, becomes sharper and the hysteresis is strongly reduced for samples annealed with a "used" InP cap. The sample annealed with a cap which was used twice before shows a C - V curve roughly the same as that

Fig. 5. Pseudo three-dimensional SPL images (500 ~m x 500/~m) of samples annealed by RTA (800 °C, 15 s). Different samples ((a), (b) and (c)) were successively annealed without changing the lnP cap. The normalized (with respect to the reference substrate) average PL intensities are (a) 0.2, (b) 0.25 and (c) 0.28.

330 C/Cox 1

0.1 -5

0

5

0

e 5

1st. annealing

1 ¢,j v

0 0 C .,.., 0 ca 0. ¢B

¢..)

0.1 -5 1

2nd.annealing

f

0.1 e

cell with a proximity cap protection provided by another InP crystal. SPL results indicated that thermal degradation of the substrates cannot be suppressed completely during the annealing, which results in the creation of non-uniformly distributed non-radiative recombinative centres in the annealed samples. Thus, such annealing procedures may still not be sufficient for the realization of minority carrier devices. We also found, from C- V characterization of MIS test structures built on the annealed crystals, that the concentration of these centres in the semiconductor surface region can be lower than the typical InP-insulator interface density of states. Thus, both CFA and RTA can lead to post-implant annealed substrates with a quality sufficient for the realization of such devices as InP MIS field effect transistors. However, in contrast with CFA, the protective properties of the InP cap are not degraded during RTA. In consequence, optimization is much easier and reproducibility of the results is much better for RTA.

3rd.annealing

-5

Voltage (V)

Fig. 6. C - V characteristics of samples annealed by RTA (800 °C, 15 s). Different samples ((a), (b) and (c)) were successively annealed without changing the lnP cap (1 MHz, sweep rate 40 mV s J, - left going voltage, - - right going voltage).

obtained on MIS structures built on nonannealed InP substrates. The above results are attributed to a more significant release of phosphorus from a used InP cap and can be explained by increased exodiffusion of phosphorus atoms from the crystal which contains lattice defects introduced by previous annealings. For CFA, the phosphorus loss from InP is much more significant; after the first annealing, the surface region of the cap is strongly phosphorus depleted, and the protective properties of the cap are degraded. Thus, for RTA (and in contrast with CFA) the protective properties of the cap are not degraded but improved during the annealing (we have not yet established the limits for this improvement). Probably as a result of this effect, we have noticed that RTA is much easier to optimize and is more reproducible than CFA. 4. Conclusions We investigated CFA and RTA of InP. In both cases, InP samples were annealed in a graphite

References 1 A. Quemerais, G. Jezequel, M. UHaridon, P. N. Favennec and M. Salvi, Electron. Lett., 26 (1990) 1119. 2 W. H. van Berlo and G. Langren, J. Appl. Phys., 66 (1989)3117. 3 M. D. Biedenbender, V. J. Kapoor and W. D. Williams, J. Vac. Sci. TechnoL A, 5(1987) 1437. 4 D. Kirilov, J. L. Merz, R. Kalish and A. Ron, Appl. Phys'. Lett., 44(1984) 609. 5 L. S. Vanasupa, M. D. Deal and J. D. Plumner, Appl. Phys. Lett., 55(1989)274. 6 G. J. Valco and V. J. Kapoor, J. Electrochem. Soc., 134 (1987) 569. 7 C. W. Farley and B. G. Streetman, J. Electrochem. Soc., 134 (1987) 498. 8 C.W. Farley, T. S. Kim, B. G. Streetman, T. Lareau and P. Williams, Thin Solid Films, 146 (1986) 221. 9 G. Post, P. Dimitriou, A. Falcou, N. Duhamel and G. Mernant, J. Phys. (Paris), 49(1988)223. 10 B. Molnar, Appl. Phys. Lett., 36 (1980) 927. 11 M. V. Rao and R. K. Nadella, J. Appl. Phys., 67(1990) 1761. 12 Y. Hirota, M. Okamura, T. Hisaki and O. Mikami, Electron. Lea., 21 (1985)686. 13 S. J. Pearton and R. Caruso, J. Appl. Phys., 66 (1989) 664. 14 S. J. Pearton, A. Katz and M. Gena, J. Appl. Phys., 68 (1990) 2482. 15 J. D. Woodhouse, M. C. Galdis, J. E Donnelly and C. A. Armiento, Appl. Phys. Lett., 51 (1987) 186. 16 J. Y. Longere, K. Schohe, S. K. Krawczyk, R. Schuetz and H. L. Hartnagel, AppL Surf. Sci., 39 (1989) 151. 17 S. K. Krawczyk, K. Schohe and C. Klingelhoefer, to be published.