Microelectronics Journal 45 (2014) 1566–1574
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Co-design of a wideband double-balanced active mixer and transformer-based baluns for 77 GHz radar applications André Mariano a, Bernardo Leite a,n, Thierry Taris b, Jean Baptiste Bégueret b a b
GICS-UFPR, Department of Electrical Engineering, Federal University of Paraná (UFPR), Curitiba, Brazil IMS Laboratory, CNRS UMR 5218, University of Bordeaux, Talence, France
art ic l e i nf o
a b s t r a c t
Article history: Received 14 March 2014 Received in revised form 7 August 2014 Accepted 16 September 2014 Available online 12 October 2014
This paper presents a 130-nm BiCMOS active mixer dedicated to 77 GHz automotive radar applications. The architecture is based on a double-balanced Gilbert cell with integrated transformer-based baluns. Interconnections between devices, capacitor accesses and Tee-junctions are modeled using EM software in order to improve the simulation accuracy. Focusing on wideband operation, the transformer-based baluns are considered as part of the input matching network. Sizing of the transformer is detailed along with its amplitude and phase balance performances. The design of the input matching circuit integrating the transformer is presented, providing a 12-GHz bandwidth. Measured noise figure, conversion gain and compression point of the mixer are displayed and compared to the state of the art. & 2014 Elsevier Ltd. All rights reserved.
Keywords: mm-waves Mixer Gilbert cell Transformer Balun
1. mm-wave mixer for radar applications Next car generations are expected to be safer. To do so, a combination of short and long-range radar modules will surround the automobile. To address these two applications, a frequency band of 76 to 81 GHz must be covered. Merging recent improvements in SiGe BiCMOS technologies (transistor with transition frequency beyond 200 GHz [1,2]) and an advanced design methodology (including EM simulations), this paper proposes the design and implementation of a mm-wave mixer suitable for the two scenarios. Among the most critical building blocks in a receiver front-end is the mixer. It performs frequency down-conversion from the radiofrequencies (RF) to the intermediate-frequencies (IF). This operation alleviates the specifications of the receiver back-end and enables the analog-to-digital conversion at low frequencies. Linearity is of a major importance in mixers since the frequency shift is a typical non-linear operation [3]. To help in lowering the noise figure (NF) of the system, the multiplier, located after the Low-Noise Amplifier (LNA), also needs to achieve gain and a suitable NF. Passive mixers may be a power-efficient alternative in mm-wave receivers, but they do not provide conversion gain. The most popular active mixer topology is the Gilbert cell [4], which provides a large conversion gain and a high linearity. The Gilbert cell can be implemented in a single or double-balanced topology. Despite their higher power consumption in comparison to single-balanced mixers, double n
Corresponding author. Tel.: þ 55 41 3361 3509. E-mail address:
[email protected] (B. Leite).
http://dx.doi.org/10.1016/j.mejo.2014.09.008 0026-2692/& 2014 Elsevier Ltd. All rights reserved.
balanced topologies present a significantly improved port-to-port isolation, which is mandatory in radar applications. The design flow of such building block is well defined in RF domain but its implementation in a silicon technology for mm-waves is challenging. A second point of interest is the 5 GHz bandwidth to be covered, which requires a specific design approach. These two points are particularly addressed in this work.
2. Circuit design The proposed mixer presents an active core with a differential architecture. It is designed in a high-speed 130-nm SiGe BiCMOS technology. Transformers are used to convert the single-ended inputs RFin and LOin into a differential form, while taking part into the respective input matching networks and providing ESD protection, as depicted in Fig. 1. The high-frequency application of the mixer results in merging conventional RF circuit design with microwave 3D electromagnetic (EM) simulations. A great interaction between electrical and electromagnetic simulations is required in order to optimize transistors sizing and EM coupling. These design considerations are detailed hereafter. 2.1. Mixer core design Fig. 2 depicts a simplified schematic of the proposed mixer core. It is based on a double-balanced active topology (Gilbert cell)
A. Mariano et al. / Microelectronics Journal 45 (2014) 1566–1574
consisting of a transconductance stage (T1,T2) which converts the input RF voltage into current and a switching stage (T3–T6), that switches the RF current between the two output IF nodes. Designing at mm-waves requires the modeling of all interconnections and accesses to devices (transistors, capacitors, resistors, etc.). Hence, in addition to these devices, Fig. 2 also illustrates transmission lines (“TL”), Tee-junctions (“T”), and crossing points (“X”).The input stage matching is performed using transformerbased baluns, TLs and AC coupling capacitors (Section 2.3). The biasing voltages VbLO and VbRF are provided by two current mirrors. The lines TL5 degenerating the emitter of T1 and T2 linearize the RF input stage. A trouble node in a fully balanced topology is the connecting point between the transconductor and switching stages. Indeed, the parasitic capacitors contribute to lower both
Fig. 1. Block diagram of the proposed mixer.
Fig. 2. Schematic of the proposed mixer core.
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the isolation between LO and RF ports and the conversion gain (CG). This phenomenon, which increases with the operating frequency, is compensated by interstage matching TL10–TL11, which resonates with the local parasitics at the RF frequency. The sizing of T1 and T2 is led by the optimal current density for a large gain. The CG of a Gilbert cell can be expressed as reported in Eq. (1). It increases with the improvement of Imixer current and Rc. They are fixed to 12 mA and 115 Ω, respectively. 2 CG ¼ :g m1=2 :Rc
ð1Þ
π
Considering that the switching is almost perfect, which means that T3–T6 are as small as possible, the NF is mainly supported by the transconductor stage. To reduce the NF, the base-emitter area as well as the number of fingers is set large. Operating at 80 GHz, the wavelength of the signal, roughly 1 mm, is in the range of the circuit (0.57 mm2). As a consequence, interconnections and metal paths behave rather like distributed devices than mere RC type elements. To address this point, customized models were developed, using EM simulations and TLs available in the Design Kit (DK). 1) Layout interconnections can be modeled as TLs of corresponding metal levels and geometries. An example, concerning the connection between two lumped resistors, is reported in Fig. 3. Tee-junctions (“T”) and crossing points (“X”) are not available in the DK and the modeling using just TLs is not trivial. Therefore, customized EM simulations are required to characterize them. The chosen simulator is ANSYS HFSS [5], a finite element based 3D field calculator. Depending on the size and complexity of the simulated structures, such simulations may require a considerable amount of computational resources and simulation time. An efficient use of these tools must therefore include adequate simplifications of the 3D simulation models. Such models should include the silicon substrate, dielectric and metallic layers. Each material constituting those objects is described in terms of properties such as dielectric permittivity and loss tangents, magnetic permeability and electrical resistivity. Physically, these characteristics are known to present a certain dependence on frequency, especially when mm-waves are concerned. In our study, nevertheless, these material properties are assumed constant over frequency. Another simplification, which is arguably the most critical in this context, concerns the dielectric stack. As copper deposition is implemented through a damascene process in the adopted technologies, the low-permittivity dielectric layers are intertwined with the respective barrier levels. These along with additional silicon nitride layers constitute a rather complex stack, which accounts significantly for simulation time. It is thus clearly desirable to employ a simplified dielectric profile in EM simulations. The adopted approach consisted hence in considering solely two equivalent dielectric layers between the substrate and the top metal in the back-end and computing the equivalent dielectric permittivities as in [6].
R1
TLm1
R2
W L
160Ω
160Ω
Fig. 3. Interconnection between two resistors (a) modeled as a T-line (b). All interconnections must be modeled and included in simulations.
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In Fig. 4, a close-up of the mixer core layout is shown. It can be observed that the LO and RF paths intersect at an “X”, due to the cross-coupled connections between the transistors T3 and T6 in the switching stage. A strong coupling is observed, lessening the isolation between LO and RF ports. Modeling this intersection with HFSS, one can demonstrate that reducing the width of these paths at the crossing point allows minimizing the coupling effect. Fig. 5 depicts the simulation results for three different path widths. The simulated results show that port-toport isolation is improved by more than 10 dB when the path width decreases from 4.4 mm to 1 mm. In the proposed mixer, paths with 1 mm width are implemented in the intersect points. 2) MIM capacitors terminations must be considered as Aluminum (AP)/Metal6 (M6) TLs and modeled consequently. An example, relative to a 3pF capacitor, is depicted in Fig. 6. 3) RF pads are divided into two parts following an ideal line across the center wherein the test probe is located as shown in Fig. 7. As for MIM capacitors, a TL models the connection between the probe and the circuit, whereas an open TL represents the outer side of the pad. Concerning the DC pad contribution, it can be neglected if enough DC decoupling is provided.
38μm
2.8μ m
4.9μ m
2.8μ m
2.8μm
TOP
AP M6
BOTTOM
TLap_m6
TLap
Cap
TLap
TLap_m6
3pF Fig. 6. 3pF MIM capacitor area (a), section (b), and its equivalent model (c). Capacitor terminals are represented as TLs.
2.2. Balun design
Probe
The use of balanced topologies in integrated circuits presents several advantages over their single-ended counterparts. The symmetry allows an increased immunity with respect to substrate coupling, digital circuitry, and power supply noise, as well as a better tolerance to non-perfect 0-V grounds.
AP
Probe
48μ
M6 27μm
27μm
54μm Probe
«T»
TLap_m6
TLap_m6
Fig. 7. RF Pad section (a), area (b), and its equivalent model (c). Pads are modeled as two T-Lines, one on each side of the test probe.
4.4 µm
1 µm
«X» Fig. 4. Layout close-up of the double-balanced mixer, highlighting the Tee-junction (“T”) and crossing point (“X”).
Isolation [dB]
-25
-30
-35
-40
50
60
70 80 Freq [GHz]
90
100
Fig. 5. Isolation between RF and LO paths at crossing point as a function of path width.
However, many integrated circuits are required to present their inputs or outputs in a single-ended form. In such cases, it is necessary that an element allowing conversion between singleended and differential modes be introduced. Hence, the benefits of balanced topologies will only be applicable if these elements do not introduce significant insertion loss and signal distortion. For this reason, a correct design of balanced to unbalanced converters (baluns) is of utmost importance. In radiofrequency domain, both active and passive baluns are commonly used. For mm-waves, nevertheless, the use of active structures becomes more troublesome as the delay introduced by the transistors yields a significant negative effect on the phase balance of the balun output [7]. Among passive-based solutions, three categories stand out: the LC-based, the transmission-line based, and the transformer-based baluns. LC baluns rely on the resonance of inductive and capacitive components thus performing the balance at a single frequency. An alternative to enhance the bandwidth is the use of linebased baluns. Two structures are prominent: the Marchand balun [8,9], and the rat-race balun[10]. Marchand baluns combine two pairs of coupled λ/4 lines, one of which is open-ended and the two others are shorted. Rat-race baluns, adapted from rat-race couplers, are set by 4 ports in a circular disposition with a total length of 3λ/2. In the 60– 100 GHz frequency band, the signal wavelength is in the millimeter range, making such solutions considerably cumbersome for silicon integration. Transformer-based baluns, on the other hand, present a compact implementation. In addition, the broadband behavior of the
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coupling between primary and secondary windings makes them suitable for wideband operation. The implementation of a double-balanced mixer requires the design of a transformer to operate as a balun. Three essential features must be considered to evaluate their performance: insertion loss, amplitude balance, and phase balance. Considering Port 1 represents the single-ended terminal, and Ports 2 and 3 represent the differential ports, the insertion loss will be obtained from the magnitude of the scattering parameters S21or S31. For a perfect balun, these parameters would be equal to 3 dB, which corresponds to the 2-way power splitting. Also, an ideal balun would have the same magnitude but opposite signs for these two ports, i.e., the phases of S21 and S31 would have a 1801 difference. Hence, the measures of insertion loss, amplitude and phase imbalance are computed as follows: S31 Insertion Loss ¼ ð2Þ 2 S31 Amplitude Imbalance ¼ S21
ð3Þ
S31 Phase Imbalance ¼ ∠ S21
ð4Þ
The proposed balun presents an octagonal topology with center-tapped differential winding, as shown in Fig. 8. This point, which is supposed to be AC-grounded, simultaneously represents the inductive, capacitive and resistive center of the corresponding winding. Such connection enables a short circuit for commonmode signals without affecting the differential operation. The need of this central ground connection is illustrated in Fig. 9. It compares HFSS EM simulations of the same transformerbased balun with and without a center tap. It demonstrates that the non-tapped structure provides balanced outputs up to 10 GHz whereas the tapped configuration achieves a low and flatter phase and amplitude imbalance up to 100 GHz. Once the topology of the transformer is defined, its dimensions are optimized to ensure an effective balun operation. The impact of the trace width for a fixed diameter is first observed. Three values were studied: 4.4 mm, 8 mm and 12 mm. Fig. 10 presents the EM simulation results of these three configurations. As traces are drawn narrower, the capacitive components of the transformer are reduced whereas the inductance and sheet resistance are increased. This leads to a decrease on the windings quality-factors, which is reflected in the insertion loss of the balun. On the other hand, it allows a clearly wider frequency behavior of the transformer S-parameters, expressed in terms of insertion loss and amplitude/phase imbalances. This is an important advantage as it considerably increases design robustness, palliating the influence of process variations or inaccurate modeling of
Fig. 8. Topology of the designed transformer-based balun.
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Fig. 9. Simulated amplitude and phase imbalances for center-tapped and non center-tapped transformers.
Fig. 10. Simulated (a) insertion loss, and (b) amplitude and phase imbalances for different conductor width values.
interconnections. Finally, it is observed that the trace width has little influence over amplitude and phase balances, even though the results for narrow traces are shown to be flatter. Hence, the value of 4.4 mm was adopted for the trace width in our design. Having defined the conductor width, the design proceeded by dimensioning the transformer average diameter. In Fig. 11, the simulated insertion loss, amplitude and phase balances are evaluated for three different diameters: 60 mm, 70 mm, and 80 mm. It is observed that, for the same trace width, the larger the transformer is, the lower its insertion losses are. A 70-mm diameter achieves an insertion loss 0.5 dB higher than an 80-mm, whereas a 60-mm diameter provides an insertion loss as high as 2.9 dB. The 80-mm balun, however, presents the worst amplitude balance. The best tradeoff is hence the 70-mm diameter, which presents the best combination of amplitude and phase balances as well as the flattest balance response. The designed balun presents a total inductance of 140 pH in each winding and a coupling coefficient of 0.67. Its dimensions, including feed lines and the specified distance between the conductors and the surrounding ground plane, is 190 150 mm². Table 1 compares the performance of this work to mm-wave baluns previously described in the literature. Our balun presents
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the broadest bandwidth and the best phase balance while occupying the smallest surface among the considered components.
following equation:
2.3. Impedance matching
Finally, the balun was represented by the simplified model of Fig. 13c. Each transformer winding is represented by a series frequency-independent resistance along with the magnetizing and leakage portions of the respective self-inductances. In addition, as the primary is located between the secondary and the silicon substrate, the capacitance to the substrate is only represented at the primary side. In this equivalent model, we refer all impedances to the secondary of the ideal transformer. Its transformation ratio T is calculated as follows: sffiffiffiffiffi LP T ¼ kU : ð6Þ LS
One main specification for the designed circuit is its wideband behavior. This specification is expressed as return losses better than 10 dB in the 76–81 GHz range. For robustness reasons, this constraint was extended for a bandwidth between 74 and 86 GHz in our design. As previously detailed, the RF input of the designed mixer presents a common emitter topology with an inductive degeneration. In order to perform the input matching, capacitors were introduced in series at the primary and secondary sides of the balun, and their connections with the circuit elements were performed using transmission lines. Fig. 12 illustrates the topology of the input matching network. Simplified models, reported in Fig. 13, are adopted for each element featuring the matching network. At the operating frequency, the transmission lines behave inductively and were represented by an equivalent inductor (Fig. 13a). The emitter degenerated input transistors T1 were replaced by an equivalent series combination of the degeneration inductance LTL, the baseemitter capacitance Cπ, and the equivalent input real impedance RT (Fig. 13b). RT accounts for the transistor effect according to the
RT ¼
g m0 U LTL Cπ
ð5Þ
As the transistor, capacitors, and transmission lines models are combined with this transformer representation, we obtain the T-shaped 6th order bandpass filter network of Fig. 14. Its elements are then computed as follows: Ra ¼
RP
La ¼
ð7Þ
2UT2 1k
2
ULP þ LTL1 þ LTL2
ð8Þ
2UT2
C a ¼ 2T 2 UC 1 2
Lb ¼
k ULP 2UT
2
ð9Þ 2
==
k U LS 2
ð10Þ
C b ¼ 2T 2 UC sub
Lc ¼ Cc ¼
ð11Þ
2 1 k U LS 2
þ LTL3 þ LTL4 þ LTL5
ð12Þ
1 ð1=C 2 Þ þ ð1=C π Þ
Fig. 11. Simulated (a) insertion loss, and (b) amplitude and phase imbalances for different diameter values.
ð13Þ
Fig. 12. Input matching network of the designed mixer.
Table 1 Summary of mm-wave balun performances. Ref.
Topology
Technology
Frequency (GHz)
AI (dB)
PI
IL (dB)
Surface (mm²)
[8] [9] [10] [11] [12] [13] This work (simulation)
Marchand Marchand Marchand Rat-race Line-based Transformer Transformer
GaAs 0.18 mm CMOS 0.13 mm BiCMOS 0.13 mm BiCMOS InGaP/GaAs 0.13 mm CMOS 0.13 mm BiCMOS
26–55 25–65 45–75 57–71 15–45 55–65 60–120
o1 o 1.5 o 0.5 o 0.6 o1 o3 o1
o 51 o 101 o 61 o 101 o 5.51 o 101 o 31
o2 o7 o2.5 o3.2 o7 3 o3
0.51 0.55 0.09 0.28 0.04 0.05 0.03
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Fig. 13. Simplified models for (a) transmission-lines, (b) degenerated transistor, and (c) transformer-based balun.
Fig. 14. Simplified model of the input matching network.
Rc ¼
RS g m0 þ U LTL5 2 Cπ
ð14Þ
The analytical calculation of the reflection coefficient S11 follows Eq. (15), where Zin represents the input impedance of the network and Rsource the source resistance for the measurements, typically 50 Ω. S11 ¼
Z in Rsource Z in þ Rsource
ð15Þ
If we define Za as the combination of Ra, La and Ca, Zb as the combination of Lb and Cb, and Zc as the combination of Lc and Cc,
then: S11 ¼
Z a þ Z b ðZ 2b =Z b þZ c þ Rc Þ Rsource Z a þ Z b ðZ 2b =Z b þZ c þ Rc Þ þ Rsource
ð16Þ
The sizing of the components obeyed the following criteria. The transformer was first designed to provide the best tradeoff between balance and insertion loss, according to Section 2.2. This is especially important, since the simplified model here described assumes balanced differential ports. Then, the input transistors and their degeneration lines were dimensioned in order to address linearity and conversion gain concerns. Hence, the degrees of freedom in order
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Table 2 Summary of the component values in the matching network. La Ca Ra
102 pH 55 fF 12 Ω
Lb Cb T
22 pH 202 fF 0.67
Lc Cc Rc
113 pH 37 fF 80 Ω
Fig. 15. Bandwidth and lower limit frequency of the matching circuit in function of the transmission-line inductance values.
Fig. 17. Micrograph of the mm-wave mixer.
Fig. 18. Simulated and measured CG as a function of RF frequency (PLO ¼ þ 1 dB m). Fig. 16. Bandwidth and lower limit frequency of the matching circuit in function of the capacitance values.
to achieve the desired input matching were the capacitors C1 and C2, and the transmission line pairs TL1–TL2 and TL3–TL4. These values impact exclusively the impedances Za and Zc in Eq. (16). Figs. 15 and 16 show how the dimensions of these components affect the width and the lower limit flow of the matched frequency band. The dimensions of TL1 and TL2, for instance, display a monotonic trend for which the lowest inductance values ensure the broadest band. Hence, these lines were designed in order to provide the smallest possible values within layout limitations, which led to a length of 32 mm and a 14-pH inductance. The remaining components were then conjointly set to allow a 12-GHz bandwidth between 74 and 86 GHz. The defined values are therefore 35 pH for the combined inductance of TL3 and TL4, 70 fF for C1, and 60 fF for C2. Table 2 summarizes the defined values of all elements in the circuit of Fig. 14. 2.4. Measurement results Fig. 17 depicts the micrograph of the designed mixer. The chip takes place within 0.57 mm2 including pads. All measurements
were done on wafer at 20 1C with 110-GHz GSG probes. The RF (75–80 GHz) and LO (80 GHz) signals are provided by an Agilent PNA network analyzer E8361A and an Agilent PSG signal generator E8257D, respectively. The IF output is collected using an Agilent PSA spectrum analyzer E4440A via an external balun. The proposed active mixer consumes 80 mW under 2.5 V. The measured and simulated conversion gain (CG) as a function of the RF frequency is presented in Fig. 18. For this measurement, the LO frequency and power are set to 80 GHz and þ1 dBm, whereas RF power is set to 29 dBm. The CG varies from 17.2 dB to 18.5 dB with a maximum at 77 GHz. Most of the 1.3 dB ripple is introduced by the variable attenuator inserted between the LO port and the PSG generator. Isolation between LO and RF ports is presented in Fig. 19. Isolation is shown to be better than 40 dB in the whole 60–100 GHz range. The measured CG and single-sideband noise figure (NFSSB) as a function of LO power (PLO) are reported in Fig. 20. Both characteristics improve with LO power and saturate for LO values exceeding þ1 dBm. The maximum measured CG is 18.5 dB, achieved at 77 GHz. The lower value of NFSSB, 13.8 dB, is obtained for these operating conditions. According to Section 2.1, the NF of the mixer
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Table 3 Summary of 77-GHz Mixer performances.
Fig. 19. Measured LO-to-RF port isolation.
CG and NFSSB [dB]
22 CG NF
20 18 16 14 12 10
-6
-3
-1
1
4
PLO [dBm] Fig. 20. Measured CG and NFSSB of the mixer as a function of LO power (fRF ¼ 77 GHz and fLO ¼80 GHz).
Ref.
Tech.
NFSSB (dB)
CG ICP1 Vcc (dB) (dB m) (V)
[3] [13] [14] [15] [16] [17] This work
SiGe Bipolar SiGe Bipolar SiGe Bipolar SiGe BiCMOS SiGe BiCMOS CMOS SiGe BiCMOS
11.2 14 16.5 18.4 16 21 13.8
15 24 11 13.4 15.5 6.8 18.5
2.5 30 0 12 3 7 13
FoMmixer PDC 2 1 (mW) (dB V A )
5.5 335 5 300 5.5 413 4.5 176 5.5 187 1.2 3 2.5 80
33.85 63.76 44.56 52.69 41.37 30,16 40.56
RF input power. In this measurement, the RF and LO frequency are 77 GHz and 80 GHz, respectively. The LO power was set to þ1 dBm. The circuit achieves an ICP1 of 13 dBm thanks to the TL5 degeneration. Approximately the same values are obtained varying the LO frequency from 78 to 82 GHz, which corresponds to an IF frequency sweeping from 1 to 5 GHz. The upper limit of the IF band is limited by the output matching bandwidth of the buffer. The measured return losses are depicted in Fig. 22 and compared to the simulated results obtained from the circuit of Fig. 14. This result highlights how the proposed approach captures the behavior of the circuit in terms of input matching. As predicted, the reflection coefficient is inferior to 10 dB for the whole range comprised between 74 and 86 GHz. Measurement results of the reported circuit, along with other SiGe 77-GHz mixers are listed in Table 3. A Figure of Merit (FoM) combining their most relevant metrics is defined in (17). ! 10CG=20 :10ICP1=10 FoMmixer ¼ 10 log ð17Þ 10NF SSB =10 :P DC :V cc Considering the SiGe circuits, the proposed mixer presents the lowest power consumption and the second highest conversion gain, resulting in the second best FoM. One CMOS mixer is included in the comparison as well, in order to illustrate the fundamental differences to bipolar designs. Whereas the CMOS circuit exhibits a drastically reduced power consumption, it cannot attain a sufficiently high conversion gain. Moreover, the noise figure in the CMOS realization is significantly degraded. Therefore, the design proposed in this work presents an interesting tradeoff between power consumption, and gain and noise performances.
Fig. 21. Measured ICP1 (fRF ¼ 77 GHz, fLO ¼80 GHz and PLO ¼ þ 1 dB m).
Fig. 22. Measured and simulated reflection coefficient for the designed mixer input network.
core can be improved by changing the current density in the transconductance stage. The linearity has been evaluated by measuring the inputreferred compression point (ICP1). The IIP3 was not measured since no equipment could provide the adequate two-tone test. Fig. 21 shows the plot of the IF output power as a function of the
3. Conclusion This paper presents the circuit design of a double balanced down-converter mixer dedicated to automotive short and longrange radar applications. The adopted technology was 130-nm BiCMOS from STMicroelectronics. As the input ports of the active core of the mixer present a differential form, a transformer has been designed to operate as a balun. The balun displays a very wideband behavior, presenting an amplitude imbalance better than 1 dB, a phase imbalance inferior to 31 and an insertion loss lower than 3 dB in the whole 60–120 GHz range. The developed balun was then incorporated into the mixer's input matching network. The design of this network was carried out using an alternative simplified transformer model, associated to transmission lines and capacitors. A 12-GHz bandwidth was then achieved, corresponding to a reflection coefficient lower than 10 dB in the 74–86 GHz range. Thanks to the low-loss and balanced performance of the transformers, the mixer presents a good trade-off between gain, noise figure and power consumption. It reaches a measured conversion gain and a SSB noise figure of 18.5 dB and 13.8 dB respectively over a 74 to 81 GHz range. The power consumption is only 80 mW under 2.5 V and the ICP1 is 13 dBm
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for a RF frequency of 77 GHz. These measurement results rank the mixer as the second best global performance among the reported state-of-the-art 77-GHz SiGe mixers. It is as well noteworthy that power consumption is the lowest reported among bipolar mixers. References [1] S.P. Voinigescu, D.S. McPherson, F. Pera, S. Szligayi, M. Tazlauanu, H. Tran, A comparison of silicon and III–V technology performance and building block implementations for 10 and 40 Gb/s optical networking ICs, Int. J. High Speed Electron. Syst. 13 (2003) 27–57. [2] P. Chevalier, B. Barbalat, M. Laurens, B.Vandelle, L. Rubaldo, B. Geynet, S. P. Voinigescu, T.O. Dickson, N. Zerounian, S. Chouteau, D. Dutartre, A. Monroy, F. Aniel, G. Dambrine, A. Chantre, High-speed SiGe BiCMOS technologies:120-nm status and end-of-roadmap challenges, in: Proceedings of the IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Jan. 2007, 18–23. [3] S. Trotta, B. Dehlink, H. Knapp, K. Aufinger, T. F. Meister, J. Bock, W. Simburger, A. L. Scholtz, Design considerations for low-noise, highly-linear millimeterwave mixers in SiGe bipolar technology, in : Proceedings of the 33rd European Solid State Circuits Conference, Sept. 2007, 356–359. [4] B. Gilbert, A precise four-quadrant multiplier with subnanosecond response, IEEE J. Solid State Circuits SC-3 (N4) (1968) 365–373. [5] Ansoft Corporation. High frequency structure simulator HFSS, version 11, 2007. [6] A. Kraszewski, Prediction of the dielectric properties of two-phase mixtures, J. Microw. Power Electromagn. Energy 12 (3) (1977) 215–222. [7] Y. Wang (Ph.D. dissertation), Millimeter Wave Transceiver Frontend Circuits in Advanced SiGe Technology With Considerations for On-Chip Passive Component Design and Simulation, Cornell University, 2006. [8] S. Lee, H.T. Kim, S. Kim, Y. Kwon, K.S. Seo, A wideband MMIC-compatible balun using offset broadside air-gap coupling, IEEE Microw. Wirel. Compon. Lett. 14 (3) (2004) 92–93.
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