Control Design Procedure Based on Modified Delta Form for Implementation

Copyright ~ IFAC Computer Aided Control Systems Design, Salford, UK, 2000

CONTROL DESIGN PROCEDURE BASED ON MODIFIED DELTA FORM FOR IMPLEMENTATION Tatsu Aoki

Department of Electrical Engineering Tokyo Metropolitan College of Technology 1 - 10 - 40 Higashi-Ohi, Shinagawa-ku, Tokyo 140 - 0011, Japan

Abstract: Tlus paper considers the computer based design procedure that reflects the latest theoretical development of the delta fOllTI. A fixed-point implementation of a delta fOl1n aclueves poor peli"onnance due to underflow and overflow in the delta inverse operations. To solve tlus problem, a new modified delta fOlm is proposed based on the methodology of Pulse Width Modulation (PWM) . The dynamic range of the calculation becomes twice or more. Then, the implementation procedure by using MATLAB/SIMULINK is described generally. Finally, the simulated resull~ are presented to show the practicality and effectiveness of the proposed algorithm . Copyright@2000 IFAC Keywords: tvlicroprocessor control, Implementation, Operators, Pulse width modulation, Control system design, Nonlinear control systems, PID controllers

I.

I~'TRODUCTION

plinciple is based on the metilOdology of Pulse Width Modulation (PWM). Because the quantization step becomes 0.5,0.25, etc. in the integral calculation step, the dynanlic range of the calculation becomes twice or more. The input-output relation of the delta inverse operation is shown in Fig. 1 after a hundred times iterations. The calculation is executed at 8bits fixedpoint aritlunetic and the sampling period T is set to be the quantization step. Second, time scales T1 - Tn , wluch is defined as design parameters, are introduced to prevent overflow in 11th-order controllers. Because an usual delta operator is divided by a sampling peliod T. it is difficult to express the algOlitiun coefficients in nanow dynamic range of fixed-point aritimletic . Simulations showed that the numerical advantages of VM.M . were verified for digital filters .

In order to realize quicker and precise motion, lughspeed sampling is required in modem mechatronics applications . It has been shown that a numelical sensitivity of a control algOlithm at lugh-speed sampling can be greatly reduced by a delta fonn(Agarwal and Bunlls, 1971), (Goodall, 1985), (Middleton and Goodwin, 1986), (Goodall, 1989), (M.iddleton and Goodwin. 1990) , (Goodall, 1990), (Goodwin et al., 1992), etc . On the other hand, a fixed-point implementation of a control algOlitiun is usually adopted for an induslIial application. since it is faster. cheaper and lower power consumption than floating-point implementation. Thus. a control system design based on fixed-point aritlunetic is necessary in induslIial sectors . Howen~r. a delta fonn aclueves poor peIi"onnance due to underflow and overflow in the delta inverse operations with fixed-point aritlunetic.

Thus. in tlus paper the new control design procedme based on modified delta fonn using MATLA.B'SI~fL'LINK is described generally. Fixed-Point Blockset is available for fixed-point simulation within SIMCLINK. In order to illustrate the effectiveness of the proposed methodology, a PID controller is considered. This procedure can be extended to nth-order controller easily.

To solve tlus problem, a new modified delta fonn was proposed (Aoki and Furukawa, 1996)(Aoki et al., I 997)(Aoki, 1999). First, a new integral calculation method named Variable ~vlodulation Method (VM.M.) is proposed to reduce OCCUlTence of underflow. The 155

2.

CONYEl'.'TIO~AL

DESIGN PROCEDURE

120 80

2.1 Derivatioll of control algorithm

..., ...,5. o;:l

The prD controller transfer function is given by (1).

H(s ) = kp ( 1 + 1

TdS

1 )

+ -T + a T' d.1 ,S

(1)

40

0 -40 -80

-120

where kp is proportional gain, Td is derivative gain, T, is integral gain, and a is 0.1 . The transfer function is discretized by using zero-order hold.

-100

-50

0 Input

50

100

Fig. 1. Delta inverse operation

(2) r

where

+ ~)

k = kp (I

T

a, = - ( 1 + e- ;;r;;- )

Conventional controller

T

Augmented plant

a2 = e - ;;r;;-

b, = -

lh-

=

Q~' (~ + (1

_Q

a-- l

- f) + e - ~)

(! + (1 - L) a

e-

T.

n

Fig. 2. PID controlling system(Sh.ift fonn}

~d )

A block diagram of a controller is the canonical direct fOl1n 2 because the canonical direct fOlm 2 is usually adopted in a delta operation. From (2) a control algolitlun based on shift operator is delived. m( ) represents rounding.

From Fix.ed·Polnt2

Xk = ek -1I1 (a,xk-Il -1I1 ( a2 x k-2) lIk Uk

= Xk + m (b,xk_ l ) + m ( b 2x k- 2) = lI1 (k lid

Fig. 3. Block diagram for exact tmncation (3) 1'6384.321

Xk - 2 = Xk -- ' Xk -·l = Xk

2.2 Design procedure (Step 1) Modeling a plant using floating-blocks As an illustration, the design of a computer hard-disk rea(\twlite head position controller(Grace et al., 1990). The transfer function of the head is shown as follows. K,

H(s ) = IS2 + Cs + K

Fixed-Point Constant'

Fig . 4 . Gain block with exact rowlding

(4)

where I is the inertia of the head assembly, C is the \'iscous damping coefficient of the bemings, K is the retum spling constant, and K, is the motor torque constant. The values I 0 .OIkgm 2 , C O.OO-l NII1 !( rad ! s), K 10 NIIl ! rad , and K, 0.05 NIII ! A are used. Because a plant seems to be equi\'arent to COIUlect a plant with the filter ( I + : - ' )/ 2 in selies at the proposed algOlithm , a augmented plant is defined as shown in Fig. 2.

In addition, sampling peliod is set to be 0.5 ms from step response. (Step 3) Scaling From step response using usual floating-point blockset the maximum value of the intemal \'alue Xk can be obtained . Word length of input, output, intemal vmiabies, coefficients of the algorithm are supposed to be all signed I6bits. Also, binary point is located at LSE. The scaling factor for the controller input is obtained as 2048 (= 32768 i x max ).

(Step 2) Adjusting the tIme gain factors The tlu-ee gain factors are detennined by classical frequency response analysis by using the function ji'desrg ll(Saadat, 1993) The values kp = 5000, Td 0.0 I, and T, = 0.05 are obtained .

(Step 4) Simulation of a closed-loop system The step response and the sinusoidal response are shown in Fig . 5 and Fig. 6. As the magnitude of input is decreased, the response is far away from the reference.

=0

156

3. PROPOSED DESIGl': PROCEDCRE

)( 10-2

1.5 3 .1 Derivation of control algorithm

.g::l

1.0

,<::

A <:antroIIer based on VM.M . is sown in Fig. 7 and Fig. 8(Aoki and Furukawa, 19%)(Aoki et aI., 1997). I t is assumed that a transfer function of a controller hased on the shift operator is obtained by any method.

Q.

E

<:

0.5

o

(StI!P 1) Transfonnation a shift fonn

H ( < ) = H(z)

1,= - :

Ref. O'-'-~..-L~~.L....-~-------'

0.05

0.15

0.2

0.15

0 .2

Time s

)( 10-3

(5)

O.l

1.5 (StI!P 2) Transfonnation a shift fonn to a delta fOlm by symbolic computation or hand calculation Thl! ddta operator is usually defined by (z - 1)I T, as T is sampling pl!liod. However, in tIns procedure the delta operator is defined by 8' = -z -1. Tins modified delta operator can rl!duce a numelical sensitivity of a conu·ol algoritlun as usual delta operator.

~

"§ 1.0

.<::

Q.

~

r

O.5

O.l

0 .05

H(8' )

=

H« )

1,=- 6' - 1 _ k ( 6 '~ I )'T bl( 6 '~ I )-b , ( 6'- I )'+al(6 '+ I )-a,

Time s (6)

6 '2 lbi' d' +bi' 6 ' +a;'

_

Fig. 5. Step response using fixed-point block(Shift form)

- k 6 12 Ta;' where

a;' = al + 2 a~

= al + a2 + 1

b~

=, b l + b2 + 1

.g

b;' = b l + 2

a

:a

0

~-0.5

(Step 3) Introduction of two time scales TI and T2 Because the delta inverse operation is a discrete-time intl!grator, there are n integraters of gain T in a nth order controller. In order to adjust the magIntude of the integral value, ntime scales TI - Tn , which are design parameters, are introduced. By the hdp of equivalent transfolluation of block diagram, each coefficients of an control algOlitluns must be divided by T1, T1 T2, T1 T2T3, respectively. Thus , each coefficient of a control algOlitlun can be adjusted independently by T,. From (6) a control algOlitlun based on modified delta operator is deli\'ed .

t

-1.0 ~ -1.5

[

f ~.l...-..-,-"-,-~-'--...~~-'-.......J~.....L..~ c...

o

O.l

Time s i

j

,

-'

\[

'.,

Ref.

I

,!

0.3

0.4

Time s

Il k = - - - 2 -

1l~._ 1

0 .2

O.l

1

Uk = ( - J) -k u ~' Uk = ii/(k Uk) xLI = -x~ - II7(T2 xll x L I = -xl- ii1 (T l x? )

0.4

r----r1I.-"-~,.-.-...,,.......,.....,~....,..~,

<-

u,t - u k _

0.3

)( 10-3

1.5

<=(_I) - kek x~ = lII (a;xn - m(a;xn u~ = x~ + II7 (b;xll + ii1 (b;xt ) /I

0.2

(7)

Fig.

= u;.

6. Sinusoidal response block(Shift fonn)

1) One bias W

\\'hl!n~

= 216 - 3

2) Two biases 16 WI = 3 X 2 3) Four biases 16 WI = 7 X 2 16 w3 = 3 X 2 157

4

5

5

, W2

= 2 16- 4

, w2

=5X

, w4

=

2 16 -

216 - 5

5

usmg

fixed-point

L 11l r----'---~~---...T

Proposed controller

4T

__.4T~Signal transformation 1( modulation)

S

Fig. 7 . PlO controlling system(Modified delta fonn) These biases can he regarded as inputs of the integral calculation. Thus, hiases change such as WI , WI , W4, 1V4, 1V2 , IV2, IV3, IV3 every T seconds in order to cancel the transient responses to these biases . Bias generater hlock is shown ill Fig. 11 . III addition, Eq (7) can he divided 11110 two groups of equations whether k is odd or even lllllllher. Thus, by using' flag jump' the program hecomes very simple and the calculation steps are almost same as those of the conventional delta operation.

iftlo > = 0

~

Bias

w

r--High_-passfi----"m,

~---+-l H(z)=-

¥

1-----

z=-z

L

l~

x~ = ek - lI1 (a;xk) - m(a;xi ) 1I ~ = x~

wf. 1

-I

T

4T

2T 4T

+ ill (b;xn + III (b;xf)

Signal transformation t---~ ( demodulation )

Fig. 8. Digital controller with Y.M.M.

else

Gain

(8)

Fig. 9. Modulation and demodulation block

(Step 4) Modeling a controller using floating-blocks A block diagram of controller, whose structure is the canonical direct fonn 2. The canonical direct fonn 2 is usually adopted in a delta operation because of minimal amount of calculations.

Fixed-Point

Unit Delay I

Fig. 10. Filter block for Y.M.M.

(Step 5) Developing fixed-point delta inverse block for the modified delta form In order to realize a delta fonn, the shift inverse is replaced by the delta inverse, which is a discrete integrator. For Y.M. tvl. the hias IV is introduced as like the bias for rounding in fixed-point atithmetic. Fixedpoint delta in\'erse block is realized by fixed-point unit delay block, add block , sub block, and gain block, which are provided in Fi:\ed-Point Blockset library. In order to reali ze V\' l.~vl , the unit delay output should feedback negatively, not positively in the delta inverse. Tlus negative feedback makes the output switch zero or mut)' every T seconds like PWl'vl. Tlus bias and negative feedback are the key in V.!vI.M .. The number of hiases is determined by a specification.

Fig. 11. Bias generator block

158

3.2 Proposed design procedure 10-2

X

(Step 1) Simulation of a closed-loop system using floating-blocks and are detennined by one Two coefficients '0 simultaneously, not independently. Therefor, the control algOlitlun is separated by two groups, namely, the part and the part.

a;

a;

1.5

h;

G.l

~

~

::s 1.0 .-;:: c.. S

-

h;

< 0.5

a;

[1] Adjustment of '0 and Design parameters '0 are adjusted sequentially from TI so that the magnitude of the internal variable hecomes less than unity to prevent of overflow. On the other hand, the magnitude of Tj is set as large as possible to prevent underflow and quantization noise. Also, the value of Tj should be set to be quantization step multiple. Because the magnitude of aj is varied by TJ , it should be verified whether the magnitude of exceeds unity for fixed-point aIithmetic. Design parameters '0 are adjusted sequentially from TI to prevent overflow of the delta inverse . Conversely, the ma~'1utude of 0 is set as large as possible to prevent underlJow and quantization noise . Also, the value of TJ should be set to be quantization step multiple . It should be velified whether the magnitude exceeds lIIuty for fixed-point calculations. Though tlus step is the iterative design cycle , auto-tuning can be possible using cOlllmand procedure within ivlATLAB.

0

4

0

Ref.

0.05

0.1

0.15

0.2

Time s x 10-3 l.5~ G.l

-~

....::s

a;

1.0

.~

c..

~

0.5

1

~

Ref.

1 0

0

0.05

0.1

0.15

0.2

Time s Fig. 12. Step response using fixed-point block(Y.M.M. with one bias)

[2] Normalization of hj The coefficients bj are divided by hjma.< so that the magtutude of them is less than unity for fixed-point mithmetic. The controller gain k is multiplied by bima.c

X

10-2

1.5 1.0 G.l

-~

(Step 2) Scaling From Step 1 time scales n, T2 and coefficients of an algoritlun are detennined as floating-point numbers . For a fixed-point implementation of a control algoritlun on lnicroprocessors these numbers must be converted to integer ones. Because the magnitude of these parameters is less than lIIuty, usual tedious scaling is not necessary.

....::s 0.5 c.. 0 S

<-0.5 -1.0 -1.5

0

0.1

0.2

0.3

0.4

0.3

0.4

Time s

(Step 3) Simulation of a closed-loop system A controller is simulated in floating-point arithmetic, and a plant is simulated in fixed-point mithmetic. Step and sinusoidal responses are shown in Fig. 12 and Fig. 13. Here, one bias is used in Fig. 12 and Fig. 13, four biases are used in Fig. 14 and Fig. 15. From these figures the numelical advantages of Y.M.M. are velified for wide range of reference . As the number of biases increases, calculation elTors decrease . In cases of a steady state input , this methodology achieves good perfonnance . From the PWM point of view, as the number of biases increases, the total sampling period increases. In order to follow rapidly changing inputs, the number of biases must be lilnited, or the sampling peliod must be short. However, the decrease of the sampling period makes the magtlitude of time scale small. Tllis causes underllow at delta inverse. Therefore, the tradeoff between the numelicai accuracy and the sampling peliod is required.

x 10-3

....

1.5 1.0

G.l

~

::s 0.5 c.. 0

~-0.5

-1.0 -1.5

t 0

0.1

0.2

Time s Fig.

159

13. Sinusoidal response usmg block(Y.M.M. with one bias)

fixed-point

(I) The implementation procedure of V~Uvl. has been proposed generally. Therefor. tlus methodology can be widely available . Simulation resulL~ show that its availability have been made clear.

(2)The calculation steps required by \ ·.~U\1. are almost same as usual delta operation. The extra calculation steps are the execution of lugh-pass filter and' flag jump' for modulation in a control program . These calculation steps are negligible for usual microprocessors.

Time s X

10-3

1.5: 5. REFERENCES

v

~

~

Agarwal . RC. and C.S . BtllTUS (1971) :\el\' recursive digital filter having very low sensitivity and rowld-off noise . IEEE Trans. CAS 22(12). pp. 921-927. Aoki. T (1999). Implementation of modified delta fOIm for nUcroprocessors using fixed-point arithmetic . Proc . of American Control Con! 6. pp. 4056-4060. Aoki. T and Y. Furukawa (1996) . Proposal of modified delta operation with v. m. m. and its application to controlling algOlitlun in fixed-point mitlunetic. Proc. of Fourth Int . Con! Control, Automation. Robotics and Vision (ICARCV '96) 3. pp. 2356-2360. Aoki. T. N. ~10ronuki and Y. Furukawa (1997) A study on controlling algOlitlun to realize highspeed & high-accuracy control systems - proposal of modified delta operator -. Journal of Robotics and Mechatromcs 9(6). pp. 446-454. Goodall. RM . (1985). High-speed digital controllers using an 8bit microprocessor. Software & A1icrosystems 4(5/6) , pp. 246-250 . Goodall. RM. (1989). Milumisation of cotnputation for digital controllers. Trans. InsT MC 11(5). pp. 218-224. Goodall . R~vl. (1990) The delay operator ;: - 1 - inappropliate for use in recursive digital filtt:rs'l . Trans. Inst MC 12(5). pp. 246-250. Goodwin. G.c.. RH. Middleton and H.\i. Poor (1992). High-speed digital signal processing and control. Proc. The IEEE 80(2). pp. 240--259. Grace. A., A.I Laub . .IS. Little and C. Thompson (1990). Control Svstem Toolbox User '.I' Cuide. Tht: ~lathWorks. \ ·L&. . :'liddleton, RH. and G.c. Goodwin (1986). Improved filutt: word length charactt:ristics in digital control using delta operators . IEEE TransaCTions 011 AUTolllaTic COlltrol 31(l 1). pp. 1015-1021. ~liddJeton. R.H . and G .C Goodwin (1990) Digital ESTimaTioll and Control: A Unified Approach. Prentice-HalI. :-':t:w Jersey. Saadat, H. (1993). CompUTational Aids in C011lrol SySTems Using A1ATLAB. ;"1cGraw-Hill. :\ew Jersey.

1.0 -'\------

'E. E

<:

0.5

Ref.

O'~-­

o

0.05

0.1

0.15

0.2

Time s Fig I"'. Step response using fixed-point block(V.rvI.M. wi th four biases)

x10-2

1.5

r",........-,~~~~".....,.~~-.-rr-TTT')

1.0 ~ 0.5 :

0.2

0.1

0.3

.1 0.4

0.3

0.4

Time s

X 10-3

1.5; 1.0 :V

:a-E "0 :::l

0,

<: -0.5

f :

-1.0 ~ -1.5 ~~-~-.~ o 0.1

0.2

Time s Fig .

15. Sinusoidal response usmg lIith four biases)

fixed-point

hlock(\'~ I.~ 1

-l CO:\CLL:SlO:\S In order to establish it modified delta operation 111 fixed-point antlunetic. the following results hcl\e been ohtained. 160