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Copper-silicon carbide composite plating for inhibiting the extrusion of through silicon via (TSV)
Microelectronic Engineering 214 (2019) 5–14
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Research paper
Copper-silicon carbide composite plating for inhibiting the extrusion of through silicon via (TSV)
T
Se-Ho Kee , Won-Joong Kim, Jae-Pil Jung ⁎
Department of Materials Science and Engineering, University of Seoul, Seoul 130-743, Republic of Korea
ARTICLE INFO
ABSTRACT
Keywords: Silicon carbide Extrusion Packaging Through-silicon-via Composite plating Thermal expansion coefficient
For 3D packaging using TSV technology, it is required various techniques such as forming via holes on a wafer, filling conductive materials and interpretation of TSV reliability etc. Among them, solving the issue of reliability are standing out as a big problem for reaching commercialization in the future. When the conductive material filled in the TSV is expanded by the high-temperature process during the packaging process, it breaks the insulating layer and the metal interconnection which exist on via hole by extruding from the surface of the Si wafer. In this study, in order to suppress the Cu extrusion, electroplating was attempted by adding silicon carbide powder having almost no difference in thermal expansion coefficient with the Si chip in the Cu electroplating solution. As a result, the extrusion height of Cu-SiC was about 164 nm that is a height corresponding to 14.6% of the extrusion height of Cu. This is considered to be the result of extremely effectively suppressing the extrusion phenomenon after annealing by adding SiC powder with a low coefficient of thermal expansion into the conventional Cu plating solution.
1. Introduction Through silicon via (TSV) technology is the state-of-the-art technology used in smartphone, small notebook PC, small IC chip, MEMS sensor, stacked NAND flash memory, etc. And, it is an advantageous technology because it provides the shortest path by connecting the top and bottom of the silicon wafer using electrodes. In order to stack a plurality of silicon wafers three-dimensionally, it is indispensable to form via in silicon wafer and fill the inside with a conductive metal. Copper is mainly used as the conductive metal at this time. After the inside of the TSV is filled with conductive metal, a semiconductor packaging process such as RTP (Rapid Thermal Processing) oxidation method, thermal diffusion method during impurity process, cleaning step and various annealing treatments is continued [1–4]. At this time, the heating process cannot be avoided. When the temperature rises during these heating processes, the metal interconnection layer and the insulating layer are broken and Cu protrusion occurs finally because the difference in thermal expansion coefficient between Cu filled in the TSV and Si wafer. Accordingly, many studies have been reported to solve these problems such as protrusion of Cu or defects between Cu and insulating layer during the process for TSV mass production [5,6]. Also, many studies are also being conducted to fill other conductive metals instead of Cu inside TSV. Ko et al. investigated a study of filling Sn in
TSV instead of Cu [7]. The coefficient of thermal expansion of Sn is higher than that of Cu, but Young's modulus of Sn is less than a half of Cu. Therefore, Sn filled TSV is less affected by stress than Cu filled TSV. As a result of mixing and filling with Sn and Cu powder by a ball milling and melting, it was reported that the thermal stress was greatly reduced as compared with Cu. Some studies are also being investigated to fill the inside TSV with other metals instead of Cu and to suppress the protrusion by adding a metal with a low coefficient of thermal expansion of Cu [8–11]. Silicon carbide (SiC) as a material with very high covalent bonding has excellent mechanical and chemical properties such as high temperature strength, hardness, high thermal conductivity, excellent oxidation resistance and abrasion resistance [12–14]. Therefore, it is widely used for high-temperature structural materials and abrasives. SiC is known to be very effective for heat dissipation because it has a thermal conductivity similar to that of Cu. Generally, it is known that the composite plating layer has better properties such as abrasion resistance, heat resistance, corrosion resistance and non-stickiness than a single plating layer when electroplating is performed by adding fine powder. Therefore, in this study, SiC powder with low coefficient of thermal expansion of Cu was added in order to suppress TSV Cu extrusion, and then composite plating was performed. And then, the extrusion behavior of the Cu composite plating layer after composite plating was analyzed.
⁎ Corresponding author at: University of Seoul, Department of Materials Science and Engineering, 90, Junnong-dong, Dongdaemun-gu, Seoul 130-743, Republic of Korea. E-mail address: [email protected] (S.-H. Kee).
https://doi.org/10.1016/j.mee.2019.04.019 Received 4 September 2018; Received in revised form 17 April 2019; Accepted 18 April 2019 Available online 20 April 2019 0167-9317/ © 2019 Elsevier B.V. All rights reserved.
Microelectronic Engineering 214 (2019) 5–14
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2. Experimental A p-type (100) single crystal Si wafer (Prulong, Ukraine) having a diameter of 152.4 mm and a thickness of 525 μm was used as a substrate for filling by Cu-SiC composite plating method in TSV. After forming a pattern on the Si wafer surface, a vertical via having a diameter of 30 μm and a depth of 60 μm was formed by the DRIE process. After the SiO2 layer which is the role as insulating layer has been deposited to a thickness of 1 μm using HDP CVD (high density plasma chemical vapor deposition) inside the formed vertical via. And Ti (3000 Å) and Cu (5000 Å), which is the role as an adhesive layer and a seed layer, were deposited using a sputtering process. Finally Cu-SiC was filled on it. Before filling Cu-SiC inside the TSV, electroplating was performed on oxygen free Cu plate (99.9%) with a size of 1 × 1 × 0.3 cm to confirm the plating characteristics of it [15]. After polishing the surface of the Cu plate, it was immersed in a 2% HCl aqueous solution for 1 min and then washed with distilled water. The plating solution for Cu-SiC composite plating was composed of CuSO4·5H2O 200 g/L, SiC powder 5 to 25 g/L, H2SO4 0 to 60 ml/L and surfactant. In order to investigate the plating characteristics, the polarization curves were measured while changing the amounts of H2SO4 and surfactant from 12 to 60 ml/L and 50 to 250 ppm, respectively. Electrolytic plating was carried out at room temperature and was agitated using a magnetic bar during plating. EPP 4000 (Princeton Applied Research) was used as the current applying device. A Pt plate (99.9%) with a size of 1 × 1 × 0.3 cm was used as an anode and a saturated calomel electrode (SCE, saturated calomel electrode) was used as a standard electrode. After analyzing the plating characteristics of Cu-SiC on the Cu plate, the TSV with a size of 30 μm in diameter and 60 μm in depth was filled with Cu-SiC. In order to compare with the protrusion of Cu-SiC composite plating, Cu was filled in the same size a TSV. Plating characteristics, surface and protrusion behavior before and after the heat treatment were observed using FE-SEM (field emission scanning electron microscope), and EPMA (electron probe micro analyzer) was used for measurement of composition inside a TSV. AFM (atomic force spectroscope) device was used to quantitatively compare the protrusion heights of Cu and Cu-SiC after annealing.
Fig. 1. Tafel curve according to content of H2SO4.
area decreases, the applied current density per unit area will increase. In that case, an abrupt current density rise causes an irregular region as shown in Fig. 2 [21–24]. Fig. 2 shows the change of the Tafel curves according to the content of surfactant (SDS) added to the plating solution. In the Tafel curve when surfactant is not added, it can be seen that the current density decreases almost linearly as the cathode overpotential decreases. However, as the content of surfactant in the plating solution increased to 100 ppm or more, it was possible to observe the phenomenon that the current density increased when the cathode overpotential was −0.97 V. Moreover, when the content of surfactant is 100 ppm or more, it was possible to know that plating starts from about −0.97 V without changing the cathode overpotential [25,26]. This is probably because the amount of surfactant has already reached saturation state and is greater than the amount of SiC powder that form a conjugate called “clouding” with cation or surfactant in plating solution. Fig. 3 shows the surface images of the plating layer according to the content of H2SO4 in Cu-SiC composite plating. When H2SO4 was not added, little SiC powder was found on the surface. However, as the content of H2SO4 increased, SiC powders began to be observed on the surface. Therefore, as the SO42− ions increase in the plating solution,
3. Results and discussion 3.1. Cu-SiC composite electroplating In order to investigate about the characteristics of Cu-SiC composite electroplating, the Tafel curves according to the content of H2SO4 and SDS (sodium dodecyl sulfate, surfactant) in the plating solution were measured. Fig. 1 shows the results of measurement while varying the H2SO4 content from 0 to 60 ml/L. The Tafel curves were measured from 0 V to −1.5 V at a reduction potential change rate of 1 mV/s. It was confirmed that the early stage with high reduction potential had a typical Tafel curve shape [16]. In addition, a phenomenon in which the current density rapidly increases with increasing the content of H2SO4 was observed. It is considered that surfactants and SiC powder are adsorbed on the plating layer due to the composite plating mechanism at the same time [17,18]. Unlike alloy plating, there is no co-deposition region in the composite plating process. When a particle in the plating solution is added, it combine with surfactant or cation which is in the role of additive in the plating solution to form a conjugate called “clouding”. These clouding move to the cathode side through convection and diffusion, and they are plated simultaneously when metal ions were plated on the cathode. At this time, the plating surface area of the cathode instantaneously decreases as the particle moved towards the cathode is adsorbed to the cathode surface [19,20]. Under the Galvanostat mode in which the applied current is fixed, if the plating surface
Fig. 2. Tafel curve according to content of surfactant (SDS).
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Fig. 3. Microstructure of Cu-SiC deposits according to content of H2SO4; (a) not added, (b) 3 ml, (c) 6 ml, (d) 9 ml, (e) 12 ml, (f) 15 ml.
the amount of SiC powder forming “clouding” increases, so the amount of SiC powder adsorbed on the cathode surface increases. This phenomenon is consistent with the result of change in the surfactant content. Fig. 4 shows the changed images of the surface as the content of surfactant (SDS) changes. SiC powder was almost not observed on the surface of the plating layer containing 50 ppm of surfactant. However, as the content of surfactant increased from 100 ppm to 250 ppm, it was confirmed that more SiC powder was observed than the plating solution added with 50 ppm. Likewise, as the amount of surfactant increases in the plating solution, and the amount of SiC powder adsorbed on the cathode surface can be increased because the surfactant that bonds with SiC powder increases. In order to see the shape of SiC powder adsorbed
by these mechanisms in more detail, the surface of the plating layer after etching was analyzed. Based on previous results, the plating solution for observing the surface of the Cu-SiC plated layer after etching was based on CuSO4·5H2O, H2SO4, surfactant and here it was prepared by adding 5 to 25 g/L SiC powder. Electroplating was performed using DC current of 600 mA/cm2. Fig. 5 shows the surface of the Cu-SiC plated layer after etching. The added SiC powder is α phase with an average diameter of 0.5 μm, and it has a HCP (hexagonal close packed) structure. Alpha silicon carbide (α-SiC, 6H) is produced at temperature higher than 1700 °C, and has higher thermal conductivity (490 W/m·K) than that of β-SiC (cubic structure) [12]. The etching solution was prepared by adding hydrochloric acid and iron (III) chloride to distilled
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Fig. 4. Microstructure of Cu-SiC deposits according to content of surfactant(SDS); (a) 50 ppm, (b) 100 ppm, (c) 150 ppm, (d) 200 ppm, (e) 250 ppm.
water and the Cu-SiC plated specimen was immersed in this solution for several seconds and then washed. The surface of the Cu-SiC plated layer was observed with a scanning electron microscope. A α-SiC with hexagonal structure was observed on the surface after etching. The SiC powder partially agglomerated, but it spread evenly over the entire plated layer. In order to investigate the change in the Vickers hardness value after addition of SiC powder, The Vickers hardness of the Cu-SiC plated layer was compared with that of the Cu electroplated layer. The Vickers hardness values were measured using a micro hardness tester (Mitutoyo MVK-H1). The result of Vickers hardness value was
calculated on the basis of the Eqs. (1) and (2) after measuring 5 times for each specimen under a load of 0.01 kgf (kilogram-force) and the average value was taken.
Hv = 1.8544 ×
d=
d1 + d2 2
P d2
(1) (2)
Here, P is the applied load, and d is the diagonal of indention. Fig. 6 is a bar graph comparing the Vickers hardness of the plating
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Fig. 5. Microstructure of Cu-SiC deposits after etching.
layer, respectively. The reason for obtaining these results is considered to be that recrystallization and grain growth occurred during the annealing process. In general, the dislocation density and strength decrease and the ductility of the metal increases when recrystallization and grain growth occur [27,28].
200 180 160
Before annealing After annealing
Hardness, Hv
140 120
3.2. Cu-SiC composite plating for filling in TSV
100
The plating solution for filling Cu-SiC inside the TSV was prepared with the composition of CuSO4·5H20 200 g/L, H2SO4 12 ml/L, surfactant 150 ppm and SiC powder 25 g/L. The PPR current waveform was used for plating conditions. After the plating solution was manufactured, it was stirred for 1 h using an ultrasonic stirring device (UE100) and then the electroplating was carried out. Fig. 7(a) shows a cross-sectional image after Cu-SiC composite plating. It can be confirmed that the inside of the TSV having a diameter of 30 μm and a depth of 60 μm is completely filled without defects. Fig. 7(b) shows image after etching the specimen for several seconds in the etching solution containing distilled water, hydrochloric acid and iron (III) chloride to check the presence or absence of SiC powder inside TSV. It was confirmed by scanning electron micrographs that SiC powder exists inside TSV. Fig. 8 shows the detail shapes of via top, via side wall and via bottom by enlarging the image in Fig. 7. In this figure, a large number of α-SiC having a hexahedral structure was identified. The results of measuring the Vickers hardness of TSV filled with Cu-SiC are shown in Fig. 9. The Vickers hardness value was measured by 99.52 Hv in the case of the Cu plated layer and 173.11 Hv in the case of the CuSiC plated layer, respectively. These values were similar to that of the plated layer on the oxygen free Cu plate. Similar to the results of the previous Cu plate plating, the Vickers hardness in the TSV after
80 60 40 20 0
Cu
Cu-SiC
Fig. 6. Comparison Vickers hardness of Cu with Cu-SiC on Cu plate.
layer by Cu-SiC composite plating and that of the plating layer by Cu electrolytic plating. Asnavandi et al. reported that the Vickers hardness of the plated layer with SiC added to CueSn has a value about 10 to 40% higher than the Vickers hardness of the plated layer without any additives [13]. In this study, the Vickers hardness of the Cu electroplated layer was 100.2 Hv. The Vickers hardness of the Cu-SiC composite plated layer was 173.7 Hv, which was about 73% higher than that of the Cu plated layer. The Vickers hardness of the plated layer that was annealed at 450 °C for 30 min was measured by 60.84 Hv in the case of the Cu plated layer and 150.7 Hv in the case of the Cu-SiC plated
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Fig. 7. Cross section of Cu-SiC composite plating; (a) Cu-SiC filled, (b) etched.
Fig. 8. Cross section of inner TSV (a) top, (b) side wall, (c) left bottom and (d) right bottom.
annealing at 450 °C for 30 min was measured by 62.94 Hv in the case of the Cu plated layer and 151.16 Hv in the case of the Cu-SiC plated layer, respectively. These results are also due to recrystallization and grain growth during annealing process. Fig. 10 shows EPMA mapping results of the cross section of TSV filled with Cu-SiC. It was confirmed that the
SiC powder was evenly distributed on the surface and the inside of via. Considering that the addition amount of SiC powder is 25 g/L, it could be seen that the SiC powder was sufficiently diffused inside the TSV through agitation in the current off-time section of the PPR current waveform [29]. As a result of quantitative analysis in TSV filled with
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polishing the surface of the TSV filled with Cu-SiC using a 1 μm diamond paste. The annealing process was carried out for 30 min after heating to 450 °C at a rate of 5 °C per minute. Fig. 11 shows the image after polishing the surface of TSV filled with Cu and Cu-SiC. Generally, when polishing with a 1 μm diamond paste, the surface of Cu whose hardness is relatively lower than that of Si is deeply more polished. At this time, when the height of the Si wafer is taken as a reference, the surface of Cu and Cu-SiC was about 428 nm and 70 nm down from the Si surface, respectively. As described in Section 3.1, it is considered that the polished depth of Cu-SiC was lower than that of Cu because the hardness of Cu-SiC was higher than that of Cu. Heryanto et al. reported about the extrusion height of Cu after Cu filling in the TSV that was conducted with a diameter of 5 μm and a depth of 50 μm and annealed at 250 to 450 °C for 30 min [9]. The extrusion height was reported to be 190 μm at 250 °C and 1 μm at 450 °C, which increased according to the temperature. Kumar et al. filled with Cu in a tapered TSV with a diameter of 100 μm (top diameter), 85 μm (bottom diameter) and depth of 110 μm and then annealed at 425 °C for 30 min in a vacuum state of 10−4 Torr [3]. After the annealing process, a thermal shock test (−25 to 135 °C, 25 to 450 °C) was additionally carried out and the Cu extrusion height was observed. As the thermal shock cycle increases, the extrusion height of Cu was increased up to 3 μm. In this study, mechanically polished Cu-SiC TSV samples were annealed at 450 °C for 30 min and then the extrusion behavior was analyzed. In order to compare and analyze the extrusion behavior of Cu-SiC composite plating, Cu was filled in the same shape via, and then annealing process was also carried out. As can be seen from the AFM measurement result in Fig. 12, it was confirmed that the extrusion height from the surface after annealing process was about 692 nm for Cu and about 94 nm for
200 180 160
Before annealing After annealing
Hardness, Hv
140 120 100 80 60 40 20 0
Cu
Cu-SiC
Fig. 9. Comparison Vickers hardness of Cu with Cu-SiC in TSV.
Cu-SiC, the average composition of Cu, Si and C was 96.635 wt%, 1.924 wt% and 1.941 wt%, respectively. 3.3. Extrusion behavior in TSV after annealing In this section, the surface of Cu-SiC plated was observed to identify about the extrusion behavior of Cu-SiC filled in TSV after annealing. The sample filled with Cu-SiC for measurement was prepared by filling under the same as Cu electroplating conditions for comparison with the extrusion behavior of Cu. The samples for annealing were prepared by
Fig. 10. EPMA analysis of Cu-SiC filled TSV cross section.
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Fig. 11. Cu and Cu-SiC filled via after mechanical polishing; (a) surface of Cu, (b) surface of Cu-SiC, (c) cross section of Cu, (d) cross section of Cu-SiC.
Cu-SiC, respectively. Add to this, when the results of the previous mechanical polishing are supplemented, it was confirmed that the extrusion height of Cu and Cu-SiC was about 1.12 μm and 164 nm, respectively. This is a height corresponding to 14.6% of the extrusion height of Cu. These results are considered to be the result of extremely effectively suppressing the extrusion phenomenon after annealing by adding SiC powder with a low coefficient of thermal expansion into the conventional Cu plating solution. However, in order to become commercialized, more detailed analysis will be carried out on the lifetime and stability of Cu-SiC composite plating solution and its application to TSV of fine diameter, etc. [30]. Nevertheless it can be seen that the method carried out in this study is a method closer to a more fundamental solution than previously studied methods that required additional processing such as post annealing treatment etc.
(2)
(3)
(4)
4. Conclusions In this study, in order to suppress the extrusion of Cu in the TSV, CuSiC composite plating solution also was made by adding SiC powder with low thermal expansion coefficient to conventional Cu plating solution. Using the produced plating solution, it was filled in a vertical via having a diameter of 30 μm and a depth of 60 μm. And then the plating characteristics were analyzed and compared with the protrusion of Cu. The results are summarized as follows.
(5)
(6)
(1) In order to investigate about the characteristics of Cu-SiC composite electroplating, Tafel curve was measured while varying the contents of H2SO4 and SDS in the plating solution from 0 to 60 ml/L and from 50 to 250 ppm, respectively. As a result, it was confirmed
12
that the current density abruptly increases when the contents of H2SO4 and SDS are 6 ml/L and 100 ppm or more, respectively. After Cu-SiC was plated on the oxygen free Cu plate, the Vickers hardness of Cu-SiC plating layer was compared with that of the Cu plating layer. The hardness of Cu and Cu-SiC plating layer appeared at 100.2 Hv and 173.7 Hv, respectively, and the hardness of the CuSiC plating layer was about 73% higher than that of the Cu plating layer. As a result of performing composite plating of Cu-SiC inside the TSV using the PPR current waveform with cathode current density of −8 mA/cm2 and anode current density of 40 mA/cm2, the TSV was filled without defects. Measurement of the Vickers hardness of TSV filled with Cu and CuSiC showed 99.52 Hv for Cu and 173. 11 Hv for Cu-SiC, respectively. These results showed the same aspect as the hardness measurement result of the plating layer plated on the oxygen free Cu plate. As a result of EPMA mapping of the cross section of the TSV filled with Cu-SiC, the SiC powder was evenly located on the surface and the inside of via. Quantitative analysis in TSV filled with Cu-SiC showed that Cu was about 96.635 wt%, Si was 1.924 wt% and C was 1.941 wt% on average. The TSV sample filled with Cu and Cu-SiC was annealed at 450 °C for 30 min and then the extrusion behavior was analyzed. As a result, the extrusion height of Cu and Cu-SiC was about 1.12 μm and 164 nm, respectively. It was confirmed that the extrusion of Cu-SiC seems to be suppressed by about 84.5% compared to that of Cu.
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Fig. 12. AFM results of Cu and Cu-SiC extrusion from Si surface; (a) polished Cu, (b) annealed Cu, (c) polished Cu-SiC, (d) annealed Cu-SiC.
Acknowledgements
[3] P. Kumar, I. Dutta, M.S. Bakir, Interfacial effects during thermal cycling of Cu-filled through-silicon Vias (TSV), J. Electron. Mater. 41 (2) (2012) 322–335. [4] B. bandevelde, A. Ivankovic, B. Debecker, M. Lofrano, K. Vanstreels, W. Guo, V. Cherman, M. Gonzalez, G.V.d. Plas, I.D. Wolf, E. Beyne, Z. Tokei, Chip-package interaction in 3D stacked IC packages using finite element modelling, Microelectron. Reliab. 54 (2014) 1200–1205. [5] S.K. Ryu, T. Jiang, J. Im, P.S. Ho, R. Huang, Thermomechanical failure analysis of through-silicon via interface using a shear-lag model with cohesive zone, IEEE Trans. Device Mater. Reliab. 14 (1) (2014). [6] S.H. Kee, J.O. Shin, I.H. Jung, W.J. Kim, J.P. Jung, TSV filling technology using cu electrodeposition, J. Weld. Join. 32 (3) (2014) 11–18. [7] Y.K. Ko, M.S. Kang, S.H. Yoo, C.W. Lee, High speed TSV filling technology by using molten solder and fabrication of composite solder as filler material, J. KWJS 30 (3) (2012) 219–223. [8] A. Vilinska, S. Ponnurangam, I. Chernyshova, P. Somasundaran, D. Eroglu, J. Martinez, A.C. West, Stabilization of silicon carbide (SiC) micro- and nanoparticle
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MOE) (No. 2017R1D1A1B03030034). References [1] C.C. Lee, C.C. Huang, Induced thermo-mechanical reliability of copper-filled TSV interposer by transient selective annealing technology, Microelectron. Reliab. 55 (2015) 2213–2219. [2] I.D. Wolf, K. Croes, O.V. Pedreira, R. Labie, A. Redolfi, M.V.D. Peer, K. Vanstreels, C. Okoro, B. Vandevelde, E. Beyne, Cu pumping in TSVs: effect of pre-CMP thermal budget, Microelectron. Reliab. 51 (2011) 1856–1859.
13
Microelectronic Engineering 214 (2019) 5–14
S.-H. Kee, et al.
[9] [10] [11]
[12] [13] [14] [15] [16] [17] [18] [19]
dispersions in the presence of concentrated electrolyte, J. Colloid Interface Sci. 423 (2014) 48–53. A. Heryanto, W.N. Putra, A. Trigg, S. Gao, W.S. Kwon, F.X. Che, X.F. Ang, J. Wei, R. I. Made, C.L. Gan, K.L. Pey, Effect of copper TSV annealing on via protrusion for TSV wafer fabrication, J. Electron. Mater. 41 (9) (2012) 2533–2542. M. Albano, R.B. Morles, F. Cioeta, M. Marchetti, Coating effects on thermal properties of carbon and carbon silicon carbide composites for space thermal protection systems, Acta Astronaut. 99 (2014) 276–282. F. Inoue, H. Philipsen, A. Radisic, S. Armini, Y. Civale, P. Leunissen, M. Kondo, E. Webb, S. Shingubara, Electroless Cu deposition on atomic layer deposited Ru as novel seed formation process in through-Si vias, Electrochim. Acta 100 (2013) 203–211. K. Fujiwara, A. Ishii, T. Abe, K. Ando, Epitaxial growth of ZnO crystal on the Siterminated 6H-SiC(0001) surface using the first-principles calculation, J. Surf. Sci. Nanotechnol. 4 (2006) 254–257. M. Asnavandi, M. Ghorbani, M. Kahram, Production of Cu–Sn–graphite–SiC composite coatings by electrodeposition, Surf. Coat. Technol. 216 (2013) 207–214. M. Imboden, P. Mohanty, Dissipation in nanoelectromechanical systems, Phys. Rep. 534 (2014) 117. S.H. Kee, W.J. Kim, J.P. Jung, Reflection characteristics of electroless deposited Sn3.5Ag for LED lead frames, Surf. Coat. Technol. 235 (2013) 778–783. B.W. Wang, C.Y. Lee, H.B. Lee, The influences of monoethanolamine additive on the properties of nickel coating electroplated in post supercritical carbon dioxide mixed Watts bath, Surf. Coat. Technol. 337 (2018) 232–240. H. Yang, F. Li, X. Wu, P. Zhang, W. Li, S. Cao, Y. Shan, L. Sun, Improving the performance of water splitting electrodes by composite plating with nano-SiO2, Electrochim. Acta 281 (2018) 60–68. D. Zhang, X. Cui, G. Jin, Z. Cai, B. Lu, Microstructure and mechanical properties of electro-brush plated Fe/MWCNTs composite coatings, Surf. Coat. Technol. 348 (2018) 97–103. Y. Zhou, F.Q. Xie, X.Q. Wu, W.D. Zhao, X. Chen, A novel plating apparatus for electrodeposition of Ni-SiC composite coatings using circulating-solution co-
deposition technique, J. Alloys Compd. 699 (2017) 366–377. [20] Q. Zhao, S. Tan, M. Xie, Y. Liu, J. Yi, A study on the CNTs-Ag composites prepared based on spark plasma sintering and improved electroless plating assisted by ultrasonic spray atomization, J. Alloys Compd. 737 (2018) 31–38. [21] J. Vazquez-Arenas, T. Treeratanaphitak, M. Pritzker, Formation of Co–Ni alloy coatings under direct current, pulse current and pulse-reverse plating conditions, Electrochim. Acta 62 (2012) 63–72. [22] L. Hofmann, R. Ecke, S.E. Schulz, T. Gessner, Investigations regarding through silicon via filling for 3D integration by periodic pulse reverse plating with and without additives, Microelectron. Eng. 88 (2011) 705–708. [23] Z. Liu, A.C. West, Modeling of galvanostatic pulse and pulsed reverse electroplating of gold, Electrochim. Acta 56 (2011) 3328–3333. [24] M.Y. Cheng, K.W. Chen, T.F. Liu, Y.L. Wang, H.P. Feng, Effects of direct current and pulse-reverse copper plating waveforms on the incubation behavior of self-annealing, Thin Solid Films 518 (2010) 7468–7474. [25] H.C. Chuang, H.M. Yang, G.L. Wu, J. Sanchez, J.H. Shyu, The effects of ultrasonic agitation on supercritical CO2 copper electroplating, Ultrason. Sonochem. 40 (2018) 147–156. [26] C. Song, P. He, T. Lin, H. Wei, W. Yang, Electroplating assisted diffusion bonding of ZrC–SiC composite for full ceramic joints, Ceram. Int. 40 (2014) 7613–7616. [27] M. Stangl, M. Liptak, A. Fletcher, J. Acker, J. Thomas, H. Wendrock, S. Oswald, K. Wetzig, Influence of initial microstructure and impurities on Cu room-temperature recrystallization (self-annealing), Microelectron. Eng. 85 (2008) 534–541. [28] C.C. Chen, C.H. Yang, Y.S. Wu, C.E. Ho, Depth-dependent self-annealing behavior of electroplated Cu, Surf. Coat. Technol. 320 (2017) 489–496. [29] S.H. Kee, W.J. Kim, J.P. Jung, M.H. Choi, Effect of via pitch on the extrusion behavior of Cu-filled TSV, Korean J. Met. Mater. 56 (6) (2018) 449–458. [30] P. Bayat, D. Vogel, R.D. Rodreguez, E. Sheremet, D.R.T. Zahn, S. Rzepka, B. Michel, Thermo-mechanical characterization of copper through-silicon vias (Cu-TSVs) using micro-Raman spectroscopy and atomic force microscopy, Microelectron. Eng. 137 (2015) 101–104.
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Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Research paper
Copper-silicon carbide composite plating for inhibiting the extrusion of through silicon via (TSV)
T
Se-Ho Kee , Won-Joong Kim, Jae-Pil Jung ⁎
Department of Materials Science and Engineering, University of Seoul, Seoul 130-743, Republic of Korea
ARTICLE INFO
ABSTRACT
Keywords: Silicon carbide Extrusion Packaging Through-silicon-via Composite plating Thermal expansion coefficient
For 3D packaging using TSV technology, it is required various techniques such as forming via holes on a wafer, filling conductive materials and interpretation of TSV reliability etc. Among them, solving the issue of reliability are standing out as a big problem for reaching commercialization in the future. When the conductive material filled in the TSV is expanded by the high-temperature process during the packaging process, it breaks the insulating layer and the metal interconnection which exist on via hole by extruding from the surface of the Si wafer. In this study, in order to suppress the Cu extrusion, electroplating was attempted by adding silicon carbide powder having almost no difference in thermal expansion coefficient with the Si chip in the Cu electroplating solution. As a result, the extrusion height of Cu-SiC was about 164 nm that is a height corresponding to 14.6% of the extrusion height of Cu. This is considered to be the result of extremely effectively suppressing the extrusion phenomenon after annealing by adding SiC powder with a low coefficient of thermal expansion into the conventional Cu plating solution.
1. Introduction Through silicon via (TSV) technology is the state-of-the-art technology used in smartphone, small notebook PC, small IC chip, MEMS sensor, stacked NAND flash memory, etc. And, it is an advantageous technology because it provides the shortest path by connecting the top and bottom of the silicon wafer using electrodes. In order to stack a plurality of silicon wafers three-dimensionally, it is indispensable to form via in silicon wafer and fill the inside with a conductive metal. Copper is mainly used as the conductive metal at this time. After the inside of the TSV is filled with conductive metal, a semiconductor packaging process such as RTP (Rapid Thermal Processing) oxidation method, thermal diffusion method during impurity process, cleaning step and various annealing treatments is continued [1–4]. At this time, the heating process cannot be avoided. When the temperature rises during these heating processes, the metal interconnection layer and the insulating layer are broken and Cu protrusion occurs finally because the difference in thermal expansion coefficient between Cu filled in the TSV and Si wafer. Accordingly, many studies have been reported to solve these problems such as protrusion of Cu or defects between Cu and insulating layer during the process for TSV mass production [5,6]. Also, many studies are also being conducted to fill other conductive metals instead of Cu inside TSV. Ko et al. investigated a study of filling Sn in
TSV instead of Cu [7]. The coefficient of thermal expansion of Sn is higher than that of Cu, but Young's modulus of Sn is less than a half of Cu. Therefore, Sn filled TSV is less affected by stress than Cu filled TSV. As a result of mixing and filling with Sn and Cu powder by a ball milling and melting, it was reported that the thermal stress was greatly reduced as compared with Cu. Some studies are also being investigated to fill the inside TSV with other metals instead of Cu and to suppress the protrusion by adding a metal with a low coefficient of thermal expansion of Cu [8–11]. Silicon carbide (SiC) as a material with very high covalent bonding has excellent mechanical and chemical properties such as high temperature strength, hardness, high thermal conductivity, excellent oxidation resistance and abrasion resistance [12–14]. Therefore, it is widely used for high-temperature structural materials and abrasives. SiC is known to be very effective for heat dissipation because it has a thermal conductivity similar to that of Cu. Generally, it is known that the composite plating layer has better properties such as abrasion resistance, heat resistance, corrosion resistance and non-stickiness than a single plating layer when electroplating is performed by adding fine powder. Therefore, in this study, SiC powder with low coefficient of thermal expansion of Cu was added in order to suppress TSV Cu extrusion, and then composite plating was performed. And then, the extrusion behavior of the Cu composite plating layer after composite plating was analyzed.
⁎ Corresponding author at: University of Seoul, Department of Materials Science and Engineering, 90, Junnong-dong, Dongdaemun-gu, Seoul 130-743, Republic of Korea. E-mail address: [email protected] (S.-H. Kee).
https://doi.org/10.1016/j.mee.2019.04.019 Received 4 September 2018; Received in revised form 17 April 2019; Accepted 18 April 2019 Available online 20 April 2019 0167-9317/ © 2019 Elsevier B.V. All rights reserved.
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2. Experimental A p-type (100) single crystal Si wafer (Prulong, Ukraine) having a diameter of 152.4 mm and a thickness of 525 μm was used as a substrate for filling by Cu-SiC composite plating method in TSV. After forming a pattern on the Si wafer surface, a vertical via having a diameter of 30 μm and a depth of 60 μm was formed by the DRIE process. After the SiO2 layer which is the role as insulating layer has been deposited to a thickness of 1 μm using HDP CVD (high density plasma chemical vapor deposition) inside the formed vertical via. And Ti (3000 Å) and Cu (5000 Å), which is the role as an adhesive layer and a seed layer, were deposited using a sputtering process. Finally Cu-SiC was filled on it. Before filling Cu-SiC inside the TSV, electroplating was performed on oxygen free Cu plate (99.9%) with a size of 1 × 1 × 0.3 cm to confirm the plating characteristics of it [15]. After polishing the surface of the Cu plate, it was immersed in a 2% HCl aqueous solution for 1 min and then washed with distilled water. The plating solution for Cu-SiC composite plating was composed of CuSO4·5H2O 200 g/L, SiC powder 5 to 25 g/L, H2SO4 0 to 60 ml/L and surfactant. In order to investigate the plating characteristics, the polarization curves were measured while changing the amounts of H2SO4 and surfactant from 12 to 60 ml/L and 50 to 250 ppm, respectively. Electrolytic plating was carried out at room temperature and was agitated using a magnetic bar during plating. EPP 4000 (Princeton Applied Research) was used as the current applying device. A Pt plate (99.9%) with a size of 1 × 1 × 0.3 cm was used as an anode and a saturated calomel electrode (SCE, saturated calomel electrode) was used as a standard electrode. After analyzing the plating characteristics of Cu-SiC on the Cu plate, the TSV with a size of 30 μm in diameter and 60 μm in depth was filled with Cu-SiC. In order to compare with the protrusion of Cu-SiC composite plating, Cu was filled in the same size a TSV. Plating characteristics, surface and protrusion behavior before and after the heat treatment were observed using FE-SEM (field emission scanning electron microscope), and EPMA (electron probe micro analyzer) was used for measurement of composition inside a TSV. AFM (atomic force spectroscope) device was used to quantitatively compare the protrusion heights of Cu and Cu-SiC after annealing.
Fig. 1. Tafel curve according to content of H2SO4.
area decreases, the applied current density per unit area will increase. In that case, an abrupt current density rise causes an irregular region as shown in Fig. 2 [21–24]. Fig. 2 shows the change of the Tafel curves according to the content of surfactant (SDS) added to the plating solution. In the Tafel curve when surfactant is not added, it can be seen that the current density decreases almost linearly as the cathode overpotential decreases. However, as the content of surfactant in the plating solution increased to 100 ppm or more, it was possible to observe the phenomenon that the current density increased when the cathode overpotential was −0.97 V. Moreover, when the content of surfactant is 100 ppm or more, it was possible to know that plating starts from about −0.97 V without changing the cathode overpotential [25,26]. This is probably because the amount of surfactant has already reached saturation state and is greater than the amount of SiC powder that form a conjugate called “clouding” with cation or surfactant in plating solution. Fig. 3 shows the surface images of the plating layer according to the content of H2SO4 in Cu-SiC composite plating. When H2SO4 was not added, little SiC powder was found on the surface. However, as the content of H2SO4 increased, SiC powders began to be observed on the surface. Therefore, as the SO42− ions increase in the plating solution,
3. Results and discussion 3.1. Cu-SiC composite electroplating In order to investigate about the characteristics of Cu-SiC composite electroplating, the Tafel curves according to the content of H2SO4 and SDS (sodium dodecyl sulfate, surfactant) in the plating solution were measured. Fig. 1 shows the results of measurement while varying the H2SO4 content from 0 to 60 ml/L. The Tafel curves were measured from 0 V to −1.5 V at a reduction potential change rate of 1 mV/s. It was confirmed that the early stage with high reduction potential had a typical Tafel curve shape [16]. In addition, a phenomenon in which the current density rapidly increases with increasing the content of H2SO4 was observed. It is considered that surfactants and SiC powder are adsorbed on the plating layer due to the composite plating mechanism at the same time [17,18]. Unlike alloy plating, there is no co-deposition region in the composite plating process. When a particle in the plating solution is added, it combine with surfactant or cation which is in the role of additive in the plating solution to form a conjugate called “clouding”. These clouding move to the cathode side through convection and diffusion, and they are plated simultaneously when metal ions were plated on the cathode. At this time, the plating surface area of the cathode instantaneously decreases as the particle moved towards the cathode is adsorbed to the cathode surface [19,20]. Under the Galvanostat mode in which the applied current is fixed, if the plating surface
Fig. 2. Tafel curve according to content of surfactant (SDS).
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Fig. 3. Microstructure of Cu-SiC deposits according to content of H2SO4; (a) not added, (b) 3 ml, (c) 6 ml, (d) 9 ml, (e) 12 ml, (f) 15 ml.
the amount of SiC powder forming “clouding” increases, so the amount of SiC powder adsorbed on the cathode surface increases. This phenomenon is consistent with the result of change in the surfactant content. Fig. 4 shows the changed images of the surface as the content of surfactant (SDS) changes. SiC powder was almost not observed on the surface of the plating layer containing 50 ppm of surfactant. However, as the content of surfactant increased from 100 ppm to 250 ppm, it was confirmed that more SiC powder was observed than the plating solution added with 50 ppm. Likewise, as the amount of surfactant increases in the plating solution, and the amount of SiC powder adsorbed on the cathode surface can be increased because the surfactant that bonds with SiC powder increases. In order to see the shape of SiC powder adsorbed
by these mechanisms in more detail, the surface of the plating layer after etching was analyzed. Based on previous results, the plating solution for observing the surface of the Cu-SiC plated layer after etching was based on CuSO4·5H2O, H2SO4, surfactant and here it was prepared by adding 5 to 25 g/L SiC powder. Electroplating was performed using DC current of 600 mA/cm2. Fig. 5 shows the surface of the Cu-SiC plated layer after etching. The added SiC powder is α phase with an average diameter of 0.5 μm, and it has a HCP (hexagonal close packed) structure. Alpha silicon carbide (α-SiC, 6H) is produced at temperature higher than 1700 °C, and has higher thermal conductivity (490 W/m·K) than that of β-SiC (cubic structure) [12]. The etching solution was prepared by adding hydrochloric acid and iron (III) chloride to distilled
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Fig. 4. Microstructure of Cu-SiC deposits according to content of surfactant(SDS); (a) 50 ppm, (b) 100 ppm, (c) 150 ppm, (d) 200 ppm, (e) 250 ppm.
water and the Cu-SiC plated specimen was immersed in this solution for several seconds and then washed. The surface of the Cu-SiC plated layer was observed with a scanning electron microscope. A α-SiC with hexagonal structure was observed on the surface after etching. The SiC powder partially agglomerated, but it spread evenly over the entire plated layer. In order to investigate the change in the Vickers hardness value after addition of SiC powder, The Vickers hardness of the Cu-SiC plated layer was compared with that of the Cu electroplated layer. The Vickers hardness values were measured using a micro hardness tester (Mitutoyo MVK-H1). The result of Vickers hardness value was
calculated on the basis of the Eqs. (1) and (2) after measuring 5 times for each specimen under a load of 0.01 kgf (kilogram-force) and the average value was taken.
Hv = 1.8544 ×
d=
d1 + d2 2
P d2
(1) (2)
Here, P is the applied load, and d is the diagonal of indention. Fig. 6 is a bar graph comparing the Vickers hardness of the plating
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Fig. 5. Microstructure of Cu-SiC deposits after etching.
layer, respectively. The reason for obtaining these results is considered to be that recrystallization and grain growth occurred during the annealing process. In general, the dislocation density and strength decrease and the ductility of the metal increases when recrystallization and grain growth occur [27,28].
200 180 160
Before annealing After annealing
Hardness, Hv
140 120
3.2. Cu-SiC composite plating for filling in TSV
100
The plating solution for filling Cu-SiC inside the TSV was prepared with the composition of CuSO4·5H20 200 g/L, H2SO4 12 ml/L, surfactant 150 ppm and SiC powder 25 g/L. The PPR current waveform was used for plating conditions. After the plating solution was manufactured, it was stirred for 1 h using an ultrasonic stirring device (UE100) and then the electroplating was carried out. Fig. 7(a) shows a cross-sectional image after Cu-SiC composite plating. It can be confirmed that the inside of the TSV having a diameter of 30 μm and a depth of 60 μm is completely filled without defects. Fig. 7(b) shows image after etching the specimen for several seconds in the etching solution containing distilled water, hydrochloric acid and iron (III) chloride to check the presence or absence of SiC powder inside TSV. It was confirmed by scanning electron micrographs that SiC powder exists inside TSV. Fig. 8 shows the detail shapes of via top, via side wall and via bottom by enlarging the image in Fig. 7. In this figure, a large number of α-SiC having a hexahedral structure was identified. The results of measuring the Vickers hardness of TSV filled with Cu-SiC are shown in Fig. 9. The Vickers hardness value was measured by 99.52 Hv in the case of the Cu plated layer and 173.11 Hv in the case of the CuSiC plated layer, respectively. These values were similar to that of the plated layer on the oxygen free Cu plate. Similar to the results of the previous Cu plate plating, the Vickers hardness in the TSV after
80 60 40 20 0
Cu
Cu-SiC
Fig. 6. Comparison Vickers hardness of Cu with Cu-SiC on Cu plate.
layer by Cu-SiC composite plating and that of the plating layer by Cu electrolytic plating. Asnavandi et al. reported that the Vickers hardness of the plated layer with SiC added to CueSn has a value about 10 to 40% higher than the Vickers hardness of the plated layer without any additives [13]. In this study, the Vickers hardness of the Cu electroplated layer was 100.2 Hv. The Vickers hardness of the Cu-SiC composite plated layer was 173.7 Hv, which was about 73% higher than that of the Cu plated layer. The Vickers hardness of the plated layer that was annealed at 450 °C for 30 min was measured by 60.84 Hv in the case of the Cu plated layer and 150.7 Hv in the case of the Cu-SiC plated
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Fig. 7. Cross section of Cu-SiC composite plating; (a) Cu-SiC filled, (b) etched.
Fig. 8. Cross section of inner TSV (a) top, (b) side wall, (c) left bottom and (d) right bottom.
annealing at 450 °C for 30 min was measured by 62.94 Hv in the case of the Cu plated layer and 151.16 Hv in the case of the Cu-SiC plated layer, respectively. These results are also due to recrystallization and grain growth during annealing process. Fig. 10 shows EPMA mapping results of the cross section of TSV filled with Cu-SiC. It was confirmed that the
SiC powder was evenly distributed on the surface and the inside of via. Considering that the addition amount of SiC powder is 25 g/L, it could be seen that the SiC powder was sufficiently diffused inside the TSV through agitation in the current off-time section of the PPR current waveform [29]. As a result of quantitative analysis in TSV filled with
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polishing the surface of the TSV filled with Cu-SiC using a 1 μm diamond paste. The annealing process was carried out for 30 min after heating to 450 °C at a rate of 5 °C per minute. Fig. 11 shows the image after polishing the surface of TSV filled with Cu and Cu-SiC. Generally, when polishing with a 1 μm diamond paste, the surface of Cu whose hardness is relatively lower than that of Si is deeply more polished. At this time, when the height of the Si wafer is taken as a reference, the surface of Cu and Cu-SiC was about 428 nm and 70 nm down from the Si surface, respectively. As described in Section 3.1, it is considered that the polished depth of Cu-SiC was lower than that of Cu because the hardness of Cu-SiC was higher than that of Cu. Heryanto et al. reported about the extrusion height of Cu after Cu filling in the TSV that was conducted with a diameter of 5 μm and a depth of 50 μm and annealed at 250 to 450 °C for 30 min [9]. The extrusion height was reported to be 190 μm at 250 °C and 1 μm at 450 °C, which increased according to the temperature. Kumar et al. filled with Cu in a tapered TSV with a diameter of 100 μm (top diameter), 85 μm (bottom diameter) and depth of 110 μm and then annealed at 425 °C for 30 min in a vacuum state of 10−4 Torr [3]. After the annealing process, a thermal shock test (−25 to 135 °C, 25 to 450 °C) was additionally carried out and the Cu extrusion height was observed. As the thermal shock cycle increases, the extrusion height of Cu was increased up to 3 μm. In this study, mechanically polished Cu-SiC TSV samples were annealed at 450 °C for 30 min and then the extrusion behavior was analyzed. In order to compare and analyze the extrusion behavior of Cu-SiC composite plating, Cu was filled in the same shape via, and then annealing process was also carried out. As can be seen from the AFM measurement result in Fig. 12, it was confirmed that the extrusion height from the surface after annealing process was about 692 nm for Cu and about 94 nm for
200 180 160
Before annealing After annealing
Hardness, Hv
140 120 100 80 60 40 20 0
Cu
Cu-SiC
Fig. 9. Comparison Vickers hardness of Cu with Cu-SiC in TSV.
Cu-SiC, the average composition of Cu, Si and C was 96.635 wt%, 1.924 wt% and 1.941 wt%, respectively. 3.3. Extrusion behavior in TSV after annealing In this section, the surface of Cu-SiC plated was observed to identify about the extrusion behavior of Cu-SiC filled in TSV after annealing. The sample filled with Cu-SiC for measurement was prepared by filling under the same as Cu electroplating conditions for comparison with the extrusion behavior of Cu. The samples for annealing were prepared by
Fig. 10. EPMA analysis of Cu-SiC filled TSV cross section.
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Fig. 11. Cu and Cu-SiC filled via after mechanical polishing; (a) surface of Cu, (b) surface of Cu-SiC, (c) cross section of Cu, (d) cross section of Cu-SiC.
Cu-SiC, respectively. Add to this, when the results of the previous mechanical polishing are supplemented, it was confirmed that the extrusion height of Cu and Cu-SiC was about 1.12 μm and 164 nm, respectively. This is a height corresponding to 14.6% of the extrusion height of Cu. These results are considered to be the result of extremely effectively suppressing the extrusion phenomenon after annealing by adding SiC powder with a low coefficient of thermal expansion into the conventional Cu plating solution. However, in order to become commercialized, more detailed analysis will be carried out on the lifetime and stability of Cu-SiC composite plating solution and its application to TSV of fine diameter, etc. [30]. Nevertheless it can be seen that the method carried out in this study is a method closer to a more fundamental solution than previously studied methods that required additional processing such as post annealing treatment etc.
(2)
(3)
(4)
4. Conclusions In this study, in order to suppress the extrusion of Cu in the TSV, CuSiC composite plating solution also was made by adding SiC powder with low thermal expansion coefficient to conventional Cu plating solution. Using the produced plating solution, it was filled in a vertical via having a diameter of 30 μm and a depth of 60 μm. And then the plating characteristics were analyzed and compared with the protrusion of Cu. The results are summarized as follows.
(5)
(6)
(1) In order to investigate about the characteristics of Cu-SiC composite electroplating, Tafel curve was measured while varying the contents of H2SO4 and SDS in the plating solution from 0 to 60 ml/L and from 50 to 250 ppm, respectively. As a result, it was confirmed
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that the current density abruptly increases when the contents of H2SO4 and SDS are 6 ml/L and 100 ppm or more, respectively. After Cu-SiC was plated on the oxygen free Cu plate, the Vickers hardness of Cu-SiC plating layer was compared with that of the Cu plating layer. The hardness of Cu and Cu-SiC plating layer appeared at 100.2 Hv and 173.7 Hv, respectively, and the hardness of the CuSiC plating layer was about 73% higher than that of the Cu plating layer. As a result of performing composite plating of Cu-SiC inside the TSV using the PPR current waveform with cathode current density of −8 mA/cm2 and anode current density of 40 mA/cm2, the TSV was filled without defects. Measurement of the Vickers hardness of TSV filled with Cu and CuSiC showed 99.52 Hv for Cu and 173. 11 Hv for Cu-SiC, respectively. These results showed the same aspect as the hardness measurement result of the plating layer plated on the oxygen free Cu plate. As a result of EPMA mapping of the cross section of the TSV filled with Cu-SiC, the SiC powder was evenly located on the surface and the inside of via. Quantitative analysis in TSV filled with Cu-SiC showed that Cu was about 96.635 wt%, Si was 1.924 wt% and C was 1.941 wt% on average. The TSV sample filled with Cu and Cu-SiC was annealed at 450 °C for 30 min and then the extrusion behavior was analyzed. As a result, the extrusion height of Cu and Cu-SiC was about 1.12 μm and 164 nm, respectively. It was confirmed that the extrusion of Cu-SiC seems to be suppressed by about 84.5% compared to that of Cu.
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Fig. 12. AFM results of Cu and Cu-SiC extrusion from Si surface; (a) polished Cu, (b) annealed Cu, (c) polished Cu-SiC, (d) annealed Cu-SiC.
Acknowledgements
[3] P. Kumar, I. Dutta, M.S. Bakir, Interfacial effects during thermal cycling of Cu-filled through-silicon Vias (TSV), J. Electron. Mater. 41 (2) (2012) 322–335. [4] B. bandevelde, A. Ivankovic, B. Debecker, M. Lofrano, K. Vanstreels, W. Guo, V. Cherman, M. Gonzalez, G.V.d. Plas, I.D. Wolf, E. Beyne, Z. Tokei, Chip-package interaction in 3D stacked IC packages using finite element modelling, Microelectron. Reliab. 54 (2014) 1200–1205. [5] S.K. Ryu, T. Jiang, J. Im, P.S. Ho, R. Huang, Thermomechanical failure analysis of through-silicon via interface using a shear-lag model with cohesive zone, IEEE Trans. Device Mater. Reliab. 14 (1) (2014). [6] S.H. Kee, J.O. Shin, I.H. Jung, W.J. Kim, J.P. Jung, TSV filling technology using cu electrodeposition, J. Weld. Join. 32 (3) (2014) 11–18. [7] Y.K. Ko, M.S. Kang, S.H. Yoo, C.W. Lee, High speed TSV filling technology by using molten solder and fabrication of composite solder as filler material, J. KWJS 30 (3) (2012) 219–223. [8] A. Vilinska, S. Ponnurangam, I. Chernyshova, P. Somasundaran, D. Eroglu, J. Martinez, A.C. West, Stabilization of silicon carbide (SiC) micro- and nanoparticle
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MOE) (No. 2017R1D1A1B03030034). References [1] C.C. Lee, C.C. Huang, Induced thermo-mechanical reliability of copper-filled TSV interposer by transient selective annealing technology, Microelectron. Reliab. 55 (2015) 2213–2219. [2] I.D. Wolf, K. Croes, O.V. Pedreira, R. Labie, A. Redolfi, M.V.D. Peer, K. Vanstreels, C. Okoro, B. Vandevelde, E. Beyne, Cu pumping in TSVs: effect of pre-CMP thermal budget, Microelectron. Reliab. 51 (2011) 1856–1859.
13
Microelectronic Engineering 214 (2019) 5–14
S.-H. Kee, et al.
[9] [10] [11]
[12] [13] [14] [15] [16] [17] [18] [19]
dispersions in the presence of concentrated electrolyte, J. Colloid Interface Sci. 423 (2014) 48–53. A. Heryanto, W.N. Putra, A. Trigg, S. Gao, W.S. Kwon, F.X. Che, X.F. Ang, J. Wei, R. I. Made, C.L. Gan, K.L. Pey, Effect of copper TSV annealing on via protrusion for TSV wafer fabrication, J. Electron. Mater. 41 (9) (2012) 2533–2542. M. Albano, R.B. Morles, F. Cioeta, M. Marchetti, Coating effects on thermal properties of carbon and carbon silicon carbide composites for space thermal protection systems, Acta Astronaut. 99 (2014) 276–282. F. Inoue, H. Philipsen, A. Radisic, S. Armini, Y. Civale, P. Leunissen, M. Kondo, E. Webb, S. Shingubara, Electroless Cu deposition on atomic layer deposited Ru as novel seed formation process in through-Si vias, Electrochim. Acta 100 (2013) 203–211. K. Fujiwara, A. Ishii, T. Abe, K. Ando, Epitaxial growth of ZnO crystal on the Siterminated 6H-SiC(0001) surface using the first-principles calculation, J. Surf. Sci. Nanotechnol. 4 (2006) 254–257. M. Asnavandi, M. Ghorbani, M. Kahram, Production of Cu–Sn–graphite–SiC composite coatings by electrodeposition, Surf. Coat. Technol. 216 (2013) 207–214. M. Imboden, P. Mohanty, Dissipation in nanoelectromechanical systems, Phys. Rep. 534 (2014) 117. S.H. Kee, W.J. Kim, J.P. Jung, Reflection characteristics of electroless deposited Sn3.5Ag for LED lead frames, Surf. Coat. Technol. 235 (2013) 778–783. B.W. Wang, C.Y. Lee, H.B. Lee, The influences of monoethanolamine additive on the properties of nickel coating electroplated in post supercritical carbon dioxide mixed Watts bath, Surf. Coat. Technol. 337 (2018) 232–240. H. Yang, F. Li, X. Wu, P. Zhang, W. Li, S. Cao, Y. Shan, L. Sun, Improving the performance of water splitting electrodes by composite plating with nano-SiO2, Electrochim. Acta 281 (2018) 60–68. D. Zhang, X. Cui, G. Jin, Z. Cai, B. Lu, Microstructure and mechanical properties of electro-brush plated Fe/MWCNTs composite coatings, Surf. Coat. Technol. 348 (2018) 97–103. Y. Zhou, F.Q. Xie, X.Q. Wu, W.D. Zhao, X. Chen, A novel plating apparatus for electrodeposition of Ni-SiC composite coatings using circulating-solution co-
deposition technique, J. Alloys Compd. 699 (2017) 366–377. [20] Q. Zhao, S. Tan, M. Xie, Y. Liu, J. Yi, A study on the CNTs-Ag composites prepared based on spark plasma sintering and improved electroless plating assisted by ultrasonic spray atomization, J. Alloys Compd. 737 (2018) 31–38. [21] J. Vazquez-Arenas, T. Treeratanaphitak, M. Pritzker, Formation of Co–Ni alloy coatings under direct current, pulse current and pulse-reverse plating conditions, Electrochim. Acta 62 (2012) 63–72. [22] L. Hofmann, R. Ecke, S.E. Schulz, T. Gessner, Investigations regarding through silicon via filling for 3D integration by periodic pulse reverse plating with and without additives, Microelectron. Eng. 88 (2011) 705–708. [23] Z. Liu, A.C. West, Modeling of galvanostatic pulse and pulsed reverse electroplating of gold, Electrochim. Acta 56 (2011) 3328–3333. [24] M.Y. Cheng, K.W. Chen, T.F. Liu, Y.L. Wang, H.P. Feng, Effects of direct current and pulse-reverse copper plating waveforms on the incubation behavior of self-annealing, Thin Solid Films 518 (2010) 7468–7474. [25] H.C. Chuang, H.M. Yang, G.L. Wu, J. Sanchez, J.H. Shyu, The effects of ultrasonic agitation on supercritical CO2 copper electroplating, Ultrason. Sonochem. 40 (2018) 147–156. [26] C. Song, P. He, T. Lin, H. Wei, W. Yang, Electroplating assisted diffusion bonding of ZrC–SiC composite for full ceramic joints, Ceram. Int. 40 (2014) 7613–7616. [27] M. Stangl, M. Liptak, A. Fletcher, J. Acker, J. Thomas, H. Wendrock, S. Oswald, K. Wetzig, Influence of initial microstructure and impurities on Cu room-temperature recrystallization (self-annealing), Microelectron. Eng. 85 (2008) 534–541. [28] C.C. Chen, C.H. Yang, Y.S. Wu, C.E. Ho, Depth-dependent self-annealing behavior of electroplated Cu, Surf. Coat. Technol. 320 (2017) 489–496. [29] S.H. Kee, W.J. Kim, J.P. Jung, M.H. Choi, Effect of via pitch on the extrusion behavior of Cu-filled TSV, Korean J. Met. Mater. 56 (6) (2018) 449–458. [30] P. Bayat, D. Vogel, R.D. Rodreguez, E. Sheremet, D.R.T. Zahn, S. Rzepka, B. Michel, Thermo-mechanical characterization of copper through-silicon vias (Cu-TSVs) using micro-Raman spectroscopy and atomic force microscopy, Microelectron. Eng. 137 (2015) 101–104.
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