Electric Power Systems Research 130 (2016) 181–191
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Current-sensorless control of an SPWM H-Bridge-based PFC rectifier designed considering voltage sag condition Juan Ramón Rodriguez-Rodrıguez a,∗ , Edgar L. Moreno-Goytia a , Vicente Venegas-Rebollar a , David Campos-Gaona b , Ramon A. Felix c , Luis E. Ugalde-Caballero a a
Ingeniería Eléctrica, Instituto Tecnológico de Morelia, Morelia, MICH, Mexico University of British Columbia, Electrical and Computer Engineering, Vancouver, BC, Canada c University of Colima, at the Faculty of Mechanical and Electrical Engineering, Villa de Álvarez, COL, Mexico b
a r t i c l e
i n f o
Article history: Received 4 March 2015 Received in revised form 12 July 2015 Accepted 7 September 2015 Keywords: AC–DC power conversion PFC converter SPWM rectifier Sensorless current Single-loop PI DC regulation
a b s t r a c t This paper presents and details the H-Bridge PFC rectifier control scheme. This control is a step forward in sensorless current control schemes for performance improvements of single-phase bidirectional rectifiers. The H-Bridge PFC rectifier is designed based on a single PI controller loop fed by DC reference signals. Regarding dynamic operating conditions, the proposed control can maintain a regulated DC voltage under varying conditions at input (voltage sags) and output (load step changes) ports while maintaining an unitary power factor (PF) and constant THD current input at any of these conditions. Different to other investigations, this control proposal uses SPWM, does not require a variable transformation into the dq0 reference frame, and the complex compensators accompanying to the PI controller stage are no longer needed. Therefore, this proposal is aimed to reduce the complexity of the control scheme and to improve the overall dynamic response of the PFC rectifier. The experimental results obtained from the scaled-down prototype setup, which was built for research purposes, validate the control law, mathematical model and quantitative comparison between simulation and experiment, both considering the parasitic resistances of the inductor and semiconductor switches. © 2015 Elsevier B.V. All rights reserved.
1. Introduction The AC to DC conversion is a process included, as a single stage or paired to other conversion stages, in a wide variety of medium- and low-voltage industrial applications such as DC arc furnaces, battery chargers, motor drivers and power supplies for various other applications [1,2]. In addition, in the field of distributed generation in power distributions grids, active rectifiers play an important role in micro and nano wind power generation systems [3]. Along with the increasing penetration of active PWM rectifiers into distribution grids, concerns about power quality (PQ) have also grown [4,5]. Several IEEE and IEC standards and recommendations specify regulations for PQ phenomena. In particular, the IEC 1000-3-2 establishes limits to harmonic current emission from electronic and electrical equipment connected to public low-voltage supply systems [6,7].
∗ Corresponding author. Tel.: +52 14432666101. E-mail address: jr
[email protected] (J.R. Rodriguez-Rodrıguez). http://dx.doi.org/10.1016/j.epsr.2015.09.005 0378-7796/© 2015 Elsevier B.V. All rights reserved.
The pursuit for comply with this standard has motivated the development of various active methods for power factor correction, PFC, and PQ improvements [8]. To address this, various PFC topologies have been proposed in the literature [9,10]. Examples of these are boost converters [18–21], Vienna rectifiers [22,23] and H-bridge converters [13–15]. It should be mention that the latter is the only topology with bi-directional flow [8]. Table 1 presents a comparison between various single-phase PFC rectifiers and the proposed scheme. The current trend, in relation to the mass production of power electronics, is to develop low-cost as well as produce reduced-size PFC rectifiers. In this direction, sensorless techniques represent an attractive option to meet these requirements as long as the complexity of the control algorithms and the computational processing required do not be an obstacle. In Table 1, a number of rectifiers are listed including sensorless techniques [19–23], but these are applied only to unidirectional boost topologies. The boost PFC topology contains discontinuities in the zero-crossing current waveform [24]. Such characteristics increase the total harmonic distortion (THD) injected into the AC network. The increment in the
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Table 1 A Comparison of single phase PFC rectifier characteristics.
Proposed technique [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [22] [23] [22] [23]
AC or DC current sensorless √
Single PI √ √
DC signals in PI loop √ √ √
√
√
√ √
√ √ √ √
√ √ √ √ √ √
√ √ √ √ √ √
Without dq0 demodulator √ √ √ √ √ √
Bidirectional flow √ √ √ √ √ √ √ √
√ √ √ √ √
√ √
√
commutation frequency helps to reduce the THD, but this action implies a reduction in the overall efficiency [25]. An alternative approach for THD reduction is the use of LCL filters [26,27]. However, these filters increase the size and cost of the rectifier. The most common technique implemented in single-phase rectifiers, having an H-Bridge topology, is fully described in [1,13]. This technique uses a single-loop feedback. The input current and the input and output voltages are taken as the feedback variables. The application of sinusoidal signals in the PI controls causes a phase shift between the control variable and the reference variables. To avoid this shift, a number of authors recommend the application of lead and lag compensators. However, these compensators increase the order of the controller transfer function and subsequently the complexity of the control algorithms [28]. In contrast, in the case of PI controls for single-phase rectifiers that use DC variables, a number of authors choose to apply the dq0 frame with demodulators and thus obtaining three-phase variables from single-phase variables and vice versa as demonstrated in [11–14]. This technique is a solution to the phase shift, but the higher complexity of the system and algorithms makes necessary the use of two feedback loops, increasing the software resources. Regarding the control PFC for H-Bridge rectifiers, the application of only two voltage sensors is one of the few available options in the open literature [15]. This type of rectifiers commutes by force only two of the four switches. The switch to commute is selected based on the estimated IDC polarity (DC-side). According to this operational procedure, which is based on the principle of operation of the dual boost PFC rectifier – also known as bridgeless PFC boost rectifier [18] – both a mathematical model and a control rule are obtained. In general, PFC rectifiers-based on boost, boost-bridgeless or dual boost control can hardly deal with voltage sags and its THD has great variations depending on the input voltage level and the rectifier rating power [15,18]. Both latter characteristics lower the PQ and the PF. Contrary to the technique aforementioned, in this paper the H-Bridge is modelled using an AC source, and the control rule is obtained using the basic theory of bidirectional power flux between two CA sources connected by an inductance [29]. With this technique, the input current is maintained at low harmonic distortion regardless of the current direction or rectifier power which is an important contribution. The most relevant advantages obtained with the proposed rule control, when comparing to [15] and [19–23] for instance, are: (i) Continuous regulation of VDC and PF = 1 under normal and abnormal conditions (voltage sags at input for instance) at the AC-side; (ii) The control system is implemented by a PI and only other four additional mathematical operations, as shown in Fig. 1(b), and (iii) the SPWM implemented does not need additional commutations rules or algorithms for commuting
SPWM modulation √ √ √ √ √
the electronic switches. In this way commutation losses are reduced and the resulting THD, for steady-state current, is lower than 5% under different input and output conditions. An additional advantage of the proposed control is its relative lower complexity respective to than other options, having at the same time, better PQ performance. The latter is obtained without the usage of current sensors or DC-side current estimation, characteristic which reduce the size of the H-bridge rectifier. Using VDC as the feedback variable, the magnitude and angle of the voltage at the inductor terminals, VL , can be controlled. This control action also helps to control the flow direction and magnitude of IL , and from there, the charge and discharge of capacitor C can be managed. The following paper sections thoroughly details the proposed technique, the small-signal model of the PFC rectifier, the developed control scheme, the cases of study and the experimental results. 2. Principle of operation 2.1. H-Bridge modeling Fig. 1(a) shows the H-bridge-based, single-phase rectifier connected to the grid, at a voltage VGRID , with impedance L + Rp + RDSON . L is the internal inductance of the rectifier, Rp is the parasitic resistance and RDSON considering the average losses conduction on power switches. Fig. 1(b) shows the proposed current sensorless control diagram, which is analyzed throughout the paper. As is shown in Fig. 1(a), the fundamental current IL flows from the grid to the rectifier. VPWM is the voltage at the AC-side of the rectifier, and VDC is the DC voltage across the capacitor C. The load current, IRL , is related to the capacitor current IC by IDC = IC + IRL . IDC is the H-bridge output current. The correct operation of the H-bridge (given its boost-type operation) requires that VDC > |VGRID |. For a 3-level SPWM scheme, the commutation functions S1 and S2 of the converter are defined as shown in Table 2. For illustration purposes, it is convenient to analyze the case where the VPWM operates with three voltage levels, defined in the set {+VDC , 0, −VDC }, governed by the switching functions S1 and S3 , defined in the set discreet {0, 1}, It can be concluded that the aforementioned considerations result in a discrete system, in other Table 2 3-Level SPWM commutation functions. S1 = S2
S3 = S4
VPWM
IDC
1 1 0 0
0 1 0 1
VDC 0 0 −VDC
IL 0 0 −IL
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Fig. 1. Active SPWM, H-bridge rectifier with the proposed control method.
hand, assuming a frequency commutation, fcom , ten times higher than the line frequency, fline , that is, fcom > 10 fline , then an average model can be valid based on the variable modulation index “D” defined as a sinusoidal variable in the continuous set [−1,1], which can be used to represent the average (in a switching cycle) of the voltage and current relations of the rectifier [30]. Using Table 2, and modulation index D, these can be expressed using the average local operation over the switching period Tcom = 1/fcom .
t+Tcom
VPWM =
(S1 − S3 ) VDC ds = D ∗ VDC
(1)
t
Assuming that the VGRID vector is parallel to the imaginary axis of the complex plane, then it can take the form VGRID = V ∗ sin (ωt)
(5)
VL leads IL . To calculate a unitary power factor PF regardless of the magnitude of VL , IL should have the form VL ≈ Ax ∗ cos (ωt)
(6)
and
t+Tcom
IDC =
2.2. Vector operation for VPWM
(S1 − S3 ) IL ds = D ∗ IL
(2)
VL IL ≈
(7)
XL
t
The time-domain voltage equations of the rectifier are: RDSon + Rp d (IL ) VDC 1 =− IL − D + VGRID L L L dt
(3)
1 VDC d (VDC ) = IDC − C C ∗ RL dt
(4)
Using (3) and (4), the rectifier-equivalent AC and DC circuits can be represented with dependent sources as shown in Fig. 2. The input-output power transfer (between the delivery node at VGRID and the reception node at VPWM along with IL can be obtained using equivalent equations.
In (6), Ax represents the magnitude of the voltage vector applied to L as depicted in Fig. 3 for a lossless system (Rp + RDSON = 0). The magnitude and phase of vector VPWM can be dynamically varied to maintain VL and VGRID in quadrature. From analyzing Fig. 3, it is possible to confirm that VL depends on both VGRID and small increases in phase and magnitude of VPWM . This characteristic helps to retain the sinusoidal waveform at its nominal waveform, thus ensuring low current THD in IL , independently of its own magnitude. In order to compensate the reactive power at the AC side of the circuit in Fig. 2, the voltage across the rectifier is controlled by the vector VPWM using: VPWM ≈ VGRID − Ax ∗ cos (ωt) .
(8)
Fig. 3 shows the vector diagram of the main variables of the AC circuit at different magnitudes and angles (ϕ) for the VPWM vector located in the first quadrant. VPWM is defined as:
VPWM = V 2
GRID
Fig. 2. Equivalent circuit of the active H-bridge PWM single-phase rectifier.
∅ = tan−1
V
GRID
VL
+ VL2
(9)
(10)
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Solving for IL from (18) we find IL (s) =
VGRID − D ∗ VDC . sL + RDSon + Rp
(19)
Eq. (19) expresses IL as a function of VGRID and D. Eqs. (17) and (19) represent the AC-side (VGRID and IL ) and DC-side of the rectifier (VDC ), respectively. 2.4. Control law Before obtaining a control law dedicated to regulate VDC and to maintain the rectifier at PF = 1, it is first necessary to obtain an approach for determining D. This can be done by equating (1)–(8), which gives: D≈
VGRID − Ax ∗ cos (ωt) VDC
(20)
Let D be expressed in the frequency domain as:
D≈
Fig. 3. VPWM vector space for the single-phase rectifier.
If VGRID = const. (in magnitude and phase), then the active power, P, magnitude injected into the rectifier AC side can be controlled, based on (8), by Ax. Therefore P can be expressed as: VGRID ∗ VPWM P= sin (∅) 2XL
(11)
where Ax remains as the only control variable.
VGRID (s) − Ax s/s2 + ω2
The active power flowing through the circuit of Fig. 2 depends on VL , which in turn depends on Ax. For this reason, Ax is the variable of interest for controlling VDC in closed-loop conditions. As a way to realize a method to improve controllability, a new reference variable VDC ref and a PI block are introduced in the original control loop. Under these considerations, Ax can be expressed as:
Ax ≈ VDCref − VDC
D (s) ≈
2 d VDC d (WDC ) 1 = C∗ 2 dt dt
Kp
s + Ki /Kp
(22)
s
VGRID (s) − VDCref − VDC (s)
Kp s + Ki /Kp /s s/s2 + ω2
VDC (s) (23)
= PDCin − PDCout
(13)
PDCin is given by: PDCin = IDC ∗ VDC
(14)
Substituting (2) into (14), PDCin is: PDCin = D ∗ IL ∗ VDC
(15)
PDCout is the power delivered to RL , which is: 2 VDC
(16)
RL
Substituting (15) and (16) into (13), solving for DC side or VDC transfer function, and applying a Laplace transform, we find: D ∗ IL . 1/2sC + 1/RL
(17)
For AC side or IL transfer function, applying a Laplace transform in (3) we find
(12)
WDC depends on the difference between the power injected at the input of the DC circuit, PDCin , and the power at its output, PDCout , which is defined by:
VDC (s) =
By substituting (22) into (21), D can be rewritten as:
The stored energy, WDC , in the capacitor C of Fig. 2 is:
PDCout =
1 2 C ∗ VDC 2
(21)
VDC (s)
2.3. Plant model
WDC =
sL ∗ IL (s) = − RDSon + Rp IL (s) + (VGRID − D ∗ VDC )
(18)
Due to VDC is always larger, in magnitude, than VGRID , (23) shows that 1 < D < 1 with the same operating vector space as VPWM . The full control scheme is shown in Fig. 4. The scheme, built using VDC from (17) and (19), considers the dynamic characteristics of the VDC voltage and current in the H-bridge topology. The external feedback loop is a PI implemented according to (23), using VDCref and VDC as constant references, is meant to control the DC bus voltage. This scheme also allows to get PF = 1 (the working vector space of VPWM assures a unity power factor) and be maintained for a wide range of load values using a single feedback loop. In this condition, no current sensors are required for IL . This provides the sensorless characteristic for this control scheme. The PI controllers have no compensation system (as is necessary if the references are sinusoidal) and do not require a dq0 transformation. The control structure, which is implemented based on Eqs. (17), (19) and (23), is shown in Fig. 4. The system is nonlinear and cannot be analyzed using Laplace transforms. Therefore, a small-signal model of the system is carried out in Section 3. 3. Small-signal model and PI tuning A well-designed linear control system based on PI regulators usually requires a small-signal model of the converter [31,32]. For the purposes of this research, this type of model can be obtained for the rectifier by linearizing (3) and (4) about a static operating point.
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185
Fig. 4. Controller and Plant model for the single-phase PFC rectifier using the proposed technique.
To achieve this linearization, the following averaging operation is carried out:
A10 can be obtained by substituting (32) into (21) and letting F2 = 0, which gives:
IL = x1 −
VDC = x2
A1 1 L x2 + RL C RDSon + Rp x2 C
D=u Ax = A1
A41
VGRID = V1 sin (ωt)
+ A21
−
1 RL C
x2
V12 + A21 = 0
2 RDS + Rp on L
(33)
2 x2 C
=0
(34)
Using the average values, the new plant model is described by: The positive root of (34) is:
RDSon + Rp VDC 1 x˙ 1 = − x1 − u + V1 sin (ωt) L L L
(24)
u 1 x2 x˙ 2 = − x1 − C C ∗ RL
(25)
2 1 1 2 RDSon + Rp 1 A10 = − + + . x2 x2 C
(26)
The operation points in x10 , x20 , and A10 are taken into the Jacobian of F1 and F2 , which gives
RL C
2
L
(35)
4
The proposed averaged control law indicates that: u≈
V1 sin (ωt) − A1 cos (ωt) x2
⎡
By using (26), (24) and (25), it can be proved that: x˙ 1 =
RDSon + Rp x1 − A1 cos (ωt) L
x˙ 2 = −
(27)
x1 x1 1 V1 sin (ωt) + A1 cos (ωt) − x2 x2 C x2 C RL ∗ C
a ∗ sin (t) + b ∗ cos (ωt) =
a2 + b2 ∗ sin ωt + tan−1
As = ⎢
⎣ ∂ (F ) 2 ∂x1
(28)
As shown in (27) and (28), the plant model depends on sinusoidal functions. The linearization of these equations can be carried out by manipulating the amplitudes, or peak values, of these sinusoidal expressions. The latter can be done only if such amplitudes are multiplied by a unity sinusoidal signal in (27), as shown in [33], and obtained (30). To accomplish this, it is necessary to take into account the phase difference between the two terms of Eq. (28). For this case, a suitable trigonometric identity is:
∂ (F1 ) ⎢ ∂x1
a
⎡
−
x˙ 2 ≈ F2 (x1 , x2 , A1 ) = −
1 x1 x2 + RL ∗ C x2 C
(30) V12 + A21
(31)
To complete the linearization process, the Jacobian is applied to the averaged model, which is evaluated at the operation point (IL ≈ x10 , VDC * ≈ x20 , Ax ≈ A10 ), and we find: x1 = A1
L RDSon + Rp
(32)
⎥ ⎥ Bs = ⎢ ⎣ ∂ (F ) ⎦ x1 = x10 ∂ (F2 ) ⎦ x1 = x10 1 ∂x2 ∂A1 x2 = x20 x2 = x20
(36)
A = A10
⎢
⎣ V12 + A210
As = ⎢
⎤
RDSon + Rp L
x20 C
⎤
∂ (F1 ) ⎢ ∂A1 ⎥
From (36), the resulting state equations of the small-signal model are:
(29)
RDSon + Rp x˙ 1 ≈ F1 (x1 , x2 , A1 ) = x1 − A1 L
⎡
A = A10
b
Applying (29) to (28), the averaged plant model without sinusoidal functions, gives in (31):
⎤
∂ (F1 ) ∂x2 ⎥
0
1 x10 − − 2 RL ∗ C x20 C Cs = [0 1]
V12 + A210
⎥ ⎥ ⎦
⎡
⎤
0
⎢
Bs = ⎣
⎥ ⎦
x A01
x20 C
10
V12 + A210
Ds = 0
(37)
As is a full-rank controllability matrix; therefore, the system is controllable. It is also verifiable that the transfer function is Hurwitz and, therefore, the poles of interest in the closed-loop control can be located at any point on the left side of the s plane. With this condition, the stabilization of the converter can be achieved, by means of the feedback, at points near the designed operation point. The frequency domain representation of the rectifier is obtained by applying a Laplace transform to the state equations in (37); this is:
G (s) = Cs(sI − As)−1 B + D U (s)
(38)
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Table 3 Parameter values for the simulation of the proposed rectifier.
10 kW 400 V 0.5 180sin(ωt) 120 rad/s 87.177cos(ωt) V 200sin(ωt + 25.84) V 111.17sin(ωt) A 2.08 mH 16
Calculated
Magnitude
Value PB10 kW VDC |D| VGRID ω VL10 kW VPWM |IL | L10 kW RL10 kW
Proposed
Eqs.
200 0 -200 0
(1) and (9) (1) and (10) (7) (11) (16)
Magnitude
Parameter
VGRID (V) IL (Amps) VDC ref VDC (V)
400
0.05
×
10
V12 + A210
s1 + A210 + V12 /A10 x10 + RDSon + Rp/L
s2 +RDSon +Rp/L
2 C s3 +1/RL ∗ C +x10 /x20
V12 + A210
(39)
To tune the compensator parameters (Kp and Ki ) and to reduce the order of the closed-loop transfer function, the most significant pole (s2 ) of the system is cancelled with the zero of the PI controller K(s). Therefore, RDSon + Rp Ki = Kp L
4.1. Rectifier design Table 3 presents the parameters for the design and simulation of the active rectifier, shown in Fig. 2(a), as well as the equations associated with the design process. IDC is obtained from (2). For Rp = 0.1 and a ripple voltage lower than 15% of VDC , the capacitance is set to C = 1880 F by using the averaged H-bridge model of the rectifier shown in Fig. 2(a). To increase the tolerance of variations of RL , VDC ref and VGRID , the small-signal linear model of the rectifier is used. For the operation point (IL ≈ x1 = 111.17, VDC * ≈ x2 = 400, Ax ≈ A10 = 87.1789), the transfer function is: (s1 + 99.37) (s2 + 48.02)(s3 + 67.59)
(41)
If the speed response of the closed-loop system of the rectifier is set to ti = 0.1 s, then Ki = 1 and Kp = 0.208, and K(s) is: (sk + 48.08) s
0.35
0.4 PF
0.995 0.99 0
0.05
0.1
0.15
0.2 Time (s)
0.25
0.3
0.35
0.4
200 0 -200 0.35
0.4
0.45
0.5
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.55
0.6
0.65
0.7
0.75
1 0.99 0.98 0.35
Time (s)
Fig. 6. VDC , IL and PF dynamics for a step change of the load (48 to 16 ).
4.2. Closed-loop tests
4. Averaged model simulations
K (s) = 0.208
0.3
(40)
Once the response time ti is set, which is determined by taking the most significant pole, then Kp = L/ti and Ki = Rp /ti as indicated in [34]. L and Rp are regarded as fixed parameters in the design of a rectifier. Because of this, it can be established that the dynamic response of the system depends on the load resistor RL ; therefore, such a response can be modified without increasing the order of the transfer function. This effect is discussed in Section 4.
G(s) = 18.5631
0.25
400
Magnitude
x A10
x20 C
0.2
Fig. 5. Rectifier closed-loop operation.
Magnitude
G (s) =
0.15
1
The small-signal transfer function in (39) is obtained by (a) giving design values to the state equations As and Bs and (b) transforming (37) to the s domain using (38).
0.1
1.005
(42)
Simulation results confirm the continuous regulation of both VDC and PF = 1, after the settling time. The harmonic distortion at input is below 5% under various operational conditions. Fig. 5 illustrates the behavior of voltages and currents resulting from the forced response of the rectifier at closed-loop operation (from the start to a steady state). Table 3 shows the parameters of the rectifier. According to Fig. 5, the settling time for VDC is 0.1 s. By using this value and the magnitude of IL , the validity of (7) is demonstrated (PF = 0.998 at RL = 16 ). The frequency of the VDC ripple, as observed in Fig. 6, doubles the frequency of VGRID (at the fundamental frequency). The ripple frequency corresponds to IL and D and validates (17). Finally, the magnitude and relative phase of VL indicate that (6) is satisfied. Sudden variations can also be present at the load side. Fig. 6 also shows the waveforms resulting from a power step (3.3 kW to 10 kW) by step change of RL . As a response to the load change (48 to 16 ) at t = 0.5 s, the power step from 3.33 kW to 10 kW. In this case the rectifier control tends to increment the magnitude of IL in a short lapse of time (0.1 s) with a maximum deviation = 18% of VDC with respect to VDC ref . As shown in Fig. 6(b), the power factor changes from 0.9975 to 0.999. This change is discussed in Section 5. The case study shown in Fig. 6 is the most common operating condition for a rectifier. In addition, in the presence of external disturbances at the rectifier input, the control should maintain Pin ≈ POUT . Fig. 7 shows the rectifier performance in the presence of a 33% voltage sag in VGRID . The voltage sag forces the control to raise IL . This action maintains VDC at its designated level. The magnitude reduction of VDC causes a maximum deviation of 8.75%. The steady state is reached in 0.1 s. The power factor has negligible variations at steady state.
J.R. Rodriguez-Rodrıguez et al. / Electric Power Systems Research 130 (2016) 181–191 VGRID (V) IL (Amps) VDC ref VDC (V)
Magnitude
400 200
Magnitude
-200 0.35
Table 4 Parameter values for the experiment of the proposed rectifier. Parameter Proposed
0
0.4
0.45
0.5
0.55
0.6
0.65
0.7
1.005
0.75 PF
Calculated
1 0.995 0.99 0.35
0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
Time (s)
187
Hardware
Value PB1 kW VDC |D| VGRID ω VL1 kW VPWM |IL | L1 kW RL1 kW H-Bridge MOSFET Power source DSP
1 kW 400 V 0.455 180sin(ωt) 120 rad/s 26.9072cos(ωt) V 182sin(ωt + 8.5018) V 11.117sin(ωt) A 6.42 mH 160 IRG4PC40UD Agilent 6834B TMF320F28335
Eqs.
(1) and (9) (1) and (10) (7) (11) (16)
Fig. 7. VDC , IL and PF dynamics for a 33% voltage sag in VGRID.
VGRID (V) IL (Amps) VDC ref VDC (V)
Magnitude
400 200 0
Magnitude
-200 0.4
0.45
0.5
0.55
0.6
0.65
0.7
0.75
1.005
0.8
A scaled-down 1:10 laboratory prototype (1 kW) has been built for the purpose of experimentally verifying the performance of the H-Bridge PFC current sensorless rectifier. As a way to contrast the dynamic responses obtained in the experiment to those from the simulations, the parameter values were carefully selected for 1 kW laboratory prototype. These are given in Table 4.
PF
1
5.2. Experimental test
0.995 0.99 0.4
5.1. Simulation and experimentation PU equivalents systems
0.45
0.5
0.55
0.6
0.65
0.7
0.75
0.8
Time (s)
Fig. 8. VDC , IL and PF dynamics for a VDC ref step up change (320 to 460).
A step up change in VDC ref results in an increment of both VDC and IL . This also results in an increment of the rectifier power transfer as shown in Fig. 8. The simulation results presented in this section evidence the right performance of the rectifier and its control scheme. 5. Experimental results The experimental setups are shown in Fig. 9.
Fig. 9. Laboratory prototype of H-Bridge PFC current sensorless rectifier. (a) Power source, (b) impedance L + Rp , (c) C − RL , (d) H-bridge, (e) DSP-based control, and (f) voltage sensors.
For Rp = 0.48 and a ripple voltage less than 15% of VDC , the capacitance is C = 1880 F. Fig. 10(a) illustrates the three-level voltage output of the full-bridge converter (designed based on values from Table 4). The converter is controlled using the SPWM discontinuous modulation technique that is described in [35]. The switching frequency is 6 kHz, for a current harmonic distortion is lower that 5% as shown in Fig. 9(b), based on AC source Agilent 6834B. Fig. 10(a) shows the relation between the voltages VPWM , input voltage VGRID and input current IL . We can also see the effect of the voltage ripple, produced by the converter, on VPWM . We also see that VGRID and IL are in phase (PF = 1). Fig. 11 illustrates the control response to two step changes in the load: 480 to 160 and back to 480 , making power steps of 0.33 kW, 1 kW and back to 0.33 kW. During a load rise, increasing IL make changes between 3.71 A and 11.13 A peak to peak, these actions maintain VDC at its nominal level, while VGRID and IL remain in phase as shown in Fig. 11(a) and (b). From Fig. 11, we see that the system response time to the step up change is approximately 100 ms and that VGRID and IL remain in phase. The maximum VDC error with respect to VDC ref is 18%. Fig. 12 shows the rectifier response to a voltage sag of 33.33% (from VGRID = 180sin(ωt) to VGRID = 120sin(ωt)) lasting 0.8 s. The control response to the voltage sag tends to increase IL . This maintains Pin ≈ POUT = 500 w as well as VDC = 400 and PF = 1. It is noteworthy to note that the proposed control in [15], does not shown any DC output regulation for voltage sags in AC input. As final case of study, Fig. 13 presents the effect on the voltage VDC ref from a ± 15% change in the reference, jumping from 340 V to 460 V and back to 340 V. IL current increases from 5 A peak–peak to 7.85 A peak–peak, producing power changes from 450 W to 700 W. As can be observed, the recovery time is approximately 90 ms. This time is 10 ms greater than the time obtained in the simulations. This difference is explained by considering the differences between the MOSFETs parameters in the simulation and those of the physical prototype. Worth noting that in all cases of study analyzed by simulation and experiment, the input current always maintains a sinusoidal waveform and PF = 1 for several operation scenarios, this due to the
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Fig. 10. Steady-state measurements.
Fig. 11. Power changes (0.33 kW to 1 kW) based on RL variations (480 to 160 ).
Fig. 12. VGRID step changes.
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Fig. 13. VDC ref step changes.
Fig. 14. VDC and IL dynamics for load step changes on simulation and prototype equivalent circuits.
proposed control law that is detailed in Fig. 3. This characteristic is improvement to that reported in [15,18] in which the current is distorted, at similar operation scenarios. 6. Discussion
rectifier shows an underdamped response with an overshoot voltage of 11% and a power factor deviation of 7.5%. From the design point of view, the load is normally closely related to the physical power limit of the rectifier; therefore, the dynamic responses of the rectifier operating under the control scheme described in this paper are satisfactory for the rated load values.
6.1. Analysis of experimental and simulation results 6.3. Inductor effect
The linearization of the rectifier model and the tuning of the PI compensator are obtained by considering the maximum load value of the rectifier (RL ). Under these conditions, it is expected that the dynamic range of response varies if the values of the load change. Fig. 15 shows the variation in VDC and PF for five different load values from Load = RL to Load = 10 RL (POUT = PB10 kW to POUT = 0.1 * PB10 kW ). It can be noted that the largest deviation corresponds to the case of one tenth of the nominal power (at 10RL ). The
500
Magnitude
6.2. RL effect
Based in the information and figures presented, the inductance value selected for 10 kW rectifier in simulation is defined as L10 kW = 2.08 mH for a duty cycle D = 0.5 (Table 3). In the case of the scaled-down 1 kW experimental prototype a value of
VD DC ref VD DC RL VD DC 2RL VD DC 5RL VD DC 10 RL
400 300 200 0
Magnitude
In Section 5, (43) equates the base impedance of the simulated circuit to that of the physical approach. From this perspective, it is possible to match the dynamic responses of both circuits. Fig. 14 illustrates the quantitative differences between circuits for the same cases of study. As can be observed in the figure, the simulated and experimental results show similar dynamics. The time responses of both circuits are approximately 100 ms (ts = te ) and have voltage overshoots of 18% (vs = ve ). The similarity between the waveforms illustrates the effectiveness of the proposed analysis.
0 0.05
0.1
0.15
0.2
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0.3
0.35
0.4
0.5
P F RL P F 2RL P F 5RL P F 10 RL
1 0.95 0.9 0
0.4 45
0 0.05
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0.4
Time (s)
Fig. 15. Closed-loop operation for different RL activations.
0.45
0.5
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L1 kW = 20.8 mH must be selected if the relationship 1:10 (in PU) is to be keep for the same values of D = 0.5, VGRID = 180 and VDC = 400. In practice, an inductor value of L1 kW = 20.8 mH turns to be bulky, but in order to reduce the prototype inductance value, the duty cycle it has been reduced from D = 0.5 to D = 0.455, thereby obtaining a value of inductance L1 kW = 6.42 mH, using a switching frequency of 6 kHz, moreover, it should be noted that the prototype retains the most important features such as regulating VDC , FP = 1 and THD, and responses wave waveforms between simulation and prototype are very similar, as shown in Fig. 14. 6.4. Analysis of applications This research work has been oriented to reducing size and costs of low-power (1–10 kW) H-bridge rectifiers through the elimination of current sensors but without losing the characteristics of FP = 1 and low harmonic current distortion. Therefore the solution found in the work points out to industrial speed drives, UPS systems, power supplies on CD, residential wind turbines etc. On the other hand, this type of control is not applicable for high power rectifiers (applications to transmission or distribution grids) where current monitoring is necessary for the operation of the rectifier internal protections. If the phase and magnitude of variable cos(x), from the PLL are changed then power factors of different unit, fixed or designated by the user or other external variable can be obtained. This enhancement extends the operating range the proposed technique, but to achieve this goal, the implementation of a new feedback loop must be studied. 6.5. Material cost savings At the authors best knowledge, this control proposal may represent lower costs for mass production of H-bridge rectifiers due to savings in material such as: (i) elimination of the IL current sensor, (ii) removing acquisition circuitry for IL signal, (iii) removing conversion stage ADC stage for IL signal and (iv) reduction programming resources. 7. Conclusion Currently the dq0-based control technique for three-phases rectifiers is considered a well-established one, with which it is achieved the use of DC variables in PI control loops as wells as modeling the rectifier based on two cascaded first order transfer functions. However, this paper has just shown that in the case of single-phase rectifiers a well-performed control can be carried out without use of both dq0 and current sensors. The few works published on similar subjects that the one presented in this paper do have not demonstrated the any ability to regulate DC voltage to sags. Clearly, the main contributions bring by this paper are the control law developed for single-phase rectifiers and the mathematical model implemented to get the control. These type of converters have an application niche in the industry and household sectors in the form of voltage power sources, motor drives or low-power wind generators among other. Therefore the proposed control strategy, which improves the overall performance of PFC rectifiers and reduces the computational-burden for the control because of its sensorless characteristic, can positively impact this sectors applications leading by increasing technical and cost efficiency it be involved. References [1] J.R. Rodriguez, J.W. Dixon, J.R. Espinoza, J. Pontt, P. Lezana, PWM regenerative rectifiers: state of the art, IEEE Trans. Ind. Electron. 52 (Feb (1)) (2005) 5–22.
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