GaAs heterojunctions

GaAs heterojunctions

Thin Solid Films, 71 (1980) 33-39 © Elsevier Sequoia S.A., Lausanne---Printed in the Netherlands 33 DEEP LEVEL DEFECTS IN CdS/GaAs HETEROJUNCTIONS P...

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Thin Solid Films, 71 (1980) 33-39 © Elsevier Sequoia S.A., Lausanne---Printed in the Netherlands

33

DEEP LEVEL DEFECTS IN CdS/GaAs HETEROJUNCTIONS PAUL BESOMI AND BRUCE W. WF_.~ELS Department of Materials Science and Engineering and Materials Research Center, Northwestern University, Evanston, II1. 60201 (U.S.A.) (Received March 13, 1980; accepted March 18, 1980)

Deep level defects in epitaxially grown CdS/GaAs heterojunctions were investigated using transient capacitance spectroscopy. Five different electron and hole traps were observed in the heterojunctions with activation energies of 0.31, 0.47, 0.69, and 0.16 and 0.32 eV respectively. The emission rate, capture cross section and concentration of these traps are reported in this paper. Trap concentrations ranged from 1012 to 1015 cm-3 depending on the heterojunction fabrication procedure.

I. INTRODUCTION The increased utilization of semiconductor heterojunctions in electronic technology has led to extensive investigations of new semiconducting heterojunctions. One very promising type of structure involves heterojunctions between a II-VI compound which has a wide direct band gap and a III-V compound with a narrow band gap 1'2. This type of heterojunction is suitable for a number of optoelectronic applications including photovoltaic and photoelectrochemical devices3. Although these heterojunctions show considerable potential, not much is known about charge transport in these devices, especially the role defects play in controlling current-voltage characteristics. This lack of understanding results from difficulties in detecting the electronically active defects at low concentration. A measurement technique which has been extremely important in recent years in studying defects in semiconductors is deep level transient spectroscopy (DLTS)4, 5. It is a quite versatile and powerful means of investigating defects with the capability of detecting electron and hole traps with concentrations as low as 1011 cm -3. The only requirement is that the semiconducting materials have carrier concentrations in the range 1013-1014 era- 3 or greater. In this paper we report the first results obtained for deep level traps in CdS/GaAs heterojunctions fabricated with vapor-grown CdS on GaAs. This study includes the determination of trap activation energy, concentration, type and capture cross section for five different centers observed in the heterojunctions. 2. EXPERIMENTAL

The heterojunctions were prepared by open-tube chemical vapor transport using H2 as the carrier gas ~,7. The deposition proceeds according to the following

34

P. BESOMI, B. W. WESSEI~

reaction: CdSsolid + H 2 ~-- Cdsas+ H2S

(1)

Subsequently the cadmium and H2S react to form epitaxial CdS on the GaAs substrates. The substrates were p type with a (lll)A orientation and an area of 5 m m x 5 ram. Prior to growth, the substrates were polished with an alumina powder of particle size 0.5 pm in diameter and then etched for a few seconds in 2% brominemethanol etchant. The experimental set-up for vapor phase epitaxy consisted of a two-zone furnace in which an open-tube quartz reaction chamber was placed. The reactant gases used were palladium-diffused hydrogen and an electronic-grade 15% H2S-H 2 mixture. Electronic-grade CdS powder served as the source. Typical growth conditions included a source temperature of 750°C and a substrate temperature of 620 °C. The total hydrogen gas flow through the system was 200-400 cm 3 rain- x corresponding to a transport velocity of 30-60 cm rain- 1 in the tube. Higher transport velocities resulted in inhomogeneously thick epitaxial layers. For the aforementioned conditions the growth rates were of the order of 5-15 ~ h - 1. The thickness of the CdS layers was 10-30 pro. After growth, the back side was mechanically polished to remove residual CdS and etched in a dilute solution of HCI-HNO3. The material was scribed into diodes which were 1 m m x 1 mm in area. The ohmic contacts consisted of indium alloyed to the CdS epitaxial layer at 250 °C as well as to the GaAs substrate. The transient capacitance apparatus used to measure the properties of the deep level defects has been described previously5. The technique consists in periodically forward biasing a junction from its normal reverse bias state. The capacitance transients are then monitored via a differential capacitance meter and a boxcar averager as a function of temperature. Capacitance time constants of the order of 10-5-10 -2 s were measured using a 17 MHz drive frequency. A liquid nitrogen cryestat was used to vary the sample temperature from 77 to 400 K. In addition to transient capacitance studies, current density-voltage (J-V) characteristics of the samples were also measured using a constant-current source and a high impedance digital voltmeter. The doping density was determined using capacitance-voltage (C-V) measurements at 300 K. The carrier concentrations of the as-grown CdS layers varied between 1015 and 10x6 em-3 whereas the p-type GaAs substrates had a carrier concentration of 2 x 10x7 cm-3. 3.

RESULTS AND DISCUSSION

Figure I shows a typical J - V plot obtained for an epitaxial CdS/GaAs diode. In the range of conditions investigated, the J - V characteristics could be expressed by the following equation for forward bias: eV

where Jo and A are constants. For the diodes studied A varied between 1.7 and 2.1 which is consistent with the results published by Bettini et al. s The extrapolated value OfJo was of the order of 5 x 10 .4 Acm -2. Alternatively, forward currents may possibly result from a tunneling process

DEEP LEVEL DEFECTS IN CdS/GaAs HETEROJUNCTIONS

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35

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Fig. 1. J - V characteristic of an ¢pitaxial CdS/GaAs heterojunction (diode 14F).

described by the following equation: "/tun = Jtun oexp(BV)

(3)

The measured value of B has been found to vary between 20 and 25 V- 1 and is again in agreement with that ofBettini et al. s T h e large recombination and tunneling currents may result from carrier recombination through defect levels in the band gap localized at or near the interface between the CdS epitaxial layer and the GaAs substrate. The large lattice parameter mismatch of 3% between the GaAs and CdS may be responsible for the large density of defect states. Figure 2 shows the C - V characteristics of diode 28F plotted in the form 1/C 2 against V.From the C-V data shown, a value of 8 x 10xs cm- 3 for the carder density was obtained. For the different diodes investigated the carder concentration varied between 1015 and 1014 cm -3 and the built-in voltage varied between 1 and 1.6 V. The DLTS spectra for two characteristic CdS/GaAs heterojunctions are given in Figs. 3 and 4. Since the doping density of the GaAs substrates was 2.5 x 1017 cm- a, the traps observed were located in the CdS side of the depletion layer where the carrier concentration is lower. Although we are dealing with heterojunctions with a large lattice mismatch between components a spectrum indicative of discrete states is observed. Figure 5 gives the measured thermal emission rates as a function of reciprocal temperature for the different traps observed. From the temperature dependence of the emission rate, the binding energies and approximate values of the capture cross section were obtained using the detailed balance equation given by en = ~-1 = Nca® ~ v ) exp - - ~

(4)

36

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Fig. 2. Heterojunction C - V characteristic of an epitaxial CdS/GaAs heterojunction (diode 28F): N D = 8 x I015 c m - 3 ; VBi = 1.2V.

A

C i D

x IO

i

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16o

i~o

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(K)

Fig. 3. Observed D L T S spectra of the epitaxial CdS/GaAs heterojunction 14F. The rate window is 4 . 6 2 × 103 s - 1.

where a® is the capture cross section, ( v ) is the thermal velocity of the carriers, AEt is the trap energy and N c is the effective density of states in the conduction band. For CdS, N c equals 4.42 x 10t4.T 3/2 cm -3,
CdS/GaAsHETEROJUNCTIONS

DEEP LEVEL DEFECTS IN

37

I E

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150

200 250 TEMPERATURE (K)

300

Fig. 4. Observed DLTS spectrum of the epitaxial CdS/GaAs heterojunction 21F. The rate window is 4.62 x 103 s - 1.

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Fig. 5. Arrhenius plot of the emission rate constant for traps observed in vapor-grown epitaxial CdS/GaAs heterojunctions. TABLE I A SUMMARY OF THE FIVE TRAPS

Trap A* B C* D E

Trap depth

Capture cross section

Temperature range

(eV)

( x 10 -t3 cm -2)

(K)

0.16 0.31 0.32 0.47 + 0,05 0.69

10 7 6 -6

98-113 145-182 148-168 210-250 290-350

The asterisks indicate minority carrier traps. I

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P . BESOMI, B. W . WI/SSELS

which is a minority carrier trap, was not reported previously. Trap D with a binding energy of 0.47 eV was observed in all the CdS/GaAs heterojunctions studied although it has not previously been observed in the Schottky barrier studies 9. Presumably this indicates that the level at 0.47 eV is associated with the heterojunction structure itself and could be related to interface states. The capture cross sections calculated for the different traps using the detailed balance equation are reported in Table I. A general trend towards larger capture cross sections as the binding energy of the trap increased was noted. This finding is consistent with previous capture cross section studies on CdS 9. The concentration of the defects varied from 1012 to 10 ~5 cm-a. As shown in Fig. 6, the concentration of several of the defects depended on junction preparation conditions. The CdS/GaAs junctions prepared from CdS layers grown at 10 pm h - 1 had defect densities more than one order of magnitude lower than those of junctions grown at 1 lun h- x. This dependence of trap density on growth rate is similar to the "molar fraction effect" observed in other compound semiconductor systems ~°. Presumably the decreased defect densities obtained at high growth rates resulted from a decreased incorporation rate of residual impurities present during deposition. I0

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GROWTHRATE (p.mlhr) Fig. 6. ]Dcpcndcacc of trap coaccnt~tioa on the growth rate of CdS thin films: O, 0.32 eY; A, 0.47 cV; D , 0.69 eV.

4.

SUMMARIZING REMARKS

In this study transient capacitance spectroscopy was used to determine the parameters of the traps present in CdS/GaAs heterojunction diodes. The spectra showed five different traps with activation energies varying from 0.16 to 0.69 eV. Concentrations of the deep level defects ranged from 10tz to 10 ts cm-a and were influenced by the heterojunction fabrication procedure.

DEEP LEVEL DEFECTS IN

CdS/GaAsHETEROJUNCTIONS

39

ACKNOWLEDGMENTS

The fellowship support of the Walter P. Murphy Fund is gratefully acknowledged. The National Science Foundation-Materials Research Laboratory program through the Materials Research Center, Northwestern University (Grant DMR 76-80847), provided materials and equipment support, REFERENCES 1 2 3 4 5 6

I. Kotelyanskiy, A. Yu. Yu. Mityagin and V. P. Odov, J. Cryst. Growth, 10 (1971) 191. W.M. Yim and E. J. Stofko, J. Electrochem. Soc., 119(1972) 381. S. Wagner and J. L. Shay, AppL Phys. Lett., 31 (1977) 446. D.V. Lang, J. Appl. Phys,, 45 (1974) 3023. D.V. Lang, J. AppL Phys., 45 (1974) 3014. M. Moulin, A. Huber and M. Dugu6, J. Cryst. Growth, 17 (1972) 212.

7 M. Bettim, K.J. Bachinan, E. Buehler, J.L. ShayandS. Wagner, J. AppLPhys.,48(1977) 1603. 8 M. Bettini, K. J. Bachman and J. L. Shay, J. Appl. Phys., 49 (1978) 865~ 9 P. Besomi and B. W. Wessels, J. AppL Phys., to be published. 10 J.V. DiLorenzo and G. E. Moore, Jr., J. Electrochem. Soc., 118 (1971) 1823.