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XOR optical logic circuit based on silicon Mach–Zehnder interferometer
Optics Communications ∎ (∎∎∎∎) ∎∎∎–∎∎∎
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Demonstration of a directed XNOR/XOR optical logic circuit based on silicon Mach–Zehnder interferometer Jianfeng Ding, Lin Yang n, Qiaoshan Chen, Lei Zhang, Ping Zhou State Key Laboratory on Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences (CAS), Beijing, China
art ic l e i nf o
a b s t r a c t
Article history: Received 15 May 2015 Received in revised form 31 July 2015 Accepted 10 August 2015
We demonstrate a directed XNOR/XOR optical logic circuit based on silicon Mach–Zehnder interferometer. The device with the symmetric arm design is wavelength-insensitive in a wavelength range of 40 nm. The device has an electro-optical bandwidth of around 20 GHz. When the device is optically biased at the maximum or minimum transmission points by tuning the heater on one of its arms, it can perform the XNOR or XOR operations respectively at a speed up to 20 Gbps. The high-speed and reconfigurable abilities of the device make it suitable for the future programmable optical logic array. & 2015 Elsevier B.V. All rights reserved.
Keywords: Optical logic devices Integrated optoelectronics Directed optical logic
1. Introduction Optical logic is considered to have the potential advantages of low crosstalk, low time delay and low power consumption [1–6]. Unlike the traditional optical logic utilizing the nonlinear interaction of light with material [7–10], directed optical logic implements Boolean operations by controlling the propagation of light in the optical switching network [11–14]. Silicon photonics [15–33] is an ideal platform for directed optical logic, in which the optical field is confined in a very small silicon waveguide and the optical crosstalk between two adjacent waveguides can be reduced to a negligible level. The propagation speed of light in the silicon waveguide is determined by its refractive index and the time delay of light in the silicon waveguide is only determined by its length. The silicon microring resonator with a radius of 1.5 μm has been demonstrated [27]. The modulation speed of silicon microring or Mach–Zehnder modulators have been up to 60 Gbps [28] and the power consumption of silicon microdisk modulator have been reduced to fJ/bit [31]. Therefore, the directed optical logic circuit based on silicon photonics has the potential advantages of low footprint, high operation speed, low time delay and low power consumption, and it is considered as a candidate for the future optical computing. A series of directed optical logic circuits based on silicon microring resonators [11–13] have been demonstrated. Mach–Zehnder interferometer (MZI) also can be utilized to realize optical modulators or switches. Furthermore, it has better performances in wavelength sensitivity and n
Corresponding author. E-mail address: [email protected] (L. Yang).
temperature sensitivity than the microring resonator. In this paper, we report a 20 Gbps directed XNOR/XOR optical logic circuit based on silicon MZI. The device with the symmetric arm design is less sensitive to the wavelength and temperature fluctuations. Furthermore, the device can perform XNOR or XOR operations by tuning its optical bias at the maximum or minimum transmission points with the heater on one of its arms. This reconfigurable ability makes it a promising building block for the future highspeed programmable optical logic array.
2. Design and fabrication Although a 2 2 MZI switch can do the XNOR and XOR operations simultaneously and there is no optical power loss. But the device accomplishes the two operations at two different output ports separately. As a programmable optical logic circuit, one output port should have different logic functions. Therefore we prefer a 1 1 MZI structure with a heater to accomplish the programmable function. The directed XNOR/XOR optical logic circuit based on silicon MZI is schematically shown in Fig. 1(a). The two electrical pulse trains X1 and X2 applied on the two arms of the MZI represent the two operands. The output optical signal is the operation result. The heater on one arm of the MZI behaves as a control gate and is used to control the original phase difference between the two arms of the MZI. The device has two working modes, which is determined by the control gate. The device can perform XNOR operation in one working mode and XOR operation in the other working mode. In the XNOR working mode, the original phase difference between the two arms of the MZI is 0. When no voltages are applied on the two arms (X1 ¼ 0, X2 ¼ 0), the
http://dx.doi.org/10.1016/j.optcom.2015.08.024 0030-4018/& 2015 Elsevier B.V. All rights reserved.
Please cite this article as: J. Ding, et al., Optics Communications (2015), http://dx.doi.org/10.1016/j.optcom.2015.08.024i
J. Ding et al. / Optics Communications ∎ (∎∎∎∎) ∎∎∎–∎∎∎
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Fig. 1. (a) Schematic and (b) microscope of the directed XOR/XNOR optical logic circuit based on silicon Mach–Zehnder interferometer. (EPT: electrical pulse train).
output optical signal is at the high level (Y ¼1). When two appropriate voltages are applied on the two arms (X1 ¼ 1, X2 ¼1,), the phase difference between the two arms of the MZI is 0 and the output optical signal is at the high level (Y¼ 1). When one appropriate voltage is applied on one arm of the MZI (X1 ¼1, X2 ¼0 or X1 ¼0, X2 ¼ 1), the phase difference is π and the output optical signal is at the low level (Y¼ 0). Therefore, the device can perform XNOR operation ( Y = X1 ⊙ X2 = X1·X2 + X¯1 ·X¯2 ). In the XOR working mode, the original phase difference between the two arms of the MZI is π, which is achieved by tuning the control gate. When no voltages are applied on the two arms (X1 ¼ 0, X2 ¼ 0), the output optical signal is at the low level (Y¼ 0). When two appropriate voltages are applied on the two arms (X1 ¼1, X2 ¼ 1), the phase difference between the two arms of the MZI is π and the output optical signal is at the low level (Y¼0). When one appropriate voltage is applied on one arm of the MZI (X1 ¼ 1, X2 ¼ 0 or X1 ¼0, X2 ¼1), the phase difference is 0 or 2π and the output optical signal is at the high level (Y¼ 1). Therefore, the device can perform XOR operation ( Y = X1 ⊕ X2 = X1·X¯2 + X¯1 ·X2). The device is fabricated on a 12-in. silicon-on-insulator (SOI) wafer with a 220-nm-thick top silicon layer and a 2-μm-thick buried dioxide layer. The 248-nm deep ultraviolet photolithography is used to define the patterns of the device such as the ridge waveguides and the doping areas. Inductively coupled plasma etching process is adopted to etch the silicon to form the ridge waveguide and the spot size converters. These converters are used to increase the coupling efficiency between the chip and the fiber. Fig. 1(b) shows the microscope image of the device. The device utilizes the PN junction in a depletion mode and the traveling wave electrodes to translate the electrical signals to the optical signals [33]. The pads of GSGSG pattern induce the electrical signals into the device. TiN resistors as the terminators are fabricated at the end of the traveling wave electrodes to absorb the electrical signals and prevent the reflection of electrical signals. A thermal heater is formed as the control gate. To achieve a faster tuning, a PN junction embedded in the waveguide could be adopted.
3. Experiments and discussion An amplified spontaneous emission source and an optical spectrum analyzer are used to characterize the static transmission spectra of the device in different cases. To accurately measure the carrier dispersion effect induced by the PN junction, the device without TiN terminators is fabricated in order to avoid the thermal
Fig. 2. Transmission spectra of the device in the (a) XNOR and (b) XOR working modes. (For interpretation of the references to color in this figure, the reader is referred to the web version of this article.)
effect. Fig. 2 shows the static transmission spectra of the device in four different cases in the XNOR and XOR working modes. In the following each case, the analog input electrical voltage of 0 V is defined as the input logic value “0” and the analog input electrical voltage of 6 V is defined as the logic value “1”. In the XNOR working mode, the blue and pink curves have the maximum output optical intensity (Y¼ 1) when the voltages applied on both two arms are 0 V or 6 V. When the voltage applied on one of the two arms is 6 V and the voltage on the other is 0 V, the output optical signal has the minimum output optical intensity (Y ¼0) as shown in the red and cyan curves in Fig. 2(a). In the XOR working mode, the output optical signals are exactly opposite to those in the XNOR working mode as shown in Fig. 2(b). The extinction ratio of the output optical signal in the XNOR working mode is only 3.4 dB. Although the extinction ratio in the XOR working mode could reach as high as 23 dB, the output optical power has an extra loss of 2.7 dB. However, unlike the analog transmission system, the logic operation only requires that the “1” and “0” logic values have enough difference to be distinguished from each other. The output optical signals in the two working modes have almost the same output swing to guarantee that the logic values “1” and “0” could be identified. Additionally, due to the symmetrical design, all the static transmission spectra are very flat. The fluctuation of the output optical signal as the logic value “1” is less than 0.6 dB in the
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Fig. 3. Experimental setup for characterizing the dynamic response of the directed XNOR/NOR optical logic circuit. DCS: direct current source; PC: polarization controller; PPG: pulse pattern generator; EA: electrical amplifier; EC: electrical clock; EDFA: Erbium-doped-fiber-amplifier; TF: tunable filter; DCA: digital communication analyzer; OSA: optical spectrum analyzer; OVNA: optical vector network analyzer.
wavelength range of 40 nm. The wavelength insensitivity of the device makes it appropriate for reducing the complexity of the future optical logic array system. Fig. 3 shows the experimental setup for characterizing the dynamic response of the directed XOR/XNOR optical logic circuit based on silicon MZI. A monolithic light is coupled into the chip through a lensed fiber. A polarization controller is used to control the polarization of light since the silicon waveguide only supports the TE mode. A direct current (DC) resource is used to tune the optical transmission point by the heater. Two independent highspeed pulse pattern generators are adopted to generate two input operands X1 and X2. The output optical signal Y as the logic operation result is amplified by an Erbium-doped-fiber-amplifier (EDFA) and passes through an optical filter to reduce the optical noise induced by EDFA. Finally, the output optical signal is fed into the oscilloscope with an optical head for pulse pattern observation. The optical vector network analyzer is used to characterize
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the electro-optical (EO) response of the device. As shown in Fig. 4 (a), the device has an EO bandwidth of around 20 GHz. When the applied reverse voltage increases from 0 V to 5 V, the EO bandwidth will increase from 17.4 GHz to 21.5 GHz. With the increase of the applied reverse voltage, the depletion capacitance of the PN junction decreases and the propagation loss of the traveling wave electrode decreases. Thus the EO bandwidth of the device reaches as high as 21.5 GHz, which makes the device suitable for the highspeed application. Fig. 4(a)–(c) shows the eye diagrams of the device at the speeds of 10 Gbps, 20 Gbps and 30 Gbps respectively when only one arm is modulated by a pseudo-random-binarysequence (PRBS) electrical signal with a pattern length of 231-1. The clearly opened eye diagrams indicate that the device can be used for the high-speed logic operation. The logic operation experiment is performed as follows. For the pulse pattern observation, two self-defined electrical pulse trains (X1 ¼00110101, X2 ¼10100111) are generated by the multi-channel PPG. Phase-matched cables, electrical amplifiers and Bias-Tees guarantee the synchronization of the driving signals at the electrical input port of the device. The driving voltage swing is 6 V and the reverse bias is 3 V. After the output optical signal is amplified by EDFA, the pulse pattern can be observed on the oscilloscope. When the device is optically biased at the maximum and minimum transmission points by tuning the heater, the XNOR and XOR operation results can be achieved respectively. Theoretically, the logic result sequences of the XNOR and XOR operations should be 01101101 and 10010010. Fig. 5(a)–(c) show all the pulse patterns of the operation results at different speeds. Clearly, the device can work correctly at the speed of 10 Gbps and 20 Gbps. The XOR logic operation is performed at the speed of 30 Gbps. However, the XNOR logic operation is not achieved at 30 Gbps, which is due to the relatively low extinction ratio in the XNOR working mode. In order to verify the dynamic performance of the device driven
Fig. 4. (a) Electro-optical responses of the device under different reverse voltages. Eye diagrams of the device at the speeds of (b) 10 Gbps, (c) 20 Gbps, and (d) 30 Gbps.
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Fig. 5. Pulse patterns of the XNOR/XOR logic operations at the speeds of (a) 10 Gbps, (b) 20 Gbps, and (c) 30 Gbps.
Fig. 6. Eye diagrams of the XNOR/XOR logic operations at the speeds of (a)/(c) 10 Gbps, (b)/(d) 20 Gbps, and (c)/(e) 30 Gbps.
Fig. 7. Pulse patterns of the (a) XNOR and (b) XOR logic operations at the speed of 20 Gbps when the light beams of different wavelengths are injected into the device.
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by all kinds of the input pulse patterns, two PRBS (231-1) electrical signals are adopted as the input operands. Because of the huge number of the 231-1 pulse pattern, it is impossible to identify the accuracy by counting out the pulse pattern as above. Fig. 6(a)–(f) shows the eye diagrams of the device in two working modes at different working speeds. The extinction ratios of the XNOR operation at 10 Gbps and 20 Gbps are 3 dB and 2.5 dB respectively, which are mainly due to the limited EO bandwidth of the device. For the 10 Gbps and 20 Gbps signals, the powers are mainly located in the frequency ranges of 10 GHz and 20 GHz. According to Fig. 4(a), the power response in the frequency range from DC to 10 GHz is almost flat. When the frequency range is larger, the power response decreases and reduces the extinction ratio at the speed of 20 Gbps. As the speed increases to 30 Gbps, the extinction ratio decreases further and the oscilloscope cannot calculate the extinction ratio, which means that the difference between the logic value “0” and “1” is too small to be distinguished by the oscilloscope. This is also the reason why we cannot observe the correct pulse pattern of the XNOR operation at the speed of 30 Gbps in Fig. 5(c). All the eye diagrams of the XOR operation are observed and the extinction ratios are larger than 7.8 dB, which is consistent with the pulse pattern observation. The wavelength sensitivity experiment is also performed. The pulse pattern responses with the different wavelengths are shown in Fig. 7. The XNOR and XOR operation results are correct in the wavelength range from 1525 nm to 1565 nm at the speed of 20 Gbps, which indicates that the device can work correctly in a wavelength range of 40 nm at a speed up to 20 Gbps. When the wavelength becomes longer, the output optical signal will decrease as shown in Fig. 7. This is caused by the inconstant amplification response of the EDFA with the wavelength of the input optical signal.
4. Conclusion We demonstrate a directed XNOR/XOR optical logic circuit based on silicon MZI. The device adopts the symmetric arm design, which makes it wavelength-insensitive in a wavelength range of 40 nm. When the device is optically biased at the maximum or minimum transmission points by tuning the heater on one of its arms, it can perform the XNOR or XOR operations respectively at a speed up to 20 Gbps. The high-speed and reconfigurable abilities of the device make it suitable for the future programmable optical logic array.
Acknowledgment This work was supported by the National Natural Science Foundation of China (NSFC) under Grants 61204061, 61235001, and 61377067, the National High Technology Research and Development Program of China under Grants 2015AA010103 and 2015AA010901 and the Scientific and Technological Innovation Cross Team of Chinese Academy of Sciences under Grant Y374010000.
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Contents lists available at ScienceDirect
Optics Communications journal homepage: www.elsevier.com/locate/optcom
Demonstration of a directed XNOR/XOR optical logic circuit based on silicon Mach–Zehnder interferometer Jianfeng Ding, Lin Yang n, Qiaoshan Chen, Lei Zhang, Ping Zhou State Key Laboratory on Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences (CAS), Beijing, China
art ic l e i nf o
a b s t r a c t
Article history: Received 15 May 2015 Received in revised form 31 July 2015 Accepted 10 August 2015
We demonstrate a directed XNOR/XOR optical logic circuit based on silicon Mach–Zehnder interferometer. The device with the symmetric arm design is wavelength-insensitive in a wavelength range of 40 nm. The device has an electro-optical bandwidth of around 20 GHz. When the device is optically biased at the maximum or minimum transmission points by tuning the heater on one of its arms, it can perform the XNOR or XOR operations respectively at a speed up to 20 Gbps. The high-speed and reconfigurable abilities of the device make it suitable for the future programmable optical logic array. & 2015 Elsevier B.V. All rights reserved.
Keywords: Optical logic devices Integrated optoelectronics Directed optical logic
1. Introduction Optical logic is considered to have the potential advantages of low crosstalk, low time delay and low power consumption [1–6]. Unlike the traditional optical logic utilizing the nonlinear interaction of light with material [7–10], directed optical logic implements Boolean operations by controlling the propagation of light in the optical switching network [11–14]. Silicon photonics [15–33] is an ideal platform for directed optical logic, in which the optical field is confined in a very small silicon waveguide and the optical crosstalk between two adjacent waveguides can be reduced to a negligible level. The propagation speed of light in the silicon waveguide is determined by its refractive index and the time delay of light in the silicon waveguide is only determined by its length. The silicon microring resonator with a radius of 1.5 μm has been demonstrated [27]. The modulation speed of silicon microring or Mach–Zehnder modulators have been up to 60 Gbps [28] and the power consumption of silicon microdisk modulator have been reduced to fJ/bit [31]. Therefore, the directed optical logic circuit based on silicon photonics has the potential advantages of low footprint, high operation speed, low time delay and low power consumption, and it is considered as a candidate for the future optical computing. A series of directed optical logic circuits based on silicon microring resonators [11–13] have been demonstrated. Mach–Zehnder interferometer (MZI) also can be utilized to realize optical modulators or switches. Furthermore, it has better performances in wavelength sensitivity and n
Corresponding author. E-mail address: [email protected] (L. Yang).
temperature sensitivity than the microring resonator. In this paper, we report a 20 Gbps directed XNOR/XOR optical logic circuit based on silicon MZI. The device with the symmetric arm design is less sensitive to the wavelength and temperature fluctuations. Furthermore, the device can perform XNOR or XOR operations by tuning its optical bias at the maximum or minimum transmission points with the heater on one of its arms. This reconfigurable ability makes it a promising building block for the future highspeed programmable optical logic array.
2. Design and fabrication Although a 2 2 MZI switch can do the XNOR and XOR operations simultaneously and there is no optical power loss. But the device accomplishes the two operations at two different output ports separately. As a programmable optical logic circuit, one output port should have different logic functions. Therefore we prefer a 1 1 MZI structure with a heater to accomplish the programmable function. The directed XNOR/XOR optical logic circuit based on silicon MZI is schematically shown in Fig. 1(a). The two electrical pulse trains X1 and X2 applied on the two arms of the MZI represent the two operands. The output optical signal is the operation result. The heater on one arm of the MZI behaves as a control gate and is used to control the original phase difference between the two arms of the MZI. The device has two working modes, which is determined by the control gate. The device can perform XNOR operation in one working mode and XOR operation in the other working mode. In the XNOR working mode, the original phase difference between the two arms of the MZI is 0. When no voltages are applied on the two arms (X1 ¼ 0, X2 ¼ 0), the
http://dx.doi.org/10.1016/j.optcom.2015.08.024 0030-4018/& 2015 Elsevier B.V. All rights reserved.
Please cite this article as: J. Ding, et al., Optics Communications (2015), http://dx.doi.org/10.1016/j.optcom.2015.08.024i
J. Ding et al. / Optics Communications ∎ (∎∎∎∎) ∎∎∎–∎∎∎
2
Fig. 1. (a) Schematic and (b) microscope of the directed XOR/XNOR optical logic circuit based on silicon Mach–Zehnder interferometer. (EPT: electrical pulse train).
output optical signal is at the high level (Y ¼1). When two appropriate voltages are applied on the two arms (X1 ¼ 1, X2 ¼1,), the phase difference between the two arms of the MZI is 0 and the output optical signal is at the high level (Y¼ 1). When one appropriate voltage is applied on one arm of the MZI (X1 ¼1, X2 ¼0 or X1 ¼0, X2 ¼ 1), the phase difference is π and the output optical signal is at the low level (Y¼ 0). Therefore, the device can perform XNOR operation ( Y = X1 ⊙ X2 = X1·X2 + X¯1 ·X¯2 ). In the XOR working mode, the original phase difference between the two arms of the MZI is π, which is achieved by tuning the control gate. When no voltages are applied on the two arms (X1 ¼ 0, X2 ¼ 0), the output optical signal is at the low level (Y¼ 0). When two appropriate voltages are applied on the two arms (X1 ¼1, X2 ¼ 1), the phase difference between the two arms of the MZI is π and the output optical signal is at the low level (Y¼0). When one appropriate voltage is applied on one arm of the MZI (X1 ¼ 1, X2 ¼ 0 or X1 ¼0, X2 ¼1), the phase difference is 0 or 2π and the output optical signal is at the high level (Y¼ 1). Therefore, the device can perform XOR operation ( Y = X1 ⊕ X2 = X1·X¯2 + X¯1 ·X2). The device is fabricated on a 12-in. silicon-on-insulator (SOI) wafer with a 220-nm-thick top silicon layer and a 2-μm-thick buried dioxide layer. The 248-nm deep ultraviolet photolithography is used to define the patterns of the device such as the ridge waveguides and the doping areas. Inductively coupled plasma etching process is adopted to etch the silicon to form the ridge waveguide and the spot size converters. These converters are used to increase the coupling efficiency between the chip and the fiber. Fig. 1(b) shows the microscope image of the device. The device utilizes the PN junction in a depletion mode and the traveling wave electrodes to translate the electrical signals to the optical signals [33]. The pads of GSGSG pattern induce the electrical signals into the device. TiN resistors as the terminators are fabricated at the end of the traveling wave electrodes to absorb the electrical signals and prevent the reflection of electrical signals. A thermal heater is formed as the control gate. To achieve a faster tuning, a PN junction embedded in the waveguide could be adopted.
3. Experiments and discussion An amplified spontaneous emission source and an optical spectrum analyzer are used to characterize the static transmission spectra of the device in different cases. To accurately measure the carrier dispersion effect induced by the PN junction, the device without TiN terminators is fabricated in order to avoid the thermal
Fig. 2. Transmission spectra of the device in the (a) XNOR and (b) XOR working modes. (For interpretation of the references to color in this figure, the reader is referred to the web version of this article.)
effect. Fig. 2 shows the static transmission spectra of the device in four different cases in the XNOR and XOR working modes. In the following each case, the analog input electrical voltage of 0 V is defined as the input logic value “0” and the analog input electrical voltage of 6 V is defined as the logic value “1”. In the XNOR working mode, the blue and pink curves have the maximum output optical intensity (Y¼ 1) when the voltages applied on both two arms are 0 V or 6 V. When the voltage applied on one of the two arms is 6 V and the voltage on the other is 0 V, the output optical signal has the minimum output optical intensity (Y ¼0) as shown in the red and cyan curves in Fig. 2(a). In the XOR working mode, the output optical signals are exactly opposite to those in the XNOR working mode as shown in Fig. 2(b). The extinction ratio of the output optical signal in the XNOR working mode is only 3.4 dB. Although the extinction ratio in the XOR working mode could reach as high as 23 dB, the output optical power has an extra loss of 2.7 dB. However, unlike the analog transmission system, the logic operation only requires that the “1” and “0” logic values have enough difference to be distinguished from each other. The output optical signals in the two working modes have almost the same output swing to guarantee that the logic values “1” and “0” could be identified. Additionally, due to the symmetrical design, all the static transmission spectra are very flat. The fluctuation of the output optical signal as the logic value “1” is less than 0.6 dB in the
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Fig. 3. Experimental setup for characterizing the dynamic response of the directed XNOR/NOR optical logic circuit. DCS: direct current source; PC: polarization controller; PPG: pulse pattern generator; EA: electrical amplifier; EC: electrical clock; EDFA: Erbium-doped-fiber-amplifier; TF: tunable filter; DCA: digital communication analyzer; OSA: optical spectrum analyzer; OVNA: optical vector network analyzer.
wavelength range of 40 nm. The wavelength insensitivity of the device makes it appropriate for reducing the complexity of the future optical logic array system. Fig. 3 shows the experimental setup for characterizing the dynamic response of the directed XOR/XNOR optical logic circuit based on silicon MZI. A monolithic light is coupled into the chip through a lensed fiber. A polarization controller is used to control the polarization of light since the silicon waveguide only supports the TE mode. A direct current (DC) resource is used to tune the optical transmission point by the heater. Two independent highspeed pulse pattern generators are adopted to generate two input operands X1 and X2. The output optical signal Y as the logic operation result is amplified by an Erbium-doped-fiber-amplifier (EDFA) and passes through an optical filter to reduce the optical noise induced by EDFA. Finally, the output optical signal is fed into the oscilloscope with an optical head for pulse pattern observation. The optical vector network analyzer is used to characterize
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the electro-optical (EO) response of the device. As shown in Fig. 4 (a), the device has an EO bandwidth of around 20 GHz. When the applied reverse voltage increases from 0 V to 5 V, the EO bandwidth will increase from 17.4 GHz to 21.5 GHz. With the increase of the applied reverse voltage, the depletion capacitance of the PN junction decreases and the propagation loss of the traveling wave electrode decreases. Thus the EO bandwidth of the device reaches as high as 21.5 GHz, which makes the device suitable for the highspeed application. Fig. 4(a)–(c) shows the eye diagrams of the device at the speeds of 10 Gbps, 20 Gbps and 30 Gbps respectively when only one arm is modulated by a pseudo-random-binarysequence (PRBS) electrical signal with a pattern length of 231-1. The clearly opened eye diagrams indicate that the device can be used for the high-speed logic operation. The logic operation experiment is performed as follows. For the pulse pattern observation, two self-defined electrical pulse trains (X1 ¼00110101, X2 ¼10100111) are generated by the multi-channel PPG. Phase-matched cables, electrical amplifiers and Bias-Tees guarantee the synchronization of the driving signals at the electrical input port of the device. The driving voltage swing is 6 V and the reverse bias is 3 V. After the output optical signal is amplified by EDFA, the pulse pattern can be observed on the oscilloscope. When the device is optically biased at the maximum and minimum transmission points by tuning the heater, the XNOR and XOR operation results can be achieved respectively. Theoretically, the logic result sequences of the XNOR and XOR operations should be 01101101 and 10010010. Fig. 5(a)–(c) show all the pulse patterns of the operation results at different speeds. Clearly, the device can work correctly at the speed of 10 Gbps and 20 Gbps. The XOR logic operation is performed at the speed of 30 Gbps. However, the XNOR logic operation is not achieved at 30 Gbps, which is due to the relatively low extinction ratio in the XNOR working mode. In order to verify the dynamic performance of the device driven
Fig. 4. (a) Electro-optical responses of the device under different reverse voltages. Eye diagrams of the device at the speeds of (b) 10 Gbps, (c) 20 Gbps, and (d) 30 Gbps.
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Fig. 5. Pulse patterns of the XNOR/XOR logic operations at the speeds of (a) 10 Gbps, (b) 20 Gbps, and (c) 30 Gbps.
Fig. 6. Eye diagrams of the XNOR/XOR logic operations at the speeds of (a)/(c) 10 Gbps, (b)/(d) 20 Gbps, and (c)/(e) 30 Gbps.
Fig. 7. Pulse patterns of the (a) XNOR and (b) XOR logic operations at the speed of 20 Gbps when the light beams of different wavelengths are injected into the device.
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by all kinds of the input pulse patterns, two PRBS (231-1) electrical signals are adopted as the input operands. Because of the huge number of the 231-1 pulse pattern, it is impossible to identify the accuracy by counting out the pulse pattern as above. Fig. 6(a)–(f) shows the eye diagrams of the device in two working modes at different working speeds. The extinction ratios of the XNOR operation at 10 Gbps and 20 Gbps are 3 dB and 2.5 dB respectively, which are mainly due to the limited EO bandwidth of the device. For the 10 Gbps and 20 Gbps signals, the powers are mainly located in the frequency ranges of 10 GHz and 20 GHz. According to Fig. 4(a), the power response in the frequency range from DC to 10 GHz is almost flat. When the frequency range is larger, the power response decreases and reduces the extinction ratio at the speed of 20 Gbps. As the speed increases to 30 Gbps, the extinction ratio decreases further and the oscilloscope cannot calculate the extinction ratio, which means that the difference between the logic value “0” and “1” is too small to be distinguished by the oscilloscope. This is also the reason why we cannot observe the correct pulse pattern of the XNOR operation at the speed of 30 Gbps in Fig. 5(c). All the eye diagrams of the XOR operation are observed and the extinction ratios are larger than 7.8 dB, which is consistent with the pulse pattern observation. The wavelength sensitivity experiment is also performed. The pulse pattern responses with the different wavelengths are shown in Fig. 7. The XNOR and XOR operation results are correct in the wavelength range from 1525 nm to 1565 nm at the speed of 20 Gbps, which indicates that the device can work correctly in a wavelength range of 40 nm at a speed up to 20 Gbps. When the wavelength becomes longer, the output optical signal will decrease as shown in Fig. 7. This is caused by the inconstant amplification response of the EDFA with the wavelength of the input optical signal.
4. Conclusion We demonstrate a directed XNOR/XOR optical logic circuit based on silicon MZI. The device adopts the symmetric arm design, which makes it wavelength-insensitive in a wavelength range of 40 nm. When the device is optically biased at the maximum or minimum transmission points by tuning the heater on one of its arms, it can perform the XNOR or XOR operations respectively at a speed up to 20 Gbps. The high-speed and reconfigurable abilities of the device make it suitable for the future programmable optical logic array.
Acknowledgment This work was supported by the National Natural Science Foundation of China (NSFC) under Grants 61204061, 61235001, and 61377067, the National High Technology Research and Development Program of China under Grants 2015AA010103 and 2015AA010901 and the Scientific and Technological Innovation Cross Team of Chinese Academy of Sciences under Grant Y374010000.
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