All-optical XOR, NOR, and NAND logic functions with parallel semiconductor optical amplifier-based Mach-Zehnder interferometer modules

Optics and Laser Technology 108 (2018) 426–433

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All-optical XOR, NOR, and NAND logic functions with parallel semiconductor optical amplifier-based Mach-Zehnder interferometer modules Amer Kotb a,b,⇑, Kyriakos E. Zoiros c, Chunlei Guo a,d,⇑ a

The Guo China-US Photonics Laboratory, Changchun Institute of Optics, Fine Mechanics, and Physics, Chinese Academy of Sciences, Changchun 130033, China Department of Physics, Faculty of Science, University of Fayoum, Fayoum 63514, Egypt Lightwave Communications Research Group, Department of Electrical and Computer Engineering, School of Engineering, Democritus University of Thrace, Xanthi 67100, Greece d The Institute of Optics, University of Rochester, Rochester, NY 14627, USA b c

a r t i c l e

i n f o

Article history: Received 16 April 2018 Received in revised form 14 June 2018 Accepted 12 July 2018

Keywords: All-optical XOR gate All-optical NOR gate All-optical NAND gate Semiconductor optical amplifier Mach-Zehnder interferometer

a b s t r a c t The performance of XOR, NOR, and NAND functions implemented all-optically (AO) using two parallel semiconductor optical amplifier (SOA)-based Mach-Zehnder interferometers is simulated and investigated. The dependence of the quality factor on key input signals and SOAs parameters is investigated and assessed. The obtained results show that the target AO Boolean functions can simultaneously be realized with the employed scheme with both logical correctness and high quality at 80 Gb/s. Ó 2018 Elsevier Ltd. All rights reserved.

1. Introduction A key requirement in the effort to manipulate information at a fundamental and system-oriented level entirely in the optical domain, i.e. all-optically (AO), and hence avoid cumbersome optical-to-electrical-to-optical conversions is the ability to execute Boolean functions exclusively by means of light between data modulated signals at ultrafast line rates [1]. Among these functions, the XOR, NOR, and NAND are particularly distinguished due to the special role that they play in the design and realization of AO circuits and subsystems of enhanced logic functionality. More specifically, the XOR function is decisively involved in indispensable AO digital processing [2] and arithmetic [3] tasks. The NOR and the NAND are universal functions by repeated use of which it is possible to synthesize any Boolean function and hence construct any digital circuit [4]. Among various technological approaches that have been proposed for the AO implementation of these core Boolean functions, those that rely on semiconductor optical amplifiers (SOA) have been widely adopted [5] owing to

⇑ Corresponding authors at: The Guo China-US Photonics Laboratory, Changchun Institute of Optics, Fine Mechanics, and Physics, Chinese Academy of Sciences, Changchun 130033, China. E-mail addresses: [email protected] (A. Kotb), [email protected] (C. Guo). https://doi.org/10.1016/j.optlastec.2018.07.027 0030-3992/Ó 2018 Elsevier Ltd. All rights reserved.

these devices’ attractive features of signal amplification, similar to other existing alternatives [6], wide gain bandwidth, strong nonlinearity, reasonable switching energy, low power consumption, compact structure, and proven integration potential. At the same time, it is desirable from a practical perspective to perform all these three functions simultaneously without changing each time the switching module and the way it is configured or driven, so as to enable flexible, smart, reliable and repeatable operation, optimum use of hardware resources, reduced cost and complexity, formation of programmable gate units and arrays, construction of large multi-port switch fabrics as well as of multistage architectures and advanced degree of transparency and intelligence at the optical layer [7]. The achievement of this reconfigurability has been pursued based on SOAs either alone, in conjunction with optical filters, or by incorporating them in an interferometric arrangement. More specifically, in the first case [8], the crossgain modulation (XGM) effect is exploited in multiple SOA replicas, which are suitably interconnected to obtain the AO XOR, NAND and NOR logic functions. However, XGM suffers from high induced chirp and relatively low output contrast ratio, which deteriorates the quality of the logical outcome, especially when the latter must be combined with another one obtained in a similar fashion. In the second case [9], several carefully detuned filters of identical passband shape, slope, and width are concurrently employed at the

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outputs of an equal number of SOAs to selectively pass or eliminate spectrally broadened portions of the signal to be switched. This method, however, suffers from lack of versatility, especially when it must be adapted to combinational or sequential applications [10]. Additionally, issues such as pulse format preservation and decreased optical signal-to-noise ratio due to the suppression not only of the target spectral components according to the principle exploited for AO logic but also of useful information compromise the scheme’ global usability. Finally, in the third case, SOAs are placed in the Mach-Zehnder Interferometer (MZI) to form the building block, which constitutes by far the primary choice for AO switching purposes [11]. However, the desired logic functions are obtained by cascading extra switching stages or launching into a SOA the pair of strong data streams, which comes at the expense of increased complexity, latency, and footprint and heavy strain on the SOA gain dynamics with undesirable consequences for the overall performance and feasibility of the respective schemes [12,13]. An alternative option, which has been proposed to simultaneously execute the considered logic functions, uses two SOAbased MZI structures in parallel [14]. This topology provides more freedom and autonomy in handling, adjusting, controlling, and optimizing the relevant setup, which requires less hardware than its conventional counterparts having the same aim [15,16]. Moreover, by simultaneously executing dual target logic functions, the operation of each one of these functions becomes independent of the other, thus making the task of their performance improvement more versatile and efficient. Concurrently, it allows for latency reduction, more affordable driving switching energy and blocking of interstage pattern effect accumulation encountered in cascaded interconnection architectures, as well as information processing in a pipeline fashion with better fanout capability. In this manner, it can better satisfy the key requirements for efficiently implementing AO ultrafast digital circuits and subsystems of enhanced functionality. Thus, in this paper, we follow this idea and extend its applicability it in two ways: First, by extending the AO logic functions speed of operation at 80 Gb/s, which compared to [14] corresponds to an eight-fold increase so as to comply with the trends of single-channel data rates in modern lightwave networks. Second, by demonstrating that these Boolean functionalities can also be executed between pulses of return-to-zero (RZ) data format, which, unlike the non-RZ ones used in [14], exhibits superior transmission properties [17]. For this purpose, we conduct an extensive theoretical treatment based on numerical simulation to study the performance of the AO XOR, NOR, and NAND functions. This is done by employing as metric the quality factor (QF), which, by definition [18], characterizes the logic operation across the entire switched data and hence is more rigorous than when only two extreme binary values are taken into account, as in [14]. The impact of key input signals and SOAs operating parameters is investigated and assessed for each function. In order to obtain reasonable results, the effects of the amplified spontaneous emission (ASE) and the operating temperature on the QF are also taken into account in the simulations. The obtained results show that the target AO functions can simultaneously be executed with both logical correctness and high quality at the pursued data rate.

2. Gates’ implementation 2.1. Operation principle In the proposed design shown in Fig. 1, a continuous wave (CW) signal acting as the ‘probe’ is repeatedly split and launched into each arm of two parallel MZIs. Concurrently, the data signals (A and B) between which it is intended to execute the target AO logic functions are launched into the two MZIs acting as the ‘pumps’.

Fig. 1. Schematic of two-parallel SOA-MZIs-based all-optical XOR, NOR, and NAND gates. OC: 3 dB optical coupler.

MZI1 is used in order to realize the XOR gate. Data A and B induce a phase shift on the CW beam via the cross-phase modulation (XPM) effect. When both A and B are ‘0’, MZI1 remains balanced and the logic outcome is ‘0’. When A = ‘1’ and B = ‘0’, the CW beam constituents in MZI1 upper and lower arms undergo phase changes via XPM. Thus, when they recombine at exit point ‘9’ they interfere constructively and the output is ‘1’. The same result is obtained when A = ‘0’ and B = ‘1’. However, when both A and B are ‘1’, the CW beams experience identical phase changes, so they interfere destructively and the output is ‘0’. In this manner, the XOR gate is obtained. For NOR operation, the incoming data (A and B) and the clock signals are launched into the upper and lower arms of the lower MZI, respectively. The data and the clock signals are capable of incurring the same gain and phase modulation in each MZI2 arm. When signals A and B are (01, 10 or 11) and the clock signal is all 1’s, the MZI2 becomes more saturated, therefore the probe signal travelling through the two arms will be either (10, 01 or 11), which upon destructive interference results in ‘0’ at the output. On the other hand, when both A and B are ‘0’, the clock signal will break the phase balance of MZI2 and constructive interference occurs at the output of MZI2, which results in logic ‘1’. In this manner, the Boolean NOR gate is achieved. Then the logic outcomes of the XOR and the NOR gates are combined to realize, by definition, the NAND operation. 2.2. Simulation The SOA-MZIs time-dependent response is described by the following first-order coupled differential equations [19,20]:

dhCD ðtÞ h0  hCD ðtÞ ¼ dt sC  ðexp½hCD ðt Þ þ hCH ðtÞ þ hSHB ðtÞ  1Þ dhCH ðtÞ hCH ðtÞ  ¼  dt sCH

P in ðtÞ Esat

ð1Þ

eCH ð exp ½hCD ðtÞ þ hCH ðtÞ þ hSHB ðtÞ  1Þ P in ðtÞ sCH ð2Þ

dhSHB ðtÞ hSHB ðtÞ ¼   dt sSHB

eSHB ð exp ½hCD ðtÞ þ hCH ðtÞ sSHB

þ hSHB ðtÞ  1Þ Pin ðtÞ 

dhCD ðtÞ dhCH ðtÞ  dt dt

ð3Þ

where the SOA’s gains integrated over the active region length, hCD(t), hCH(t), and hSHB(t), are induced by interband effects, which include the carrier depletion (CD), and intraband effects, which include carrier heating (CH) and spectral hole burning (SHB). h0 = ln[G0], where G0 is the unsaturated power gain. Pin(t) is the total

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input power inside the MZIs according to the considered operations. Esat = Psatsc is the saturation energy, where Psat is the saturation power and sc is the carrier lifetime. sCH and sSHB is the temperature relaxation rate and the carrier-carrier scattering rate, respectively. eCH and eSHB are the nonlinear gain suppression factors due to CH and SHB, respectively. The total gain G(t) of each SOA is given by:

GðtÞ ¼ exp ½ ðhCD ðtÞ þ hCH ðtÞ þ hSHB ðtÞ Þ

ð4Þ

The phase change incurred on the signal propagated in each SOA is given by:

UðtÞ ¼  0:5ða hCD ðtÞ þ aCH hCH ðtÞ þ aSHB hSHB ðtÞÞ

ð5Þ

where a is the traditional linewidth enhancement factor (a-factor). aCH and aSHB are the linewidth enhancement factors due to CH and SHB, respectively. The value of aSHB is zero because SHB produces a symmetrical spectral hole centered at the signal wavelength [19]. Eqs. (4) and (5) are used to describe the operation of interferometric switching functionalities [21], as those considered in this paper. For the target AO operations, signals A, B, and clock are assumed to be Gaussian-shaped with input pulses full-width at half-maximum (FWHM), sFWHM, energy (E0), bit period (T), and length of pseudorandom binary sequence (PRBS), n:

PA; B;Clk ðtÞ  Pin ðtÞ

" # pffiffiffiffiffiffiffiffiffiffiffi n¼þ1 X 2 lnð2Þ E0 4lnð2Þðt  n TÞ2 ¼ anA;B;Clk pffiffiffiffi exp  2 n¼1

p sFWHM

sFWHM

ð6Þ

where anA,B,Clk symbolizes the n-th pulse, which can take the logical values of ‘1’ or ‘0’ for signals A, B and ‘1’s’ for the clock signal. The used data pulse modulation format is that of return-to-zero (RZ), which is widely employed in optical time-division multiplexing systems owing to its attractive features of better tolerance to fiber nonlinearities and improved receiver sensitivity [22]. In this coding scheme a pulse does not occupy the whole repetition interval, but only a fraction of it, which should be less than approximately 33% so as to avoid interference between adjacent allocated bit slots [23]. The generation of optical pulses having the specific temporally confined form, and being as fast and short, as in this paper, is technologically feasible with lightwave sources developed for this purpose [24]. For the XOR operation, the optical input powers inside the two arms of MZI1 are expressed by:

Pin;SOA1 ðtÞ ¼ PA ðtÞ þ 0:25 P CW

ð7Þ

Pin;SOA2 ðtÞ ¼ 0:5PB ðtÞ þ 0:25 PCW

ð8Þ

The output power of the XOR gate using MZI1 is given by [13,19]:   pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi P XOR ðtÞ ¼ 0:125 P CW G1 ðtÞ þ G2 ðtÞ  2 G1 ðtÞ G2 ðtÞ cos ½U1 ðtÞ  U2 ðtÞ ð9Þ

where G1,2(t) and U1,2(t) are the time-dependent total gains and phase shifts induced inside SOA1 and SOA2 of MZI1, respectively. For the NOR operation, the input optical powers going inside the two arms of MZI2 are given by:

Pin;SOA3 ðtÞ ¼ PA ðtÞ þ 0:5PB ðtÞ þ 0:25PCW

ð10Þ

Pin;SOA4 ðtÞ ¼ PClk ðtÞ þ 0:25PCW

ð11Þ

where the coefficient ‘0.5’ takes into account the coupling of the CW probe into the two arms of each MZI. The output power of the NOR gate using MZI2 is given by [13,19]:

PNOR ðtÞ ¼ 0:125 PCW ðG3 ðtÞ þ G4 ðtÞ  pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi  2 G3 ðtÞ G4 ðtÞ cos ½U3 ðtÞ  U4 ðtÞ

ð12Þ

Table 1 Default simulation parameters’ values. Symbol

Definition

Value

Unit

L d w

Length of active region Thickness of active region Width of active region Confinement factor Carrier lifetime Saturation power Traditional linewidth enhancement factor Linewidth enhancement factor due to CH Linewidth enhancement factor due to SHB Temperature relaxation rate Carrier-carrier scattering rate Nonlinear gain suppression factor due to CH Nonlinear gain suppression factor due to SHB Unsaturated power gain Injection current Operating temperature Data rate Pulse energy Pulse width Spontaneous emission factor Optical bandwidth

0.5 0.3 3.0 0.15 100 30 6 1 0 0.3 0.1 0.02 0.02 30 100 30 80 70 1 2 2

mm µm µm – ps mW – – – ps ps W1 W1 dB mA °C Gb/s fJ ps – nm

C

sc Psat

a aCH aSHB sCH sSHB eCH eSHB G0 I Top T E0

sFWHM Nsp B0

where G3,4(t) and U3,4(t) are the time-dependent total gains and phase shifts induced inside SOA3 and SOA4 of MZI2, respectively. The XOR and NOR gates’ outputs calculated from (9) and (12), respectively, are combined to realize the NAND gate, whose output power is thus given by the sum:

PNAND ðtÞ ¼ PXOR ðtÞ þ PNOR ðtÞ

ð13Þ

The contribution of SOAs amplified spontaneous emission (ASE) is taken into account by adding to (9), (12) and (13) the corresponding power [13]:

PASE ¼ NSP ðhðG0  1Þ=2pÞtB0

ð14Þ

 is normalized where NSP is the spontaneous emission factor, h Planck’s constant, and B0 is the optical bandwidth at an optical frequency (t) in the vicinity of 1550 nm. To improve the performance of the considered gates, the key input signals and SOAs parameters should be optimized by means of numerical simulation. The direct band-gap semiconductor materials used in this simulation are InGaAsP/InP. The default parameters values together with their symbol and definition are cited in Table 1. 3. Results The performance of the considered AO logic operations is investigated and evaluated against the QF. This metric is defined as QF = (P1  P0)/(r1 + r0), where P1,0 is the mean peak power and r1,0 the standard deviation of the logical ‘1’s and ‘0’s, respectively, which occur for each AO gate. The QF should exceed the value of 6 to ensure that the bit-error rate is less than 109 and hence acceptable for digital logic purposes [18]. The QF values obtained using the two parallel SOA-MZIs are 10.2, 15.7, and 22.6 for the XOR, NOR, and NAND, respectively. The simulated logic outcome pulse profiles with the corresponding eye diagrams for these operations are shown in Figs. 2–4. The eye diagrams are clear and open, which confirm that these Boolean operations can be executed at a data rate of 80 Gb/s with both logical correctness and high quality. Figs. 5–7 depict the impact of several key input signal and SOAs parameters on the QF of the three target logic operations. The characteristics of these figures are (i) For all investigated parameters, the order of appearance of the curves contained within each diagram is the same from top to bottom, i.e. highest the NAND, then

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Fig. 2. Simulated logical outcome pulse profile and eye diagram for XOR operation using two parallel SOA-MZIs.

Fig. 3. Simulated logical outcome pulse profile and eye diagram for NOR operation using two parallel SOA-MZIs.

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Fig. 4. Simulated logical outcome pulse profile and eye diagram for NAND operation using two parallel SOA-MZIs.

Fig. 5. QF vs. (a) pulse energy, (b) injection current, and (c) confinement factor for two parallel SOA-MZIs-based XOR, NOR, and NAND operations.

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431

Fig. 6. QF vs. (a) length, (b) thickness, (c) a-factor, (d) carrier lifetime, and (e) saturation power for two parallel SOA-MZIs-based XOR, NOR, and NAND operations.

the NOR and lowest the XOR. This is attributed to the special nature of the logic outcome of each function and the physical way it is obtained by means of the SOA-based MZI principle of operation [25]. This implies that the logic operation that is mostly affected by the variation of these parameters is the XOR, then follows the NOR and least the NAND. (ii) Among the investigated parameters, we can separate between those whose variation within the selected scanned range of values is not capable of rendering the QF unacceptable for any of the pursued logic operations and those for which the QF can be dropped below its permissible limit for some Boolean function. More specifically, and as shown in Fig. 5 (a)–(c), in the first category fall the pulse energy, injection current,

and confinement factor, so these parameters can be considered to belong to the ‘free design tier’ as they do not critically affect the performance of the gates. The second category includes the length and thickness of active region, alpha factor and carrier lifetime, and saturation power for which, as shown in Fig. 6(a)–(e), the XOR gate but not the NOR gate is impaired. Thus, these parameters form the ‘basic design tier’ since their proper selection is indispensable for guaranteeing at least the minimum required QF. Finally, the remaining parameters, namely the pulse width, spontaneous emission factor, operating temperature, and equivalent PRBS length are those which, as shown in Fig. 7(a)–(d), define

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Fig. 7. QF vs. (a) pulse width, (b) spontaneous emission factor, (c) operating temperature, and (d) equivalent PRBS length for two parallel SOA-MZIs-based XOR, NOR, and NAND operations.

the ‘primary design tier’ since suitably choosing them is imperative to avoid the QF of both XOR and NOR gates to become inadmissible. By combing the ‘basic’ with the ‘primary’ parameters’ design tier, and noting that the gate that sets the minimum parameters’ requirements is the XOR, we can see that in order to have the QF surpass the specified bound the involved parameters must be chosen in such manner that is less convenient, in the sense that they correspond to more tight operating conditions. Practically, this means using SOAs being less compact, inducing less strong differential phase shift in the parallel MZIs, responding faster to random optical excitation, as well as providing more power to bring the SOAs to the necessary saturation point, generating narrower input optical pulses, lowering the SOAs noise contribution, operating the SOAs at cooler degree and keeping the length of the data streams shorter. This is the price paid for achieving the implementation of all three gates simultaneously, but nevertheless, the attempt is feasible and affordable from a technological perspective, and the best performance with regard to the QF can be obtained by optimizing all examined parameters.

4. Conclusion In conclusion, two parallel SOA-MZIs-based all-optical XOR, NOR, and NAND gates were theoretically analyzed and investigated. The results show that by properly distinguishing the impact of the operating parameters and properly selecting them, these Boolean functions can be realized at 80 Gb/ with both logical correctness and high quality.

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