Depletion mode shrinks CPU chips

Depletion mode shrinks CPU chips

World Abstracts on Microelectronics and Reliability cash registers and traffic control. The emphasis in microprocessor development has been a 8-bit wo...

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World Abstracts on Microelectronics and Reliability cash registers and traffic control. The emphasis in microprocessor development has been a 8-bit word length designs. For many applications an 8-bit word length requires the use of double precision arithmetic for the required accuracy, multiple registers to form 16-bit memory addresses, find multiple memory accesses to fetch multi-byte instructions. This has meant slower execution times and inefficient programs (higher memory costs) when 8-bit microprocessors were used in these applications. The multichip 16-bit microprocessor has been cost effective in many of these applications, but has provided unused flexibility or speed (at extra cost) in others. This paper describes a single-chip, 16-bit microprocessor that provides the benefits of a 16-bit CPU at lower cost than the multichip design. 16-k RAM built with proven process may offer high start-up reliability. CLINTON Kuo, NORI KITAGAWA,DEENE OGDEN and JOHN HEWKIN. Electronics p. 81. (May 13 1976). Designed with single-level polysilicon process, chip has 350-nsec maximum access and power dissipation of no more than 550 mW. Single-chip, integrated digital voltmeter. J. A. DEN OUDEN. Philips Electronic Allp. Bull. 33 (4), p. 187 (1976). The newly developed LOCMOS technique of integrated circuit manufacture has made it possible to integrate a complete 31 digit, self-ranging digital voltmeter. The heart of the Dew IC is an integrating analog-to-digital converter. In the converter, a capacitor is first charged to a level equal to the voltage to be measured and then allowed to discharge slowly. A level sensor than allows accurately-shaped pulses to be delivered to recharge the capacitor whenever its voltage falls below the required level. The rate at which these pulses are delivered is a measure of the incoming voltage In this article, the operating principles of the DVM are first summarized and equations which describe its operation derived; this is followed by a functional description of the GZFI200D. Calculations are given to show the in-

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fluence of deviations in the chopper, the reference voltages and the operational amplifier. Finally, a description is given of a practical panel-mounted DVM. CDI, the bipolar LSI technology with total systems integration capability. P. KREBS. Microelectron. and Reliab. 14, 385 (1975). The system designer of today is becoming bewildered by an ever increasing variety of semiconductor technologies (if he can get past identifying the initials). Among bipolar technologies, isoplanar and its variants, thin epitaxy processes such as Plessey Process 3, and integrated injection logic (I2L) all aim at specific types of advantage and are normally thus limited to specific market sectors. Metal oxide semiconductor (MOS) technologies have similarly proliferated, and can conveniently be split into single channel, e.g. P-Channel, and complementary MOS technologies. These again have their specific advantages and market sectors. Ferranti CDL however, is unique in being able to penetrate a broad market front using a single and ';veil understood standard process. Such an approach to a variety of systems is termed Total Systems Integration, which means that frequently a complete and relatively complex system can be realised on a single chip with minimal external components. This is made possible by the many attributes of CD1, such as the performance of a bipolar process with the packing density of MOS, the combination of digital and linear circuits on the same chip (digilin), excellent device performance over a wide current range and particularly at very low currents and good speed performance with better speed power product. To substantiate these claims, some examples of CDI products and applications are given. Depletion mode shrinks CPU chips. BERNARD COLE. Electronics p. 65 (May 13 1976). MOS microprocessors, by adopting technique used in calculators and memories, are also approaching microinstruction times of bipolar Schottky devices.

7. SEMICONDUCTOR INTEGRATED CIRCUITS, DEVICES AND MATERIALS The derivation of the activation energy for boron deposition using a boron nitride source. M. CROOKE and A. G. K. LUPSCH. Microelectronics 7 (3), 49 (1976). After p-type dopant has been predeposited on silicon from a boron nitride disc, the sheet resistivity is usually measured: this gives an indication of the amount of dopant which has been deposited. This measured value of the resistivity, ~s, is linked to the time t and temperature T during predeposition by the relation p~ = A(t) exp (AE/kT), where AE is the activation energy. The value of AE is derived, which extends the usefulness of this formula considerably, making it possible to calculate data for plotting families of calibration curves for any diffusion furnace arrangement, instead of having to obtain results after laborious and time-consuming measurements. Thermogravimetric measurements are also presented to illustrate the behaviour of boron nitride during regeneration, shortly thereafter and also after long-term use. Separation of surface and bulk components in MOS-C generation rate measurements. D. W. SMALLand R. F. PIERRET. Solid-State Electronics 19 (6), 505 (1976). From a survey of the MOS-C literature it is concluded that the problem of separating generation rate components, specifically separating the depletion region and lateral surface components, is either ignored or handled improperly. Herein a separation technique, the subtraction method, is introduced after considering possible alternative approaches.

Detailed consideration is given to the underlying conceptual basis, advantages, and limitations of the technique. Finally, sample experimental results derived from both annealed and unannealed structures are presented primarily to illustrate the subtraction method procedure.

A new method in the theory of indirect excitons in semiconductors. N. O. LIPARI and M. ALT~a~ELLL Solid-State Commun. 18, 951 (1976). A new method for the analysis of indirect excitons in semiconductors is introduced. This approach yields a physical interpretation of the various terms present in the Hamiltonian, and allows an accurate evaluation of the energies of the exciton levels. For Ge, a simpler but equally accurate "axial model" is introduced, which is very suitable for investigating the exciton dispersion, optical lineshapes, and the effect of exciton exciton interactions and external fields.

Effect of substrate resistance on MOS distributed RC notch network. S. M. Bozlc, C. A. MILLER and R. I. SALAWU. Microelectron. and Reliab. 14. 435 (1975). This paper presents results of further work on S O S distributed RC networks. The theory has been extended by taking the substrate resistance into account, and this has resulted in good agreement with experiment.