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Development of copper wire bonding application technology
World Abstracts on Microelectronics and Reliability
Development of copper wire bonding application technology. KENJI TOYOZAWA, KAZUYA FUJITA, SYOZO M1NAMIDEand TAKAMICHI MAEDA. IEEE Trans. Compon. Hybrids mfg TechnoL 13(4), 667 (1990). Continuous forming of oxidefree, stable, spherical copper balls has been realized by blowing a reducing gas over the copper wire during copper ball formation (sparking). Chip damage resulting from hard copper wire, including underpad crack and silicon cratering, has been a major technical hurdle to copper wire bonding. These problems have all been overcome by introducing the double load wire bonding technology. Unlike the conventional wire bonding technology, the double load wire bonding technology can minimize chip damage from wire bonding stress because the bonding load is decreased during ultrasonic power oscillation. Also, it was confirmed that copper wires have a reliability equivalent to that of gold wires. The double load wire bonding technology has allowed us to use copper wires in MOS LSI devices on a commercial basis. Implementation of tungsten metallization in multilevel interconnection technologies. PAUL E. RILEY, THOMASE. CLARK, EDWARD F. GLEASON and MARION M. GARVER. IEEE Trans. Semicond. Mfg 3(4), 150 (1990). The techniques of experimental design and response-surface methodology have been used to produce empirical models of the deposition and etchback of tungsten in commercially available reactors for a tungsten plug technology. Deposition was carried out in a Genus 8402 LPCVD batch reactor by the H 2 reduction of WF 6. Response-surfaces for deposition rate, sheet resistance uniformity, resistivity, and film stress were developed as a function of reactor pressure, reactor temperature, and flow rate of WF 6 at a fixed H 2 flow rate using linear-interactive models. A thin layer of TiN was used to insure adhesion of tungsten to SiO 2. Etchback of the composite layer of W/TiN to form via plugs was performed in a Tegal 804 single-wafer system with a two-step process using mixtures of SF 6 with C2 F6 and He with C12 in step l and step 2, respectively. Process parameters for both steps were obtained from quadratic models of etch rate and etch uniformity. A plasma loading effect with tungsten in the F-rich plasma of step l was controlled in two ways: by addition of C2F 6 to form fluorocarbon fragments in the plasma which compete with W and F atoms and by precise endpoint detection of excited N 2 molecules in the plasma which are formed during the etching of the underlying TiN layer. Correlation between electrical resistance and microstructure in gold wirebonds on aluminum films. LISA MAIOCCO, DONNA SMYERS, PAUL R. MUNROE and IAN BAKER. IEEE Trans. Compon. Hybrids mfg Technol. 13(3), 592 (1990). Gold ball bonds attached to either pure A1 films or A1 films with Cu and Si additions were annealed at temperatures in the range 77-277°C for periods of up to 3000 h. Electrical resistance of the bonds was measured to within + / - 1 rn~ using a manual four probe arrangement with an applied current of up to 100 mA. Nonlinear multiple regression analysis of the data produced an empirical model for the resistance increase up to 8 m~. The resistance increases are related to the intermetallic phases and void configurations observed. Self-aligned flip-chip assembly of photonic devices with electrical and optical connections. MICHAEL J. WALE and COLIN EDGE. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 780 (1990). A new technique is discussed which offers major advantages in performance, ruggedness, and cost in the interfacing of integrated optical circuits. Based on a selfaligned flip-chip solder bump bonding process, the technique achieves ~ 1 pm accuracy in optical fiber placement MR31/5~P
1049
without requiring micromanipulation of piece parts during final assembly. A high density of electrical intereonnections is achieved simultaneously with the optical fiber connections.
Large scale multilayer giass--ceramic sabstrate for saporcompnter. Yuzo SHIMADAet aL IEEE Trans. Comport. Hybrids mfg Technol. 13(4), 751 (1990). Supercomputer systems require a new packaging technology with high propagation speed and high wiring density for a multichip mounted substrate. It is advantageous for reducing clock cycle time to house a large number of LSI chips and achieve the high density wiring in a substrate as far as possible, owing to reduction in line length and intercircuit capacitance. A large scale multilayer #ass-ceramic (MGC) substrate, which has a low dielectric constant (7.8) and a high flexural strength, has been developed by means of highly accurate green sheet technology. The new multilayer substrate has the following excellent characteristics. (1) Substrates size is 225 mm by 225 mm, 5.5 mm thick, (2) Low electrical resistivity (3 pf~ cm -1) can be realized by using a gold paste system in forming the conductors, for achieving a low voltage drop. (3) The substrate can support high density pattern processing due to the highly accurate process. (4) Shrinkage can be controlled to 13.0% +0.3%, in spite of large dimensions, by shrinkage control technology. (5) The substrate has a high flexural strength of 3000 kg cm- 2. This substrate is applied to the multilayer substrate (MLS) for supercomputer multichip packages. It has become possible to achieve high system performance. For the MLS, polyimide layers with signal line are formed on the MGC substrate. The new substrate has 78 layers, of which 13 are conductive layers, and l I 540 I/O pins. The substrate houses up to 100 VLSI chips in a 225-mm square area.
Computation of transients in Lossy VLSI packaging interconuections. J. C. LIAO, OLGIERD A. PALUSINKI and J. L. PRINCE. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 833 (1990). This paper presents a method for analyzing the dynamic behavior of lossy electrical interconnects (with frequency-dependent parameters) in VLSI systems. The method allows for inclusion of the electrical interconnects which are terminated by networks of lumped passive (R, L, C) and active nonlinear devices (diodes, bipolar, and MOS transistors). The method consists of deriving the circuit model for a transmission line from impulse response data and incorporating this model into the existing computer program UANTL (University of Arizona Simulator for Nonlinearly Terminated Transmission Line Networks) which performs time-domain analysis for coupled transmission lines with nonlinear terminations. Several numerical experiments with this method were performed. Comparisons were made between the results obtained using this method and other published results. Optical components---the new challenge in packaging. MICHAEL R. MATTHEWS,BRIANM. MACDONALD and KEITH R. PRESTON. 1EEE Trans. Compon. Hybrids mfg Technol. 13(4), 798 (1990). We review recent developments in packaging technology for optical components used in fiber transmission systems. Topics covered include fiber coupling and fixing techniques, modular packaging concepts, high-speed component design, and advanced function components. A high performance package for lithium niobate modulators is described, which illustrates the packaging concepts outlined in this paper. Likely future trends in optical communications are discussed and the implications for component packaging are considered.
Development of copper wire bonding application technology. KENJI TOYOZAWA, KAZUYA FUJITA, SYOZO M1NAMIDEand TAKAMICHI MAEDA. IEEE Trans. Compon. Hybrids mfg TechnoL 13(4), 667 (1990). Continuous forming of oxidefree, stable, spherical copper balls has been realized by blowing a reducing gas over the copper wire during copper ball formation (sparking). Chip damage resulting from hard copper wire, including underpad crack and silicon cratering, has been a major technical hurdle to copper wire bonding. These problems have all been overcome by introducing the double load wire bonding technology. Unlike the conventional wire bonding technology, the double load wire bonding technology can minimize chip damage from wire bonding stress because the bonding load is decreased during ultrasonic power oscillation. Also, it was confirmed that copper wires have a reliability equivalent to that of gold wires. The double load wire bonding technology has allowed us to use copper wires in MOS LSI devices on a commercial basis. Implementation of tungsten metallization in multilevel interconnection technologies. PAUL E. RILEY, THOMASE. CLARK, EDWARD F. GLEASON and MARION M. GARVER. IEEE Trans. Semicond. Mfg 3(4), 150 (1990). The techniques of experimental design and response-surface methodology have been used to produce empirical models of the deposition and etchback of tungsten in commercially available reactors for a tungsten plug technology. Deposition was carried out in a Genus 8402 LPCVD batch reactor by the H 2 reduction of WF 6. Response-surfaces for deposition rate, sheet resistance uniformity, resistivity, and film stress were developed as a function of reactor pressure, reactor temperature, and flow rate of WF 6 at a fixed H 2 flow rate using linear-interactive models. A thin layer of TiN was used to insure adhesion of tungsten to SiO 2. Etchback of the composite layer of W/TiN to form via plugs was performed in a Tegal 804 single-wafer system with a two-step process using mixtures of SF 6 with C2 F6 and He with C12 in step l and step 2, respectively. Process parameters for both steps were obtained from quadratic models of etch rate and etch uniformity. A plasma loading effect with tungsten in the F-rich plasma of step l was controlled in two ways: by addition of C2F 6 to form fluorocarbon fragments in the plasma which compete with W and F atoms and by precise endpoint detection of excited N 2 molecules in the plasma which are formed during the etching of the underlying TiN layer. Correlation between electrical resistance and microstructure in gold wirebonds on aluminum films. LISA MAIOCCO, DONNA SMYERS, PAUL R. MUNROE and IAN BAKER. IEEE Trans. Compon. Hybrids mfg Technol. 13(3), 592 (1990). Gold ball bonds attached to either pure A1 films or A1 films with Cu and Si additions were annealed at temperatures in the range 77-277°C for periods of up to 3000 h. Electrical resistance of the bonds was measured to within + / - 1 rn~ using a manual four probe arrangement with an applied current of up to 100 mA. Nonlinear multiple regression analysis of the data produced an empirical model for the resistance increase up to 8 m~. The resistance increases are related to the intermetallic phases and void configurations observed. Self-aligned flip-chip assembly of photonic devices with electrical and optical connections. MICHAEL J. WALE and COLIN EDGE. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 780 (1990). A new technique is discussed which offers major advantages in performance, ruggedness, and cost in the interfacing of integrated optical circuits. Based on a selfaligned flip-chip solder bump bonding process, the technique achieves ~ 1 pm accuracy in optical fiber placement MR31/5~P
1049
without requiring micromanipulation of piece parts during final assembly. A high density of electrical intereonnections is achieved simultaneously with the optical fiber connections.
Large scale multilayer giass--ceramic sabstrate for saporcompnter. Yuzo SHIMADAet aL IEEE Trans. Comport. Hybrids mfg Technol. 13(4), 751 (1990). Supercomputer systems require a new packaging technology with high propagation speed and high wiring density for a multichip mounted substrate. It is advantageous for reducing clock cycle time to house a large number of LSI chips and achieve the high density wiring in a substrate as far as possible, owing to reduction in line length and intercircuit capacitance. A large scale multilayer #ass-ceramic (MGC) substrate, which has a low dielectric constant (7.8) and a high flexural strength, has been developed by means of highly accurate green sheet technology. The new multilayer substrate has the following excellent characteristics. (1) Substrates size is 225 mm by 225 mm, 5.5 mm thick, (2) Low electrical resistivity (3 pf~ cm -1) can be realized by using a gold paste system in forming the conductors, for achieving a low voltage drop. (3) The substrate can support high density pattern processing due to the highly accurate process. (4) Shrinkage can be controlled to 13.0% +0.3%, in spite of large dimensions, by shrinkage control technology. (5) The substrate has a high flexural strength of 3000 kg cm- 2. This substrate is applied to the multilayer substrate (MLS) for supercomputer multichip packages. It has become possible to achieve high system performance. For the MLS, polyimide layers with signal line are formed on the MGC substrate. The new substrate has 78 layers, of which 13 are conductive layers, and l I 540 I/O pins. The substrate houses up to 100 VLSI chips in a 225-mm square area.
Computation of transients in Lossy VLSI packaging interconuections. J. C. LIAO, OLGIERD A. PALUSINKI and J. L. PRINCE. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 833 (1990). This paper presents a method for analyzing the dynamic behavior of lossy electrical interconnects (with frequency-dependent parameters) in VLSI systems. The method allows for inclusion of the electrical interconnects which are terminated by networks of lumped passive (R, L, C) and active nonlinear devices (diodes, bipolar, and MOS transistors). The method consists of deriving the circuit model for a transmission line from impulse response data and incorporating this model into the existing computer program UANTL (University of Arizona Simulator for Nonlinearly Terminated Transmission Line Networks) which performs time-domain analysis for coupled transmission lines with nonlinear terminations. Several numerical experiments with this method were performed. Comparisons were made between the results obtained using this method and other published results. Optical components---the new challenge in packaging. MICHAEL R. MATTHEWS,BRIANM. MACDONALD and KEITH R. PRESTON. 1EEE Trans. Compon. Hybrids mfg Technol. 13(4), 798 (1990). We review recent developments in packaging technology for optical components used in fiber transmission systems. Topics covered include fiber coupling and fixing techniques, modular packaging concepts, high-speed component design, and advanced function components. A high performance package for lithium niobate modulators is described, which illustrates the packaging concepts outlined in this paper. Likely future trends in optical communications are discussed and the implications for component packaging are considered.