ARTICLE IN PRESS
Nuclear Instruments and Methods in Physics Research A 529 (2004) 421–424
Development of readout systems for neutron detectors S. Satoha,*, T. Inoa, M. Furusakaa, Y. Kiyanagib, N. Sakamotob, K. Sakaic,1 a
High Energy Accelerator Research Organization (KEK), Tsukuba, Ibaraki 305-0801, Japan b Hokkaido University, Sapporo, Hokkaido 060-8628, Japan c RIKEN, 2-1 Hirosawa, Wako, Saitama 351-0198, Japan
Abstract A readout electronics system for linear position sensitive 3He gas detectors has been developed. It is widely used for neutron scattering instruments at KEK Neutron Science Laboratory (KENS). The basic structure of the system is quite versatile, and can be used for various imaging-systems. Several versatile readout systems have been developed at KENS. As one of such examples, a 2-dimensional imaging-system for a wavelength shifting fiber based scintillation counter system has been developed. r 2004 Elsevier B.V. All rights reserved. PACS: 61.12. q; 61.12.Ex Keywords: 3He PSD; WLSF Detector
1. Introduction Modern neutron scattering instruments require detector systems that cover very large solid angle with a lot of pixels and time-of-flight (TOF) channels. At KEK Neutron Science Laboratory (KENS), more than 1000 of position sensitive 3He gas detectors (PSD)s, based on the Reuter–Stokesmade (size: 12 in. diameter and 60 cm effective length) are mainly used in the instruments which require large area coverage, such as high-resolution powder diffractometers and a small/wide*Corresponding author. Tel.: +81-298-64-5200-4517; fax: +81-298-64-1992. E-mail address:
[email protected] (S. Satoh). 1 Also Correspondence to.
angle diffractometer. The detector system is based on a modular design; 8 PSDs are accommodated in one module, and front-end electronics are built into it. The encoding module is based on a VME system, and the analogue waveforms are directly converted to digital signals by the front-end ADCs and all the other process are treated digitally using field programmable gate arrays (FPGA). Each module has histogram-memory on board [2]. The basic scheme of this readout electronics is quite versatile, and easily adaptable to other detector systems, which need 2D imaging with a TOF capability. In this paper, the readout system for the PSD modules, and the 2D-imaging system for WLSF-based scintillation counter that is a modified version of the original module are described [1,3].
0168-9002/$ - see front matter r 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.nima.2004.05.025
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S. Satoh et al. / Nuclear Instruments and Methods in Physics Research A 529 (2004) 421–424
2. 3He PSD readout system Fig. 1 shows a general view of a PSD module and a VME encoding system (PSD2 K), which is the encode-module for 8 PSDs. Fig. 2 shows the block diagram of the PSD2 K encode-module, which is a VME 2U 1-span module. It has 4-ADC daughter cards; each has 4-ADCs and a 50k-gate FPGA, which also takes care of time-stamp information. It also has a 150kgate FPGA on a motherboard, which handles the data from the ADCs, and makes histograms into the on-board 16 M-byte D-RAM. The analogue data from each end of the PSD (Q1, Q2) are directly converted to digital signals by the 12bit 20 MHz ADCs. Fig. 3 shows the ADC digital-form data obtained by them, and the method of peak detection is using the digital waveforms. It detects pre-peak plateau and a peak height in the FPGA-1. When a neutron event is detected by one of the ADCs, coincidence is
Fig. 1. PSD2 K Readout system and detectors.
Fig. 3. Digital peak detection method using ADC wave form analysis.
checked in 200 ns and timing signal is recorded. The main logic board has an Electrically Erasable Programmable Read-Only Memory (EEPROM) that has scaling and discriminator level information for all of the input signals. According to the scaling data in the EEPROM, the peak heights are then scaled and position is obtained by charge division method. All the data-processing are carried out digitally by the main FPGA (FPGA-2). The FPGA-2 polls the ADC daughter cards, and collects a neutron event within 500 ns. Therefore, the polling time in the worst case is 4 ms, which is just the same as the peak-detection dead time. There are two FIFO buffers, which can hold data for 16 events in the FPGA-2, before and after the encoding-calculation unit. The event data is consisting of the values for Q1 and Q2, captured time stamp, and PSD number. After position calculation, the FPGA-2 makes histogram based on the information of the detected position (8–6bit), the time (11–13bit) and the PSD number (3bit). The histogram-memory is a D-RAM of 16 MByte, and it has a capacity of total 22 bits addressing for 4 bytes data. A control-PC reads the histogram memory anytime through the VME bus. The data transfer-rate is up to 8 MB/s.
3. 2D-128 128 WLSF detector readout system
Fig. 2. Block diagram of the PSD2 K encode-module.
The encoding module system described in the previous section is quite versatile, and can be
ARTICLE IN PRESS S. Satoh et al. / Nuclear Instruments and Methods in Physics Research A 529 (2004) 421–424
applied to various systems. In this section, an imaging-system based on a 128-channel 128channel 2D-WLSF-detector readout system is described. The detector is based on a ZnS/6Li neutron-scintillator. By using 0.4 mm2 WLSFs, sensitive area of 51 51 mm2 is covered with the 0.4 mm resolution. Fig. 4 shows the detector system on the left and the whole readout electronics system on the right. The readout system consists of 17 VME modules; X-signals from 128 wires are detected by two of the 64 channel multi-anode photomultiplier tubes and peak-heights are analyzed by the ADCs by 8 modules. Another 8 modules are served for the Y-signals, and the last module, called a master module, interprets the signal and
Fig. 4. 128 128 WLSF detector and the readout system.
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Fig. 6. 2D data of the 128 128 detector.
determines the neutron event position and makes a 2D histogram with TOF information. Fig. 5 shows a timing chart of the readout system. When some of the X and Y signals exceed the lower-level discrimination (LLD), the ADC modules inform the event to the master module. The master module starts to gather the peak-information from the ADC modules, which are detected within 500 ns. The highest peaks for X and for Y directions determine the X–Y position. If more than 32 inputs exceed LLD, the event is discarded. Fig. 6 shows a 2D image data obtained by the detector system with a cadmium-mask that has a shape of a Chinese character.
4. Summary A readout electronics system for linear PSDs has been developed, which is a very stable system, and widely used for neutron scattering instruments at KENS. The basic structure of the system is quite versatile, and can be used for various imagingsystems. As one of such examples, the 2D imagingsystem for a WLSF based scintillation counter system has been developed, and sufficient results are obtained.
References Fig. 5. Timing chart of the 2D-128 128 WLSF Detector Readout system.
[1] S. Satoh, et al., Development of readout system for neutron scintillation detector, KEK Report 2003–8 (in Japanese).
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[2] S. Satoh, et al., Development of position sensitive detector, PSD2K system for Neutron scattering experiment, KEK Report 2001–9 (in Japanese).
[3] N. Sakamoto, et al., accepted in SAS2002 Proceedings, 2002, accepted for publication.