Device physics of capacitive MEMS

Microelectronic Engineering 84 (2007) 2158–2164 www.elsevier.com/locate/mee

Device physics of capacitive MEMS D. Felnhofer, K. Khazeni, M. Mignard, Y. J. Tung, J. R. Webster, C. Chui, E. P. Gusev * MEMS Research and Innovation Center (MRIC), QUALCOMM MEMS Technologies San Jose, California, USA

Abstract Using interferometric modulator (IMOD) MEMS-based technology as a typical example, we give an overview of key device concepts of capacitive micro-electro-mechanical systems (MEMS). We discuss basic electromechanical physics of the device, both in the ideal case of no charging in the dielectric and the more realistic scenario with charging. The dielectric stack is a critical element of capacitive MEMS. A significant part of the paper is dedicated to the role of the dielectric and electronic transport effects during device operation. The similarities and differences between dielectrics in MEMS and gate oxides in semiconductor MOS and MIM structures are highlighted. Several experimental techniques to study charge transport in the MEMS dielectric stack are reviewed following a discussion on how the dynamics of these electronic effects can be modeled. Finally, we comment on the importance of surface and interfaces on MEMS performance and reliability as well as fundamental studies of their properties. Keywords: MEMS; IMOD display technology; internal photoemission; charging

1. MEMS emerging technologies Micro-electro-mechanical systems (MEMS) and its younger “brother” nano-electro-mechanical systems (NEMS) are fast growing fields [1-6]. In fact, in many areas, it is now at a turning point from the initial phase of device concept research and prototyping to volume manufacturing. To large

Corresponding author. Tel.:+ 1 408 546 2096; fax: +1 408 546 1225. E-mail address:[email protected] (E. P. Gusev)

0167-9317/$ - see front matter Ó 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2007.04.118

extent this transition is due to better general understanding of MEMS devices, materials and processes [1,3,5,6], major advances in packaging methods [7], and, as a result, significantly improved reliability characteristics up to billions of operation cycles [8,9]. The growth is accelerated by a number of factors. First, there is a very strong demand for MEMS devices for a variety of industrial and consumer products, such as optical applications (displays, waveguides, splitters, micro-mirrors, shutters, projectors), telecommunications (RF MEMS,

D. Felnhofer et al. / Microelectronic Engineering 84 (2007) 2158–2164

switches, tunable capacitors, antennas, and filters), micro- and nano-electronics (electromechanical relays, NEMS transistors), and bio- and life sciences (sensors, micro fluidic channels, membranes, lab on chip devices, micropumps, micronozzles, etc.); let alone successful MEMS already in products (digital mirror device, DMD, for DLP applications, accelerometers for automotive, ink jet printer heads, silicon microphones). Second, MEMS offer significant advantages in multifunctional integration which, in turn, results in miniaturization and cost reduction. Since many surface micromachining technologies employ tools and processes, e.g., film deposition and patterning, common for IC fabrication, this naturally opens up a path to integrate MEMS/NEMS devices with highperformance electronics to enable new functionality and smaller dimensions (compared to bulky and expensive discrete components). Some signs of convergence of MEMS and traditional solid state electronics devices are already observed. As scaling of conventional silicon-based CMOS devices is running into the “More after Moore” uncertainty space [10,11], researchers are trying to apply MEMS ideas to extend the scaling benefits of silicon electronics, e.g., the recently proposed design of a nano-electromechanical field effect transistor (NEMFET) for low power electronics [12]. One should stress here that MEMS originated from the silicon electronics in the early days of the integrated circuits revolution four decades ago [13]. Since then, CMOS technologies have been developed to the unbelievable level of device dimension scaling down to 10 nm, integration complexity and precise process control. MEMS are currently poised to take advantage of this knowledge and infrastructure. Some examples of how the basic science of MEMS can benefit from existing CMOS knowledge will be discussed in this paper. Last, but not least, there is a growing scientific base for MEMS devices, materials and processes. The basic science of MEMS/NEMS is still immature and somewhat fragmented compared to more traditional fields. However, it does help to guide and advance novel technologies and approaches and creates a positive momentum for new innovations. In this paper, we use IMOD (interferometric modulator) MEMS technology [14-19] as an example

to illustrate basic physics of MEMS capacitive devices and their operational principles. We will discuss some techniques to characterize electronic behavior of the device and mention some areas where the MEMS field can benefit from existing learning and characterization approaches developed in the silicon based solid state electronics. 2. IMOD technology As mentioned above, MEMS find applications in various high-technology fields, one of them is for light modulation in optical devices. MEMS-based display technologies have been under development over a decade, initially for projection type displays [2]. For direct-view displays, the IMOD display technology is based on the principle of interference, which is used to determine the color of the reflected light. The IMOD pixels are capable of fast switching time on the order of tens of microseconds in ambient pressures. Additionally, displays fabricated using IMOD technology have shown reflectivities greater than 60 percent, contrast ratios greater than 15:1 and drive voltages as low as 5 volts. Though simple in structure, IMOD elements provide the functions of modulation and color selection without color filters and polarizers.

Fig. 1. Schematic picture of IMOD architecture.

The basic structure of an IMOD element is shown in Fig. 1. These elements are fabricated on a transparent (e.g., glass) substrate. It is a micro-device in lateral dimension and a nanometer device in the vertical dimension which defines its optical performance. The optically resonant MEMS cavity is fabricated by surface micromachining, i.e., after a sequence of thin film deposition and patterning steps. The sacrificial layer removal step is used to create an

2159

2160

D. Felnhofer et al. / Microelectronic Engineering 84 (2007) 2158–2164

air gap separating a stack of optical thin films from a movable reflective membrane. The air gap between a partial reflector (within the thin film stack) and the reflective membrane is chosen such that light reflecting within this optical gap exhibits constructive and destructive interference. The wavelength at which constructive interference occurs sets the color of the light reflected by the IMOD element. Altering the height of the air gap portion of the cavity leads to the reflection of different colors of light. In essence, IMOD “recycles” ambient light (rather than using a power inefficient backlit source) which ensures both very low-power consumption and excellent viewability under bright ambient (e.g., sunlight) illumination. The IMOD is a typical capacitive MEMS device with optical functionality which is used to modulate light for display applications. In the following sections, we will ignore the optical functionality part and will focus on basic electromechanical aspects and electronic effects. More details about IMOD optics, operation principles, fabrication techniques and current status of the technology can be found elsewhere [14-19]. 3. Electromechanical model of capacitive MEMS To the first order, the physics of most capacitive MEMS devices can be reduced to a simple model illustrated in Fig. 2. For the sake of simplicity, this schematic does not show a dielectric layer. In most cases, a layer of good quality dielectric material is deposited on the fixed electrode. This thin insulating layer plays an important role in device performance and reliability, as will be discussed below.

voltage called the actuation threshold, Va, the electrostatic field causes the membrane to collapse as shown in Fig. 2. Reducing the applied voltage below an additional threshold, Vr, releases the membrane, which travels back to the original position called the open state. The difference in threshold voltages for actuation Va and release Vr creates a condition known as hysteresis that together with the non-linear electro-optical response is exploitable for matrix addressing. The position of the membrane in the airgap is defined by the competition of two forces. The flexible reflective membrane can be envisioned as a simple linear spring (of spring constant k) from which a mirror of surface area A is suspended. Restoring elastic force of the membrane is a linear (to the 1st order) function of the displacement of (D-x) from the initial position of D, i.e. F1 = k (D-x). At the same time, electrostatic force is a non-linear function of the distance x from the bottom electrode and can be expresses as F2 = ½×H0AV2/(d[1/H-1]+x)2., where A is membrane (capacitor) area, V is the voltage applied between the membrane and the bottom electrode, and H is the effective dielectric constant of the insulator of thickness d. Solving force balance equations allows one to obtain values of the threshold voltages for MEMS actuation as well as the hysteresis window. For the release voltage Vr, one should also take into consideration surface adhesion forces when the membrane is in the collapsed position as well as residual air gap and the possible non-linearities in the spring constant. This topic will be briefly discussed in the last section.

Spring with constant k

Area, A Position at V=0 is D

x d

V Dielectric, H

Fig. 2. Simple electro-mechanical model of a capacitive MEMS device.

The application of a voltage between the moving membrane and thin-film dielectric stack creates an electrostatic field. When the field exceeds a given

Normalized Capacitance (C/Cmax)

1.0

0.8

0.6

0.4

0.0

Vr-

Va-

0.2

-10

-8

-6

-4

Va+

Vr+

-2

0

2

4

6

8

10

Applied Bias (V)

Fig. 3. Capacitance-voltage characteristics of an IMOD capacitive MEMS device.

D. Felnhofer et al. / Microelectronic Engineering 84 (2007) 2158–2164

A capacitive MEMS device is “bipolar”, i.e., it can be equally actuated by voltages of either positive or negative polarities. The positive and negative polarities of the hysteresis curves are quite symmetric as seen in Fig. 3. In fact, for an ideal dielectric layer between the electrodes, the offset of the polarities defined as Voffset = (Va++Va-)/2 equals to zero. However, the quest for the ideal dielectric has been proven to be challenging. It is well known that even the best CMOS quality thermally grown SiO2 films on Si show small (but not negligible) amounts of both fixed charge and transient charging effects [20]. Typical MEMS dielectrics like silicon oxide or silicon nitride are usually fabricated using CVD or PVD deposition techniques. One should therefore expect both pre-fabricated defects/charges and transient electronic effects in MEMS devices as well [9,21-24]. When charge is present in the MEMS dielectric stack, the hysteresis curve becomes asymmetric and the offset voltage shifts from zero voltage with the sign of the charge in the dielectric. By solving the electrostatic model with charge present in the dielectric, one can show that offset voltage shift, and Va threshold voltage shift is equal to Voffset = h×Q/(H0 H where Q is the density of charge in the dielectric layer and h is the distance between the location of charge centroid in the dielectric and the bottom fixed electrode on which the dielectric is grown. In other words, charging effects, either process prefabricated defects/fixed charge or transient electronic transfer during MEMS device operation, cause offset voltage and actuation voltage shifts. In terms of physics and consequences to the device, this phenomenon is analogous to well-known threshold voltage, Vt, instabilities in high-performance CMOS devices with trappy gate dielectrics, as often observed in high dielectric constant materials [2531]. The implication of this analogy is twofold: (i) one could then apply advanced CMOS characterization techniques and analytical methods to explore charging in capacitive MEMS systems (see next section), and (ii) one could expect that the stability and reliability of MEMS will improve over time by employing more advanced processing techniques and materials and processing under controlled environment. At the same time, there are

2161

some differences in the effect of charges between Si CMOS and MEMS devices. Opposite to CMOS gate dielectrics, the value of the offset shift is proportional to the distance between charge centroid and the bottom fixed interface whereas shift in the MOS structures is governed by the distance from the top gate electrode. The direction of the shift is also opposite to the CMOS case. In Si MOS capacitors, negative charge in the dielectric causes positive shift of Vt or Vfb (and vise versa) while in capacitive MEMS positive charge in the insulator moves the hysteresis loop in the positive direction and net negative charge in the negative direction. Finally, we note here that the thickness of dielectrics in MEMS is typically one order of magnitude thicker than gate dielectric thickness in CMOS, namely tens of nanometers vs. nanometers. 4. Characterization modeling

techniques,

results

and

In this section, we overview some of the techniques used to evaluate dielectric charging in capacitive MEMS, illustrating them with results and discuss data analysis and modeling aspects. As stressed above, these approaches are in principle similar to methodologies used to characterize charging in gate dielectrics in CMOS devices.

Fig. 4. Illustration of the “stress and sense” technique. In this particular case, the device is stressed under high voltage of ~14 V for increasing periods of time and optical measurements are taken between voltage pulses.

One technique, shown in Fig. 4, is analogous to the so-called “stress-and-sense” method. A MEMS

2162

D. Felnhofer et al. / Microelectronic Engineering 84 (2007) 2158–2164

device is operated under accelerated voltage conditions for a period of time and then the stress is interrupted to measure hysteresis curves. The measurements can be taken using C-V measurements (as shown in Fig. 3) or optical response of the device (in the case of optical MEMS). Both electrical and optical measurements are self-consistent and produce identical results. Trapped charge density can then be calculated from measured offset shift using the formula Voffset = h×Q/(H0 H and assuming a charge distribution in the dielectric (i.e., the parameter h). In many cases it is convenient to assume that charge is uniformly distributed throughout the dielectric, i.e., h = d/2. The necessity to make this assumption on charge distribution is clearly a drawback of the “stress and sense” technique which measures only one parameter, offset shift, to extract two unknown variables, charge density Q and charge centroid location, h. Some results obtained by the technique are shown in Fig. 5 and their interpretation and modeling will be discussed below.

charging) by UV photons with the energies larger than the barrier height of the dielectric. By measuring photocurrent for both negative and positive voltage polarities, one can obtain two shifts of photo-IV curves to deduce the two unknown parameters, Q and h, using simple formulas described in Refs. [32, 33]. Figure 7 is an illustration of how both charge density and charge centroid location can be deduced. One can see from this figure that as stress time increases, charge density increases and the centroid moves from the contact surface closer to the center of the dielectric film, implying that charge gets distributed more uniformly in the film over time.

Fig. 6. Band diagram of the dielectric structure and schematic illustration of the photo I-V technique for charge injection under both positive and negative polarity biases.

Fig. 5. Offset voltage shift of a capacitive MEMS device under accelerated voltage (~ 15 V) stress normalized to the maximum saturated value. Solid line is a fit using the stretch-exponential model. Dashed lines show attempts to fit the data using simple two-parameter model as described in the text.

This limitation can be overcome by using a photo I-V technique (Fig. 6) for a device with one of the electrodes semi-transparent to light in the UV range [20, 32, 33]. The method was also originally developed to examine charges in MOS devices. In this approach, charges are injected into the dielectric (biased at very low voltages to prevent electrostatic

Fig. 7. An example of the evolution of charge density and location (centroid) in the dielectric film as a function of injected charge as deduced from the photo IV technique.

D. Felnhofer et al. / Microelectronic Engineering 84 (2007) 2158–2164

Figure 5 shows typical dynamics of charging under accelerated stress conditions. One can see that offset shift due to charging is not a linear function of time. Our first attempt to interpret the data was to assume that there was only one type of charge trap in the dielectric layer. Solving rate equations under this assumption yields a known formula for the concentration of trapped charge (or offset voltage shift) as a function of time,

'Voffset

ª § t Vo «1  exp¨  © W ¬

·º ¸» ¹¼

where Vo is maximum (saturation) value of the shift and W is a time constant. It turns out that the fit of the data shown in Fig. 6 using this two-parameter model is poor. This implies that the assumption of a single type of trapped charge is probably oversimplified. This led us to the idea to fit the data using a more generalized model assuming a distribution of traps. This distribution can be in the energy space when different traps or defects have different energy levels and/or the traps can be distributed spatially in the dielectric layer. The evolution of trapped charge in this generalized model can be described by the stretch-exponential three parameter expression [30],

'Voffset

ª § § t « Vo 1  exp¨¨  ¨ « ¨ ¨© W © ¬

· ¸ ¸ ¹

Ec

·º ¸» ¸¸» ¹¼

The parameter of 0 < Ec < 1 is a measure of the “broadness” of the distribution of charge traps (for example, for a single trapped state Ec = 1). One can see from Fig. 5, that this distribution fits the data reasonably well. In the discussions above, we assumed that charging in capacitive MEMS is dominated by electrostatic effects, just like in MOS and MIM solid state devices. The voltage dependence of charging strongly suggests that this is the case. At the same time, one should keep in mind that, since MEMS have moving parts, so-called tribocharging may occur at contact surfaces under certain conditions as discussed in Refs. [34-36].

5. Surface and interface effects This last point is just one example that contact surfaces and interfaces are critical in MEMS devices. Another important example is as follows. When the moving MEMS membrane gets into contact with the fixed dielectric layer, short-order adhesion forces arise. These forces may influence the electromechanics of the MEMS device, e.g., alter voltage conditions Vr when the membrane releases. Under extreme conditions, it might even cause stiction events and other reliability issues. For the lack of space, we will not discuss this topic in length here and the readers can find more details in the existing literature [9, 37-40]. One should stress again that surfaces and interfaces are very important in MEMS. This offers an opportunity for the materials and surface and interface science community to contribute to the emerging field of MEMS with more advanced fundamental understanding of underlying effects and mechanisms which, in turn, will result in successful development of new MEMS concepts, devices and applications. 6. Conclusions In the paper, we reviewed the basic device and reliability concept of capacitive MEMS. The IMOD MEMS-based display technology being developed and commercialized by QUALCOMM is a typical example of this family of MEMS devices with movable electrode (mirror) and a dielectric stack deposited on the fixed electrode. In terms of device electrical characterization and the physics of the dielectric layer, there are many similarities between capacitive MEMS and solid state MOS and MIM devices used in modern semiconductor technologies. Analogous to Si CMOS, dielectrics play a critical role in MEMS performance and reliability. We have taken advantage of this fact and applied the knowledge accumulated in the field of semiconductor physics to capacitive MEMS. In particular, we demonstrated that “stress-and-sense” techniques and photo I-V measurements could be successfully employed to examine the evolution of charging phenomenon and related offset and actuation voltage instabilities. From the photo I-V measurements, it appears that charging starts from the contact oxide surface followed by electron transport into the bulk

2163

2164

D. Felnhofer et al. / Microelectronic Engineering 84 (2007) 2158–2164

of the dielectric over time, eventually resulting in the uniform distribution of the charge in the dielectric. To explain experimental results, we used several known phenomenological models of charging in MOS dielectrics. The best fit to the data was obtained with a model assuming a distribution of traps (either spatially, in the energy space, or both). Finally, we briefly discussed some surface and interface aspects of capacitive MEMS, an area in which basic knowledge is becoming increasingly important to improve long-term reliability and for future device fabrication. References [1] G. M. Rabeiz and J. B. Muldavin, IEEE Microwave magazine 12 (2001) 59. [2] P. F. van Kessel, L. J. Hornbeck, R. E. Meier, M. R. Douglass, Proc. IEEE 86 (1998) 1687. [3] J. J. Yao, J. Micromech. Microeng. 10 (2001) R9. [4] G. M. Rebeiz, RF MEMS: Theory, Design and Technology (Wiley, Hoboken, NJ, 2003). [5] K. L. Ekinci and M.L. Roukes, Review Sci. Instruments 76 (2005) 061101. [6] P. Gammel, G. Fischer, J. Bouchaud, Bell Labs Tech. Journal 10 (2005) 29. [7] R. N. Candler, W.-T. Park, H. Li, G. Yama, A. Partridge, M. Lutz, T. W. Kenny, IEEE Trans. Adv. Packaging 26 (2003) 227. [8] C. L. Goldsmith, J. Ehmke, A. Malczewski, B. Pillans, S. Eshelman, Z. Yao, J. Brank, M. Eberly, Int. Microwave Symp. Digest (2001) 227. [9] W. M. van Spengen, Microelect. Reliability 43 (2003) 1049. [10] H.-S. P. Wong, Solid State Electronics 49 (2005) 755. [11] H. S. P. Wong, Advanced Gate Stack, Source/Drain and Channel Engineering for Si-Bases CMOS: New Materials, Processes and Equipment, edited by E. P. Gusev, L. J. Chen, H. Iwai, M. C. Ozturk, D. L. Kwong, F. Roozeboom, and P. J. Timans (The Electrochemical Society, Pennington, 2005), p. 3. [12] H. Kam, D. T. Lee, R. T. Howe, T.-J. King, IEDM Tech. Dig. 2005. [13] H.C. Nathanson, W.E. Newell, R. A. Wickstrom, J. R. Davis, IEEE Trans. Electr. Dev. 14 (1967) 117. [14] M. W. Miles, E. Larson, C. Chui, M. Kothari, B. Gally, J. Batey, SID Symp. Dig. 33 (2002) 115. [15] B. J. Gally, SID Symp. Dig. 35 (2004) 654.

[16] P. D. Floyd, D. Heald, B. Arbuckle, A. Lewis, M. Kothari, B. Cummings, L. Palmateer, J. Boss, D. Chang, J. Chiang, D. Chu, L. M. Wang, E. Pao, F. Su, V. Huang, W. J. Lin, W. C. Tang, J. Yeh, C. C. Chan, F. Shu, Y. D. Ju, SID Symp. Tech. Dig. 2006. [17] M. W. Miles, A solid-state sensors, actuators and Microsystems workshop 2006. [18] J. B. Sampsell, Information Display 2006, 24. [19] A. Londergan, E. P. Gusev, C. Chui, Asia Displays 2007. [20] D. J. DiMaria, The Physics of SiO2 and Its Interface, edited by S. T. Pantelides (1979), 160. [21] J. Wibbeler, G. Pfeifer, M. Hietschold, Sensors & Actuators A71 (1998) 74. [22] W. M. van Spengen, R. Puers, R. Mertens, I. DeWolf, IEDM Tech. Dig. 2002, 901. [23] W. M. van Spengen, R. Puers, R. Mertens, I. De Wolf, J. Micromech. Microeng. 14 (2004) 514. [24] J. R. Webster, C. W. Dyck, C. D. Nordquist, J. A. Felix, M. R. Shaneyfelt, J. R. Schwank, J. C. Banks, IRPS 2005. [25] M. Houssa, A. Stesmans, M. Naili, M. M. Heyns, Appl. Phys. Lett. 77 (2000) 1381. [26] R. Ludeke, M. T. Cuberes, E. Cartier, Appl. Phys. Lett. 76 (2001) 2886. [27] A. Kerber, E. Cartier, R. Degrave, WDM 2002, 45. [28] S. Zafar, A. Callegari, E. P. Gusev, M. V. Fischetti, IEDM Tech. Dig. 2002. [29] E. P. Gusev, C. P. D'Emic, S. Zafar, A. Kumar, Microelectronic Engineering 72 (2004) 273. [30] S. Zafar, A. Callegari, E. P. Gusev, M. V. Fischetti, J. Appl. Phys. 93 (2003) 9298. [31] S. Zafar, A. Kumar, E. P. Gusev, E. Cartier, IEEE TDMR (2005) 5. [32] D. A. Buchanan, D. Felnhofer, in Defects in High-k Gate Dielectric Stacks, edited by E. P. Gusev (Springer, Dordrecht/Boston/London, 2006), p. 41. [33] D. Felnhofer, E. P. Gusev, D. A. Buchanan, to be published (2007). [34] J. W. Peterson, J. Appl. Phys. 25 (1954) 907. [35] R. G. Horn and D. T. Smith, Science 256 (1992) 362. [36] A. G. Bailey, J. Electrostatics 51-52 (2001) 82. [37] S. A. Henck, Tribology Letters 3 (1997) 239. [38] R. Maboudian and R. T. Howe, J. Vac. Sci. Technol. B 15 (1997) 1. [39] R. Maboudian and C. Carraro, Annu. Rev. Phys. Chem 55 (2004) 35. [40] F. W. Delrio, M. P. de Boer, J. A. Knapp, E. D. Reedy, P. J. Clews, M. L. Dunn, Nature Materials 4 (2005) 629.