Dielectrically isolated silicon with a sharp impurity gradient

Dielectrically isolated silicon with a sharp impurity gradient

A B S T R A C T S ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y 165 surface charge in silicon, have been shown to produce positive su...

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A B S T R A C T S ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y

165

surface charge in silicon, have been shown to produce positive surface charge when gold is diffused into the oxidized silicon. In addition it has been shown that the gold increases the acceptor concentration of silicon near the oxidized surface. Dielectrically isolated silicon with a sharp impurity gradient. V. Y. Doo and D. K. SETO, Electrochem. Technol. 5, No. 3-4, March-April (1967), p. 87. Sharp impurity gradient at the N - N + or P-P+ interface and low collector resistance are required for high-frequency transistors. N-N+ or P-P+ impurity profiles in the dielectrically isolated silicon produced by using methods known today suffer severe gradation because of the subsequent heating during the oxidation and polycrystalline silicon deposition. A new method, etch epitaxial refill (EER), which gives sharp impurity gradient and low collector resistance after isolation is described and the results of applying it are discussed.

Diborane for boron diffusion into silicon. M. C. DUFF£, D. W. FoY and W. J. ARMSTRONG,Electrochem. Technol. 5, No. 1-2, January-February (1967), p. 29. A method for boron diffusion into silicon using B~H 8 as the boron source is described. Surface concentration of 10t7 to 1031 cm-3 were obtained by varying the B2Hs concentration in the gas stream. The effects of various diffusion parameters (time, temperature, concentration of reactants in the gas stream and total gas flow rate) were investigated. Results include the effect of these parameters on surface concentration, borosilicate glass thickness, junction depth, and sheet resistance uniformity and reproducibility. Effects of ionizing radiation on o x i d i z e d silicon surfaces a n d p!~,nnr devices. E. H. SNOW, A. S. GROVEand D. J. FITZGERALD,Proc. I E E E 55, No. 7, July (1967), p. 1168. This paper examines in detail the effects of high and low energy electron, X-ray, and ultraviolet radiation on oxidized silicon surfaces and planar devices. Two permanent effects of ionizing radiation on oxidized silicon surfaces are distinguished: (1) the build-up of a positive space charge within the oxide, and (2) the creation of fast surface states at the oxide-silicon interface resulting in increased surface recombination velocity. The dependance of these effects on dose and dose rate, on bias applied during irradiation, and on structural parameters is discussed and a theory is presented which accounts for the observed features of the space-charge build-up. This theory involves trapping of holes which are generated within the oxide by the radiation. It is shown that all details of the experimental observations can be accounted for by assuming a high density of hole traps near the oxide-silicon interface which decays rapidly with distance into the oxide. Radiation-induced changes in the characteristics of MOS and junction fieldeffect transistors, p-n junction diodes and p--n-p and n-p-n transistors are reported and examined in terms of the above two effects. It is shown that the charge build-up causes shifts in the operating point of MOS transistors, catastrophic increases in the reverse current o f p - n junctions, and variations in their breakdown voltage. The increase in fast surface-state density is responsible for the lowering of the transconductance of MOS transistors and, in combination with the space-charge build-up, for the degradation of the current gain in bipolar transistors. It is shown that junction field-effect transistors are relatively insensitive to both effects of ionizing radiation and therefore offer the most promise for use in ionizing radiation environments. MOS transistors integrated circuits. J. BOR~L, J. LACOUR and M. VERVONNZ, Onde Elect., J.-AO (1967), p. 944. (In French.) After a short review of the advantages of MOS transistors in integrated circuits, two circuits realized at the integrated circuits laboratory of the Grenoble Nuclear Center are presented: - - A circuit containing eight MOS transistors which can be interconnected by thermo-compression in order to obtain: • a three inputs NOR gate, • a memory cell, • a stage of shift register. A six channels multiplexer with: • Ron < 60 ta for Vgs-- V~ = -- 10 V, • IDsF < 0-1 nA under 10 V reverse bias.