Direct parameter-extraction method for MOSFET noise model from microwave noise figure measurement

Solid-State Electronics 63 (2011) 42–48

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Direct parameter-extraction method for MOSFET noise model from microwave noise figure measurement Jianjun Gao ⇑ School of Information Science and Technology, East China Normal University, Shanghai 200062, PR China ASIC and System State Key Laboratory, Fudan University, Shanghai 200433, PR China

a r t i c l e

i n f o

Article history: Received 18 November 2010 Received in revised form 14 April 2011 Accepted 18 May 2011 Available online 16 June 2011 The review of this paper was arranged by Prof. S. Cristoloveanu Keywords: Equivalent circuits MOSFET Semiconductor device modeling Parameter extraction Noise model Small signal model Noise figure measurement

a b s t r a c t A new method for the determination of the four noise parameters of the metal oxide semiconductor field effect transistors (MOSFETs) based on the noise figure measurement system without microwave tuner is presented. The noise parameters are determined based on a set of analytical expressions of noise parameters by fitting the measured noise figure of the active device. These expressions are derived from an accurate small signal and noise equivalent circuit model, which takes into account the substrate parasitics, pad capacitances, and series inductances. On-wafer experimental verification is presented and a comparison with tuner based method is given. Good agreement is obtained between simulated and measured results for 0.5  5  16 lm, 0.35  5  16 lm and 0.18  5  16 lm (gate length  number of gate fingers  unit gate width) MOSFETs. Ó 2011 Elsevier Ltd. All rights reserved.

1. Introduction The submicrometer metal oxide semiconductor field effect transistors (MOSFETs) have shown excellent microwave and noise performance and are very attractive for radio frequency integrated circuit design (RFIC). The demand for higher levels of integration and higher operating frequencies has inspired the enormous advancements in CMOS technologies. As the channel length of a MOSFET is made smaller, the cutoff frequency increases significantly, enabling higher operating frequencies and lower noise performance. The complete characterization of these devices in terms of noise and scattering parameters is necessary for computer-aided design (CAD) of monolithic microwave integrated circuits (MMICs) or optoelectronic integrated circuits (OEICs) [1–5]. The full noise characterization of a MOSFET requires the determination of four noise parameters: minimum noise figure Fmin, noise resistance Rn, optimum source conductance Gopt and optimum source susceptance Bopt (or magnitude and phase of the optimum source reflection Copt). Most algorithms rely on the source–pull measurement technique to extract the noise parameters from a large set of parameters at a single frequency, e.g., by employing the correlation matrix method ⇑ Address: School of Information Science and Technology, East China Normal University, Shanghai 200062, PR China. E-mail address: [email protected] 0038-1101/$ - see front matter Ó 2011 Elsevier Ltd. All rights reserved. doi:10.1016/j.sse.2011.05.011

to de-embed the parasitics and to determine the intrinsic noise sources. A minimum of four independent measurements is required, however frequently more measurements are performed to achieve higher accuracy. Curve-fitting techniques are then used to determine the noise parameters. Although this method gives accurate results, it is time consuming and requires an expensive automatic broadband microwave tuner that involves complex calibration procedures. Based on the matched source reflection 50 X measurement system (F50) without automatic tuner, the semi-analytical methods have been used for determination of the four noise parameters for III–V compound semiconductor [6–8]. In this manuscript, which is a significant extension of our previous work in Gao et al. [7–9], a full analytical method to determine the four noise parameters of MOSFETs is proposed without any optimization. In comparison with previous publications [6–10], this method has the following advantages: (1) A set of new expressions for the four noise parameters of Silicon-based MOSFETs is derived from an accurate noise equivalent circuit model that based on Pospieszalski model [11] without any assumptions and approximations. The effects which become important at higher frequencies such as the substrate parasitics, the pad capacitances and series inductances are taken into account.

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J. Gao / Solid-State Electronics 63 (2011) 42–48

(2) Further simplified expressions for MOSFET noise parameters in the low frequency range are derived. (3) All four noise parameters can be determined directly from noise figure on wafer measurement at low frequency range based on the accurate analytical expressions of noise parameters. Such a method would be beneficial in acceptance testing and faster than full testing with a source tuner and more likely to be done with a test setup not requiring a tuner. However, an accurate small signal model parameters extraction is need. The organization of the paper is as follows: Sections 2 and 3 are dedicated to the derivation of analytical expressions for the corresponding noise parameters based on an accurate noise model. The proposed method for determination of the noise parameters is introduced in Section 4. A comparison between the new expressions and experimental data measured on MOSFETs with different gate-length is presented in Section 5. The conclusion is given in Section 6. 2. Small signal and noise equivalent circuit model From the circuit point of view, the MOSFET device can be treated as a black box of a noisy two port. As well known, the noise behavior of a linear noisy two-port network can be characterized by the four noise parameters, Fmin, Rn, Gopt and Bopt, with:

F ¼ F min þ

i Rn h ðGs  Gopt Þ2 þ ðBs  Bopt Þ2 Gs

ð1Þ

where F is the noise figure, Ys = Gs + jBs is the source admittance, and Yopt = Gopt + jBopt is the optimum source admittance. The PRC model (Van der Ziel [12], Pucel [13] and Cappy [14]) has emerged as one of the most accurate and convenient ways to obtain the noise model parameters for FETs in the microwave simulators, such as ADS and so on. Following these pioneering works, Pospieszalski [11] proposed an alternative high frequency noise model. The aim of this model consists in dissociating the noise on the gate from the noise on the drain. Both above mentioned models are well suited to the case of MOSFET devices because the high frequency noise mechanisms are similar. The complete MOSFET small signal and noise equivalent circuit model is shown in Fig. 1. Fig. 1a shows the intrinsic and Fig. 1b shows the extrinsic network, respectively. The circuit model comprises the wellknown small signal equivalent circuit, and eight noise sources

Fig. 1. MOSFET small signal and noise equivalent circuit model. (a) Intrinsic part (b) extrinsic part.

3. Derivation of noise parameters Based on the noise correlation matrix technique [15], the expressions of the four noise parameters can be carried out as follows: (1) Calculation of the admittance noise correlation matrix of MOSFET intrinsic part as follows:

 2  jxC gs    C INT ¼ 4kT D fR g gs  Y11 1 þ jxC gs Rgs   2 !   gm INT   C Y22 ¼ 4kDf T d g ds þ T g Rgs  1 þ jxC gs Rgs  C INT Y12 ¼ 4kT g Df

2

e2pg ; e2pd ;e2sub ; e2g ; e2d ; e2s ; e2gs and ids . The two uncorrelated current noise 2

source e2gs and ids represent the internal noise sources of the intrinsic MOSFET, these two noise sources are characterized by their mean quadratic value in a bandwidth Df centered on the frequency f, and can be given by the following expressions [11]:

e2gs ¼ 4kT g Rgs Df

ð2Þ

2 ids

ð3Þ

¼ 4kT d g ds Df

where Tg and Td are the equivalent noise temperature of the intrinsic resistance Rgs and output conductance gds, respectively. The six noise sources e2pg ; e2pd ; e2sub ; e2g ; e2d and e2s represent the noisy behavior of the access resistances Rpg, Rpd, Rsub, Rg, Rd and Rs, and are simply given by

e2i ¼ 4kT o Ri Df ði ¼ pg; pd; sub; g; d; sÞ

ð4Þ

where q is the electronic charge, k is Boltzmann’s constant, To is the ambient temperature, Ri is the resistance value.

g m xC gs Rg j1 þ jxC gs Rgs j2

ð5Þ

ð6Þ

ð7Þ

The corresponding noise parameters of the intrinsic network can be expressed as follows:

RINT ¼ n

2 2 T g Rgs T d g ds ð1 þ x2 C gs Rgs Þ þ 2 T o k1 T o k1 g m

  T g Rgs BINT opt ¼ x C gs þ C gd  C gs T o Rn GINT opt ¼ xC gs

pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi k1 k3 ðk2  k3 Þ k2

F INT min ¼ 1 þ 2k4 þ 2Gopt Rn with

k1 ¼ 1 þ k2 ¼

2x2 C gd ðs þ Rgs C gs Þ gm

T d g ds þ k3 T o gm

ð8Þ

ð9Þ

ð10Þ ð11Þ

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J. Gao / Solid-State Electronics 63 (2011) 42–48

k3 ¼ k4 ¼

T g g m Rgs T o ð1 þ x2 C 2gs R2gs Þ

x2 C gs ðg m s þ C gd Þk3 g 2m

It can be seen that the equivalent noise resistance Rn is requency independent approximately, Gopt and Bopt are proportional to angular frequency x. (2) Transformation of the admittance noise correlation matrix to the chain noise correlation matrix by easy addition of the extrinsic resistances Rg and Rs (dashed box I in Fig. 1b). This formulation is very suitable for the calculation of the four noise parameters. The noise parameters of the network I can be expressed as follows:

RIn ¼ RINT n þ Rg þ Rs

ð12Þ

INT RINT n Bopt

BIopt

¼

GIopt

sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi k5 g 2m ðRg þ Rs Þ RINT 2 ¼ ðGINT  nI opt Þ þ 2 Rn k2

ð13Þ

RIn

F Imin ¼ 1 þ 2k4 þ 2k5 ðRg þ Rs Þ þ 2GIopt RIn

x2 gm

where

6 C SA ¼ Rd 6 4

x2 ð1þRsub =Rd ÞC 2j 5 1þx2 R2sub C 2jd

7 7

BIIopt ¼ BIopt

ð17Þ

GIIopt ¼ GIopt

ð18Þ

 2 2 x ðRsub þ Rd ÞC 2jd g 2ds 1 þ þ R s gm g 2m 1 þ x2 R2sub C 2jd

F IImin ¼ F Imin þ 2GIopt Rd

g 2ds g 2m

1 þ x2 ðLg þ Ls Þ jY IIopt j2 þ 2xBIIopt ðLg þ Ls Þ BIIopt þ xðLg þ Ls ÞjY IIopt j2 1 þ x2 ðLg þ Ls Þ2 jY IIopt j2 þ 2xBIIopt ðLg þ Ls Þ

RIIn GIIopt

ð23Þ

ð24Þ

ð25Þ

GIII opt

BTopt ¼ BIII opt  xC pg RTn ¼ RIII n þ

GTopt

x2 Rpd C 2pd g 2m

vffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi u 2 2 u F III min x C pg Rpg 2  x2 C 2pg Rpg ¼ tðGIII opt Þ þ RIII n

2 III 2 F Tmin ¼ F III min þ x Rpg C pg Rn

Rn ¼ N þ Rs þ Rg

AI is the chain matrix of the network I, and the plus sign is used to denote the Hermitian conjugation. The noise parameters of the network II can be expressed as follows:

RIIn ¼ RIn þ Rd

GIIopt 2

ð26Þ

ð27Þ

ð28Þ

ð29Þ

For low frequencies, the influence of the extrinsic inductances and substrate high frequency effect can be neglected. By neglecting the small high order x – terms, expressions (26)–(29) simplify to:

3

x2 Rsub C 2jd þjxC jd 1þx2 R2sub C 2jd

GIII opt ¼

ð22Þ

(5) Addition of the pad network. Because of the substrate is resistive, the pad network for MOSFET is more complicated compare to III–V compound semiconductor devices. After adding the effect of the pad network, the noise parameters for whole device become:

ð16Þ

x2 Rsub C 2jd jxC jd 1þx2 R2sub C 2jd

ð21Þ

II F III min ¼ F min

ð15Þ

(3) Calculation of the chain noise correlation matrix of the network I and substrate parasitics network with Rd in cascade (see dashed box II in Fig. 1b). For the chain noise correlation matrix of two cascaded two ports we obtain:

1

1  jxðLg þ Ls Þ

In terms of the above mentioned transformation of the noise parameters along a lossless network, the reference plane can be moved easily to the input port, and Lg and Ls can be included:

RIII n ¼

Because of the parasitic resistances Rg and Rs only effect the constant terms, the relationship between the noise parameters and frequency remain invariant roughly.

2

1 Y IIopt

ð14Þ

½k2 ðC gs þ C gd Þ2  k3 C gs ðC gs þ 2C gd Þ

C IIA ¼ C IA þ AI C SA AþI

Y III opt ¼

BIII opt ¼

with

k5 ¼

substrate parasitics network with Rd have a weak influence on the noise parameters. (4) Addition of the series inductance network. Because Fmin is invariant with respect to lossless transformation at the input and output ports of a two port, RnGopt is also invariant with respect to lossless transformation [15], and Yopt can be calculated as

Bopt ¼ x

ð31Þ

Gopt

ð32Þ

F min ¼ 1 þ 2Gopt Rn

N¼

From (17)–(20), it can be found that Gopt and Bopt remain invariant, Rn and Fmin change a little bit, that means the

ð33Þ

With N is a constant:

ð19Þ

ð20Þ

  ðC gs þ C gd ÞN  C gs T g Rgs =T o þ C pg N þ Rs þ Rg sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi  ffi xC gs T d g ds T g Rgs ¼ Rs þ Rg þ g m ðN þ Rs þ Rg Þ To To

ð30Þ

T g Rgs T d g ds þ To T o g 2m

It is noticed that for the determination of the noise parameters in the low frequency range only the four resistances (Rg, Rs, Rgs and gds), three capacitances (Cpg, Cgs, and Cgd), and transcomductance gm are necessary. It also can be found that the equivalent noise resistance Rn is frequency

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J. Gao / Solid-State Electronics 63 (2011) 42–48

independent, optimum source conductance Gopt and optimum source susceptance Bopt are proportional to angular frequency x, optimum noise figure Fmin is a linear function of x. 4. Noise parameter extraction based on 50 X measurement system (F50) In the case of a 50 X generator impedance (as shown in Fig. 2), the noise figure can be rewritten as:

F 50

Rn ¼ 1 þ Rn G0 þ jY opt j2 G0

ð34Þ

where Ys = G0 = 20 mS. Since Rn is nearly frequency independent while |Yopt| varies proportional to x2, the plot of F50 versus x2 is linear and the value at x = 0 is (1 + RnG0). Thus Rn can be easily deduced from the F50 extrapolation for x = 0:

Rn ¼

¼0 ðF x 50  1Þ G0

ð35Þ

The slope of F50 versus x2 provides the magnitude of the optimum generator admittance |Yopt|.

jY opt j2 ¼

dF 50 x2 G0  dx2 Rn

Tg ¼

To T d g ds ðRn  Rs  Rg Þ  Rgs Rgs g 2m

Parameters

Values

Parameters

Values

Cpg (fF) Cpd (fF) Cpgd (fF) Rpg (X)

42 42 1.5 12

Lg (pH) Ld (pH) Ls (pH) Rpd (X)

35 35 3.5 12

Table 2 MOSFET small signal model parameters. Parameters

L = 0.5 lm

L = 0.35 lm

L = 0.18 lm

Rg (X) Rd (X) Rs (X) Rsub (X) Csub (fF) Cgs (fF) Cgd (fF) Cds (fF) gm (mS) s (pS) gds (mS) Ri (X)

2 5 1.5 300 30 370 47 20 34 2.0 0.85 3

1.5 5 1.5 300 40 265 44 24 42 1.2 1.5 3

2.0 7 0.8 300 50 125 41 30 57 0.4 3.12 2

ð36Þ

With (30)–(32) substituted in (36), we have:

 2 NC gd 50 C ½Go dF  R þ g 2m T o n pg Rn dx2   Td ¼ 2NC C gs C gs þ 2C pg þ Rngd g ds

Table 1 The pad parasitics.

ð37Þ

ð38Þ

In order to calculate the noise parameters using the previously mentioned expressions, an accurate extraction method of the small signal parameters is needed. To determine the small-signal

equivalent circuit (Fig. 1) elements from S-parameters measurements, the commonly used analytical based method using ‘‘cold FET’’ measurements [16] cannot be directly applied to MOSFET. The series access elements cannot be obtained under forward gate biasing conditions due to the insulation of the MOSFET gate junction. To overcome this draw-back, an improved extraction method has been developed [17], the main advantage of this method is that the extrinsic resistances, inductances, as well as substrate parasitics can be obtained using a set of exact closed equations based on cutoff mode S parameter on wafer measurements. Once the small signal and noise model parameters are obtained, the four unknown noise parameters can be determined. This method also can be considered as an initial guess of a subsequent optimization procedure leading to the final model parameters. 5. Experimental verification

Fig. 2. Noise figure measurement system.

In order to verify the equations derived in Section 4 for the four noise parameters, three different gate-length Silicon-based MOSFETs (0.5  5  16 lm, 0.35  5  16 lm and 0.18  5  16 lm) with same pad structure have been characterized. The S-parameter measurements for model extraction and verification were made up to 40 GHz using an Agilent 8510C network analyzer. DC bias was supplied by an Agilent 4156A. Microwave noise parameter measurements are carried out on wafer over the frequency range

Fig. 3. Layout of MOSFETs.

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J. Gao / Solid-State Electronics 63 (2011) 42–48

2–14 GHz using an ATN microwave noise measurement system NP5. The MOSFETs layout structure considered for our studies is shown in Fig. 3. It is noted that all the devices have the same pad profile. In this section, experimental results are presented, and a comparison of the modeled data with the measured one is given. 5.1. A determination of small signal model parameters The extracted values of the pad parasitics which including pad capacitances, substrate losses, and feedline inductances are

summarized in Table 1. The extrinsic resistances and substrate parasitics are determined from cutoff mode S parameter measurement. Once the values of the parasitic elements are known, all biasdependent elements can be easily calculated using de-embedding technique. Table 2 gives the intrinsic parameters with extrinsic resistances and substrate parasitics for 0.5  5  16 lm, 0.35  5  16 lm and 0.18  5  16 lm MOSFETs. It can be observed that intrinsic capacitances Cgs and Cgd, and time delay s decrease with the increase of gate length. On the other hand, the capacitances Cds and Csub, transconductance gm, and output conductance gds increase with the increase of gate length. It also can be found

Fig. 4. Comparison of modeled and measured S parameter for the MOSFET, Bias condition: (a) 0.5 lm (b) 0.35 lm (c) 0.18 lm.

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J. Gao / Solid-State Electronics 63 (2011) 42–48

3.2

Fmin (dB)

2.8 2.4

8

60

6

45

4

30

2

15

0

0

800

1600

2400

0

3200

3

15

9

10

6

5

3

mag ( Γopt)

12

measured

Tg ×10 (K)

20

0.45

modeled

1.00

240

0.75

180

0.50

120

0.25

60

0.00

2

3

0.30

0 15

12

(a)

Fig. 5. Evaluation of the noise figures F50 of MOSFETs (0.5 lm and 0.35 lm) versus the square of the frequency. Bias Condition: Vgs = 1.2 V, Vds = 2 V. The dot lines are the fitting curves.

0.15

9

Frequency (GHz)

ω2 (×1018 )

0 0.00

6

0

3

9

6

angle (Γ opt)

Noise Figure

L=0.35um

2.0

Td ×10 (K)

modeled

measured L=0.5um

R n (Ω)

3.6

0 15

12

Frequency (GHz)

(b)

0 0.60

Fig. 8. Comparison of noise parameters directly measured using commercial ATN system (o) determined with the new technique, (–) for the 0.35 lm MOSFET. Bias condition, Vgs = 1.2 V, Vds = 2 V.

Gate Length (um) Fig. 6. MOSFET noise model parameters versus gate length.

8

60

6

45

4

30

2

15 0

3

6

9

12

80

6

60

4

40

2

20

0 0

0 15

3

6

9

(a)

(a)

measured 240

0.75

180

0.50

120

0.25

60

0

3

6

9

12

0 15

Frequency (GHz)

(b) Fig. 7. Comparison of noise parameters directly measured using commercial ATN system (o) determined with the new technique, (–) for the 0.5 lm MOSFET. Bias condition, Vgs = 1.2 V, Vds = 2 V.

mag (Γopt)

1.00

angle (Γopt)

mag ( Γopt)

modeled

0.00

0 15

Frequency (GHz)

Frequency (GHz)

measured

12

modeled

1.00

240

0.75

180

0.50

120

0.25

60

0.00 0

3

6

9

12

angle (Γ opt)

0

Fmin (dB)

modeled

R n (Ω)

Fmin (dB)

measured

Rn (Ω)

modeled

measured 8

0 15

Frequency (GHz)

(b) Fig. 9. Comparison of noise parameters directly measured using commercial ATN system (o) determined with the new technique, (–) for the 0.18 lm MOSFET. Bias condition, Vgs = 1.2 V, Vds = 2 V.

4

80

3

60

2

40

1

20

0 0.00

0.15

0.30

0.45

R n (Ω)

J. Gao / Solid-State Electronics 63 (2011) 42–48

Fmin (dB)

48

0 0.60

Gate length (um)

1.00

100

0.75

75

0.50

50

0.25

25

0.00 0.0

0.2

0.3

0.5

6. Conclusion

angle (Γ opt)

mag (Γopt)

(a)

Fig. 10 shows the variation of the four noise parameters as a function of the gate length, the operating frequency being 4 GHz under the same bias conditions (Vgs = 1.2 V, Vds = 2 V). It can be observed that the optimum noise figure Fmin decrease with the decrease of the gate length, this variation is due to the increase of the cutoff frequency when the gate length decreases. The noise resistance Rn increase with the decrease of the gate length, and it is due to the variation of the factor ggds2 . The magnitude of the optimum m source reflection Copt increases with the decreases of the gate length, and the phase of the optimum source reflection Copt decreases with the decrease of the gate length, these variations are due to the decrease of the intrinsic capacitance Cgs with the decrease of the gate length.

0 0.6

Gate length (um)

(b) Fig. 10. Noise parameters at 4 GHz versus gate length.

that substrate loss Rsub and intrinsic resistance are almost independent of the gate length. Fig. 4a–c compare the measured and modeled S-parameters for the 0.5 lm, 0.35 lm, and 0.18 lm MOSFETs in the frequency range of 0.1–40 GHz under the bias condition (Vgs = 1.2 V, Vds = 2 V). An excellent agreement over the whole frequency range is obtained. The corresponding cutoff frequencies ft are 12 GHz, 20 GHz and 42 GHz respectively under the bias condition mentioned above. 5.2. Determination of noise model parameters After the small signal elements are determined, the noise model parameters can be obtained by using the proposed method. Fig. 5 shows the experimental evaluations of F50 versus the square of the frequency for two different MOSFETs of sizes (0.5 lm and 0.35 lm). It can be observed that the noise figure decrease with the decrease of the gate length. Fig. 6 shows the extracted noise model parameters as a function of the gate length. It can be found that the noise temperatures (Td and Tg) for different size device are almost independent of the gate length, and dependent on the gate width of course. 5.3. Determination of noise parameters The transistor noise parameters determined from F50 by using the proposed method are compared with the noise parameters measured with the commercial ATN system NP5 based on a broad-band tuner. In Figs. 7–9, we compare the measured and computed noise parameters versus frequency for the 0.5 lm, 0.35 lm, and 0.18 lm MOSFETs under the same bias conditions (Vgs = 1.2 V, Vds = 2 V). A good agreement between measured and modeled results can be indicated and the validity of the method is confirmed.

A new method for the determination of noise parameters of MOSFETs based on 50 X noise measurement system without microwave tuners has been proposed, and successfully applied to three devices with different size. Good agreement is obtained between simulated and measured results for 0.5  5  16 lm, 0.35  5  16 lm, and 0.18  5  16 lm MOSFET devices. The approach is very inexpensive and attractive because no impendence tuner system is needed. References [1] Enz C, Cheng Y. MOS transistor modeling for RF IC design. IEEE J Solid-State Circ 2000;35:186–201. [2] Manku T. Microwave CMOS—device physics and design. IEEE J Solid-State Circ 1999;34:277–85. [3] Pascht A, Grözing M, Wiegner D, Berroth M. Small-signal and temperature noise model for MOSFETs. IEEE Trans Microwave Theory Tech 2002;50:1927–34. [4] Chen CH, Deen MJ. High frequency noise of MOSFETs. I Modeling. Solid State Electron 1998;42(11):2069–81. [5] Han K, Gil J, Song S-S, Han J, Shin H, Kim C-K, et al. Complete high-frequency thermal noise modeling of short-channel MOSFETs and design of 5.2-GHz low noise amplifier. IEEE J Solid-State Circ 2005;40(3):726–35. [6] Rudolph M, Doerner R, Heymann Peter, Klapproth L, Boeck G. Direct extraction of FET noise models from noise figure measurements. IEEE Trans Microwave Theory Tech 2002;50:461–4. [7] Gao J, Law CL, Wang H, Aditya S, Boeck G. A new method for PHEMT noise parameter determination based on 50-X noise measurement system. IEEE Trans Microwave Theory Tech 2003;51(10):2079–89. [8] Gao J, Li X, Jia L, Wang H, Boeck G. Direct extraction of InP HBT noise parameters based on noise-figure measurement system. IEEE Trans Microwave Theory Tech 2005;53:330–5. [9] Gao J, Werthof A. Scalable small-signal and noise modeling for deepsubmicrometer MOSFETs. IEEE Trans Microwave Theory Tech 2009;57(4):737–44. [10] Asgaran S, Deen MJ, Chen C-H, Rezvani GA, Kamali Y, Kiyota Y. Analytical determination of MOSFET’s high-frequency noise parameters from NF50 measurements and its application in RFIC design. IEEE J Solid-State 2007;42(5):1034–43. [11] Pospieszalski MW. Modeling of noise parameters of MESFET’s and MODFET’s and their frequency and temperature dependence. IEEE Trans Microwave Theory Tech 1989;37:1340–50. [12] van der Ziel A. Gate noise in field effect transistors at moderately high frequencies. Proc IRE 1963;51:461–7. [13] Pucel RA, Haus HA. Signal and noise properties of gallium arsenide microwave field effect transistors. In: Advances in electronics and electron physics. vol. 38, New York: Academic; 1975. p. 195–265. [14] Cappy A. Noise modeling and measurements techniques. IEEE Trans Microwave Theory Tech 1988;36:1–10. [15] Hillbrand H, Russer P. An efficient method for computer-aided noise analysis of linear amplifier networks. IEEE Trans Circ Syst 1976;CAS-23(4):235–8. [16] Dambrine G, Cappy A, Heilodore F, Playez E. A new method for determining the FET small-signal equivalent circuit. IEEE Trans Microwave Theory Tech 1988;36(7):1151–9. [17] Gao J, Werthof A. Direct parameter extraction method for deep submicrometer MOSFET small signal equivalent circuit. IET Microwaves Antennas Propag 2009;20(4).