- Email: [email protected]
Efficient use of VME modules in TCABR
Fusion Engineering and Design 81 (2006) 1779–1783
Efficient use of VME modules in TCABR A.N. Fagundes a,∗ , B.B. Carvalho b , M. Correia b , J. Sousa b b
a Instituto de F´ısica, Universidade de S˜ ao Paulo, Cx Postal 66318, S˜ao Paulo 05315-970, SP, Brazil Associa¸ca˜ o EURATOM/IST, Centro de Fus˜ao Nuclear, Instituto Superior T´ecnico, Lisboa 1049-001, Portugal
Available online 3 May 2006
Abstract The fast development of electronics and computer associated devices relegated the VME (versa module eurocard) standard to a secondary place in data acquisition systems. Recent software written for the TCABR, medium size tokamak installed at the Physics Institute of University of S˜ao Paulo, show that VME standard is still useful, even in presence of relatively slow processors. We describe the improvements on the speed optimization of TCABR pulse data collection and system protection, and propose a solution for real-time plasma control. Our conclusion is that VME systems are well behaved, well known and may still have a long life ahead in control and data acquisition environments. © 2006 Elsevier B.V. All rights reserved. Keywords: TCABR; VME; Tokamak; Plasma; Fusion
1. Introduction TCAqs [1], the data acquisition system for the TCABR [2] tokamak, uses for bulk data acquisition and control several VME modules developed at the Portuguese EURATOM Association, installed on Motorola 40 MHz system controller based crates, running Microware’s OS-9 operating system. The newly developed software framework consists of device drivers written in C, supporting the creation of SCF (sequential character file manager) Device Modules, one of the constitutional characteristics of OS-9 device descriptors, customized for each module, and the appli∗ Corresponding author. Tel.: +55 11 3091 6908; fax: +55 11 3091 6749. E-mail address: [email protected] (A.N. Fagundes).
0920-3796/$ – see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.fusengdes.2006.04.031
cation program running in user mode to support the data acquisition and control.
2. Logical structure of TCAqs As described in Ref. [1], TCAqs is based upon a database, where all relevant information is kept. The shot cycle may described as follows: (1) preceding a shot, scripts test for the presence of VME crates; (2) the database is questioned and then data relative to each VME module is obtained; (3) information is carried to each crate, and directed to a specific module; (4) the system waits for the start; (5) the shot is initiated by a timer and light pulses are conveyed to each crate for action; (6) after the shot, the data is retrieved from ADC modules, identified, and kept in crate HDs; (7) finally,
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the data is read from crate HDs, made available for follow-up computers, and transferred to a permanent storage device. All TCAqs software has been developed locally. The processes run in two major operating systems: OS-9 [3] for the software relative to VME controllers and Linux for all remaining parts. MySQL [4] database engine is used.
3. Description of modules The TCAqs is a firewall-protected intranet comprising three VME stations for data acquisition and control (timing processes) and, presently, eight PC-like computers for follow-up processes. A computer cluster on the same network provides additional compute power for quick results. The Ethernet network operates at 100 Mbs, except for the VME stations, which are connected at 10 Mbs via fibre optics. The VME boards were developed at Centro de Fus˜ao Nuclear (CFN) and are of three kinds: ADC modules, triggering modules, and a DAC module. A local pulse fan-out and remote triggering module, in form of a euro-connector board was developed locally for synchronizing purposes. 3.1. 3 MSPS data acquisition module This module [5] has eight non-multiplexed differential input channels, with a dynamic range of ±2.5 V, 512 kWords of memory per channel, and maximum sampling rate for each acquisition block of 3 MSPS (mega samples per second). An earlier version of this module with 1.25 MSPS sampling rate is also used.
The architecture of this module groups the inputs in four blocks of two channels. Each block is configured by a set of software programmable parameters common to both channels: sampling rate, post-trigger delay, clock and trigger selection (internal or external), enable or disable possibility of external gate for acquisition validation, and selection of ascending or descending transition of the sampling clock for triggering purposes. Additionally some module global functions can be controlled, like, for instance, changing the ADC conversion frequency pre-scaler. A central control logic circuit implements a SLAVE interface to the VME host bus, and supports the “short addressing” D16 mode. Configuration of the acquisition is achieved by writing to some specific memory-mapped registers. Sampled data is fetched from the module to the system memory by the VME server. This is performed by reading sequentially from a single 16 bit port address which is unique for each block. The host must first select from which channel of the pair to read data. Fig. 1 shows the architecture of an acquisition block. Each couple of ADCs (LTC1412) drives three 4 Mbit static random access memory (SRAM) chips whose addresses and control inputs are managed by a MACH 210 [6] programmable logic device. This component also supports the synchronization with the timing circuit as well as all control signals for the ADC devices. 3.2. The VME timing unit The timing unit has 16 independent electrical singleended 50 or optical outputs. The module uses a field-programmable gate array (FPGA), programmed to route the trigger of each timer to be: (i) one of the
Fig. 1. Block diagram of one digitizer module input channel pair.
A.N. Fagundes et al. / Fusion Engineering and Design 81 (2006) 1779–1783
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Fig. 2. Block diagram of the VME timing board.
16 external inputs; (ii) one of 16 inboard softwarecontrolled ports; or (iii) the output of another channel. Fig. 2 shows the architecture of this module, which can be divided into three functional blocks: the clock generator and timer unit, the programmable multiplexer, and the VME and control logic. The delay and pulse width of the output signals and the trigger options of each channel are fully programmable by software. The architecture of this timing unit also permits to chain two or more channels, each one programmable for different times. This design allows complex chained time schedules between two extreme situations: (i) pulses with maximum time resolution (1 s) even for long duration (about 1 h); (ii) very long times width (+1200 h) with a 16 ms resolution. Delays between trigger pulses range from 1 s to a practically unlimited time of 5 × 107 s. The VME interface consists of three programmable array logic (PAL) circuits that provide access (mode A24:D16) to timers and other registers on the gatearray. The operations used are mainly write procedures on selected VME memory addresses which are allocated to this board. Base addresses can be selected to allow a maximum of 16 boards in the same VME system word. If necessary, a tertiary heading level may also be used.
3.3. Waveform generator This module [7] is a fully programmable arbitrary waveform generator, with 1 MSPS, 64 kWords memory, and eight independent channels. The main characteristics of each channel are: programmable update rate up to 1 MSPS; 12-bit resolution; 8 kWords of firstin-first-out (FIFO) memory; unipolar (0–5 and 0–10 V) or bipolar (±2.5, ±5 and ±10 V) output; 32 bit delay timer with temporal resolution of 1 s; external (via the VME P2 connector) and software trigger; four operation modes: single shot, repetitive, polling, and interrupt driven. The interrupt mode relies on the generation of an interrupt signal to the VME bus when the
Fig. 3. The VME waveform generator.
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Fig. 4. The TCABR new way to access modules.
FIFO DAC memory has delivered half of its data (halffull flag active). An interrupt service routine can load the free half-FIFO with new data allowing for an arbitrary waveform of unlimited duration to be generated. A programmable reconstruction filter can be optionally wired in the signal path. Fig. 3 presents an overall view of the hardware architecture. This module has a global control unit, which supervises the data flow between the host computer and each channel, as well as independent control systems for each output signal. 4. Ways of access and use In the new TCABR software framework a specific standard OS-9 device driver was developed for each module type. As shown in Fig. 4, this driver uses the system’s serial character file manager (SCF) and behaves like a file: a command is written to the device and the results and data are obtained by reading from it. Device drivers in conjunction with the OS-9 I/O system device descriptors keep a static device storage space for copies of the hardware internal registers and hardware address. When a “user mode” process opens this device the operating system (OS) grants exclusive access rights and blocks any unwanted data and register corrupting. Interrupt service routines are included in the device driver to handle hardware events. All application programs of the new drivers are in C-language. Upon system start-up the device drivers and customized device descriptors created for each module
are loaded, followed by hardware module testing and initialization. The operating system then recognizes the modules by a common name (e.g. adc3MSPS 01) which is stored on the MySQL database jointly with the remote subsystem where the hardware is attached. A set of higher level functions has been implemented in the device driver to control the hardware in a userfriendly and unified fashion. Interrupts generated by the waveform generator can be used to create a real-time closed loop control scheme: an “half-empty” flag condition can trigger a high priority OS-9 process, which in turn is able to compute new control waveforms as a result of newly acquired physical data (e.g. gas puffing adjusted from plasma density readings).
5. Conclusions The new way of operating VME modules has improved significantly the data acquisition and mainly the data retrieval in TCABR. Our conclusion is that VME systems are well behaved, well known and may still have a long life ahead in the TCABR control and data acquisition environment.
Acknowledgements This work has financial support from the Brazilian Conselho Nacional de Pesquisas, CNPQ, Fundac¸a˜ o de Amparo a` Pesquisa do Estado de S˜ao Paulo, FAPESP, and was partially carried out in the frame of the Con-
A.N. Fagundes et al. / Fusion Engineering and Design 81 (2006) 1779–1783
tract of Association between the European Atomic Energy Community, Instituto Superior T´ecnico (IST), and of the Contract of Associated Laboratory between Fundac¸a˜ o para a Ciˆencia e Tecnologia (FCT) and IST. The content of this publication is the sole responsibility of the authors and it does not necessarily represent the views of the Commission of the European Union, FCT or their services. References [1] A.N. Fagundes, W.P. S´a, P.M.S.A. Coelho, TCABR data acquisition system, Fusion Eng. Des. 48 (2000) 1. [2] R.M. Galv˜ao, V. Belintani, R.D. Bengtson, A.G. Elfimov, J.I. Elizondo, A.N. Fagundes, A.A. Ferreira, A.M.M. Fonseca, Y.K.
[3] [4] [5]
[6] [7]
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Kuznetsov, E.A. Lerche, I.C. Nascimento, L.F. Ruchko, W.P. S´a, E.A. Saettone, E. Sanada, J.H.F. Severo, R.P. Silva, V.S. Tsypin, O.C. Usuriaga, A. Vannuci, Alfv´en wave heating and runaway discharges maintained by the avalanche effect in TCABR, Plasma Phys. Control. Fusion 43 (2001) A299. http://www.microware.com. http://www.mysql.com. C. Correia, A. Combo, M. Correia, J.B. Sim˜oes, P. Coelho, B.B. Carvalho, J. Sousa, C.A.F. Varandas, Two fast VME transient recorder systems with 12 bits and multiple differential inputs, Rev. Sci. Instrum. 70 (1999) 1. Lattice Semiconductor (http://www.latticesemi.com/). A.J. Batista, A.P. Rodrigues, J.B. Sim˜oes, C. Correia, A. Malaquias, J. Sousa, C.A.F. Varandas, A fully programmable VME based, arbitrary waveform generator, with 1 MSPS, 64 kWords memory, 8 independent channels, Nucl. Instrum. Meth. Phys. Res. Sect. A 370 (1996) 484–489.
Efficient use of VME modules in TCABR A.N. Fagundes a,∗ , B.B. Carvalho b , M. Correia b , J. Sousa b b
a Instituto de F´ısica, Universidade de S˜ ao Paulo, Cx Postal 66318, S˜ao Paulo 05315-970, SP, Brazil Associa¸ca˜ o EURATOM/IST, Centro de Fus˜ao Nuclear, Instituto Superior T´ecnico, Lisboa 1049-001, Portugal
Available online 3 May 2006
Abstract The fast development of electronics and computer associated devices relegated the VME (versa module eurocard) standard to a secondary place in data acquisition systems. Recent software written for the TCABR, medium size tokamak installed at the Physics Institute of University of S˜ao Paulo, show that VME standard is still useful, even in presence of relatively slow processors. We describe the improvements on the speed optimization of TCABR pulse data collection and system protection, and propose a solution for real-time plasma control. Our conclusion is that VME systems are well behaved, well known and may still have a long life ahead in control and data acquisition environments. © 2006 Elsevier B.V. All rights reserved. Keywords: TCABR; VME; Tokamak; Plasma; Fusion
1. Introduction TCAqs [1], the data acquisition system for the TCABR [2] tokamak, uses for bulk data acquisition and control several VME modules developed at the Portuguese EURATOM Association, installed on Motorola 40 MHz system controller based crates, running Microware’s OS-9 operating system. The newly developed software framework consists of device drivers written in C, supporting the creation of SCF (sequential character file manager) Device Modules, one of the constitutional characteristics of OS-9 device descriptors, customized for each module, and the appli∗ Corresponding author. Tel.: +55 11 3091 6908; fax: +55 11 3091 6749. E-mail address: [email protected] (A.N. Fagundes).
0920-3796/$ – see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.fusengdes.2006.04.031
cation program running in user mode to support the data acquisition and control.
2. Logical structure of TCAqs As described in Ref. [1], TCAqs is based upon a database, where all relevant information is kept. The shot cycle may described as follows: (1) preceding a shot, scripts test for the presence of VME crates; (2) the database is questioned and then data relative to each VME module is obtained; (3) information is carried to each crate, and directed to a specific module; (4) the system waits for the start; (5) the shot is initiated by a timer and light pulses are conveyed to each crate for action; (6) after the shot, the data is retrieved from ADC modules, identified, and kept in crate HDs; (7) finally,
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the data is read from crate HDs, made available for follow-up computers, and transferred to a permanent storage device. All TCAqs software has been developed locally. The processes run in two major operating systems: OS-9 [3] for the software relative to VME controllers and Linux for all remaining parts. MySQL [4] database engine is used.
3. Description of modules The TCAqs is a firewall-protected intranet comprising three VME stations for data acquisition and control (timing processes) and, presently, eight PC-like computers for follow-up processes. A computer cluster on the same network provides additional compute power for quick results. The Ethernet network operates at 100 Mbs, except for the VME stations, which are connected at 10 Mbs via fibre optics. The VME boards were developed at Centro de Fus˜ao Nuclear (CFN) and are of three kinds: ADC modules, triggering modules, and a DAC module. A local pulse fan-out and remote triggering module, in form of a euro-connector board was developed locally for synchronizing purposes. 3.1. 3 MSPS data acquisition module This module [5] has eight non-multiplexed differential input channels, with a dynamic range of ±2.5 V, 512 kWords of memory per channel, and maximum sampling rate for each acquisition block of 3 MSPS (mega samples per second). An earlier version of this module with 1.25 MSPS sampling rate is also used.
The architecture of this module groups the inputs in four blocks of two channels. Each block is configured by a set of software programmable parameters common to both channels: sampling rate, post-trigger delay, clock and trigger selection (internal or external), enable or disable possibility of external gate for acquisition validation, and selection of ascending or descending transition of the sampling clock for triggering purposes. Additionally some module global functions can be controlled, like, for instance, changing the ADC conversion frequency pre-scaler. A central control logic circuit implements a SLAVE interface to the VME host bus, and supports the “short addressing” D16 mode. Configuration of the acquisition is achieved by writing to some specific memory-mapped registers. Sampled data is fetched from the module to the system memory by the VME server. This is performed by reading sequentially from a single 16 bit port address which is unique for each block. The host must first select from which channel of the pair to read data. Fig. 1 shows the architecture of an acquisition block. Each couple of ADCs (LTC1412) drives three 4 Mbit static random access memory (SRAM) chips whose addresses and control inputs are managed by a MACH 210 [6] programmable logic device. This component also supports the synchronization with the timing circuit as well as all control signals for the ADC devices. 3.2. The VME timing unit The timing unit has 16 independent electrical singleended 50 or optical outputs. The module uses a field-programmable gate array (FPGA), programmed to route the trigger of each timer to be: (i) one of the
Fig. 1. Block diagram of one digitizer module input channel pair.
A.N. Fagundes et al. / Fusion Engineering and Design 81 (2006) 1779–1783
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Fig. 2. Block diagram of the VME timing board.
16 external inputs; (ii) one of 16 inboard softwarecontrolled ports; or (iii) the output of another channel. Fig. 2 shows the architecture of this module, which can be divided into three functional blocks: the clock generator and timer unit, the programmable multiplexer, and the VME and control logic. The delay and pulse width of the output signals and the trigger options of each channel are fully programmable by software. The architecture of this timing unit also permits to chain two or more channels, each one programmable for different times. This design allows complex chained time schedules between two extreme situations: (i) pulses with maximum time resolution (1 s) even for long duration (about 1 h); (ii) very long times width (+1200 h) with a 16 ms resolution. Delays between trigger pulses range from 1 s to a practically unlimited time of 5 × 107 s. The VME interface consists of three programmable array logic (PAL) circuits that provide access (mode A24:D16) to timers and other registers on the gatearray. The operations used are mainly write procedures on selected VME memory addresses which are allocated to this board. Base addresses can be selected to allow a maximum of 16 boards in the same VME system word. If necessary, a tertiary heading level may also be used.
3.3. Waveform generator This module [7] is a fully programmable arbitrary waveform generator, with 1 MSPS, 64 kWords memory, and eight independent channels. The main characteristics of each channel are: programmable update rate up to 1 MSPS; 12-bit resolution; 8 kWords of firstin-first-out (FIFO) memory; unipolar (0–5 and 0–10 V) or bipolar (±2.5, ±5 and ±10 V) output; 32 bit delay timer with temporal resolution of 1 s; external (via the VME P2 connector) and software trigger; four operation modes: single shot, repetitive, polling, and interrupt driven. The interrupt mode relies on the generation of an interrupt signal to the VME bus when the
Fig. 3. The VME waveform generator.
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Fig. 4. The TCABR new way to access modules.
FIFO DAC memory has delivered half of its data (halffull flag active). An interrupt service routine can load the free half-FIFO with new data allowing for an arbitrary waveform of unlimited duration to be generated. A programmable reconstruction filter can be optionally wired in the signal path. Fig. 3 presents an overall view of the hardware architecture. This module has a global control unit, which supervises the data flow between the host computer and each channel, as well as independent control systems for each output signal. 4. Ways of access and use In the new TCABR software framework a specific standard OS-9 device driver was developed for each module type. As shown in Fig. 4, this driver uses the system’s serial character file manager (SCF) and behaves like a file: a command is written to the device and the results and data are obtained by reading from it. Device drivers in conjunction with the OS-9 I/O system device descriptors keep a static device storage space for copies of the hardware internal registers and hardware address. When a “user mode” process opens this device the operating system (OS) grants exclusive access rights and blocks any unwanted data and register corrupting. Interrupt service routines are included in the device driver to handle hardware events. All application programs of the new drivers are in C-language. Upon system start-up the device drivers and customized device descriptors created for each module
are loaded, followed by hardware module testing and initialization. The operating system then recognizes the modules by a common name (e.g. adc3MSPS 01) which is stored on the MySQL database jointly with the remote subsystem where the hardware is attached. A set of higher level functions has been implemented in the device driver to control the hardware in a userfriendly and unified fashion. Interrupts generated by the waveform generator can be used to create a real-time closed loop control scheme: an “half-empty” flag condition can trigger a high priority OS-9 process, which in turn is able to compute new control waveforms as a result of newly acquired physical data (e.g. gas puffing adjusted from plasma density readings).
5. Conclusions The new way of operating VME modules has improved significantly the data acquisition and mainly the data retrieval in TCABR. Our conclusion is that VME systems are well behaved, well known and may still have a long life ahead in the TCABR control and data acquisition environment.
Acknowledgements This work has financial support from the Brazilian Conselho Nacional de Pesquisas, CNPQ, Fundac¸a˜ o de Amparo a` Pesquisa do Estado de S˜ao Paulo, FAPESP, and was partially carried out in the frame of the Con-
A.N. Fagundes et al. / Fusion Engineering and Design 81 (2006) 1779–1783
tract of Association between the European Atomic Energy Community, Instituto Superior T´ecnico (IST), and of the Contract of Associated Laboratory between Fundac¸a˜ o para a Ciˆencia e Tecnologia (FCT) and IST. The content of this publication is the sole responsibility of the authors and it does not necessarily represent the views of the Commission of the European Union, FCT or their services. References [1] A.N. Fagundes, W.P. S´a, P.M.S.A. Coelho, TCABR data acquisition system, Fusion Eng. Des. 48 (2000) 1. [2] R.M. Galv˜ao, V. Belintani, R.D. Bengtson, A.G. Elfimov, J.I. Elizondo, A.N. Fagundes, A.A. Ferreira, A.M.M. Fonseca, Y.K.
[3] [4] [5]
[6] [7]
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Kuznetsov, E.A. Lerche, I.C. Nascimento, L.F. Ruchko, W.P. S´a, E.A. Saettone, E. Sanada, J.H.F. Severo, R.P. Silva, V.S. Tsypin, O.C. Usuriaga, A. Vannuci, Alfv´en wave heating and runaway discharges maintained by the avalanche effect in TCABR, Plasma Phys. Control. Fusion 43 (2001) A299. http://www.microware.com. http://www.mysql.com. C. Correia, A. Combo, M. Correia, J.B. Sim˜oes, P. Coelho, B.B. Carvalho, J. Sousa, C.A.F. Varandas, Two fast VME transient recorder systems with 12 bits and multiple differential inputs, Rev. Sci. Instrum. 70 (1999) 1. Lattice Semiconductor (http://www.latticesemi.com/). A.J. Batista, A.P. Rodrigues, J.B. Sim˜oes, C. Correia, A. Malaquias, J. Sousa, C.A.F. Varandas, A fully programmable VME based, arbitrary waveform generator, with 1 MSPS, 64 kWords memory, 8 independent channels, Nucl. Instrum. Meth. Phys. Res. Sect. A 370 (1996) 484–489.