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Electrical characterization of pentacene thin-film transistors with polymeric gate dielectric
Synthetic Metals 146 (2004) 355–358
Electrical characterization of pentacene thin-film transistors with polymeric gate dielectric J. Puigdollers∗ , C. Voz, I. Mart´ın, M. Vetter, A. Orpella, R. Alcubilla Departament d’Enginyeria Electr`onica, Universitat Polit`ecnica de Catalunya, c/Jordi Girona 1-3, M`odul C4, Barcelona 08034, Spain Available online 28 September 2004
Abstract Pentacene thin films obtained by thermal evaporation at room temperature have been incorporated as the active layer in bottom-gate thin-film transistors (TFTs). The dielectric was spin-cast polymethyl methacrylate (PMMA) baked at only 170 ◦ C. Crystalline silicon wafers and polyethylenenaphtalate (PEN) polymer foils were used as substrates. These devices were electrically characterised by measuring the output and transfer characteristics at different temperatures. Both the channel conductance and field-effect mobility evidenced similar thermal activation energies around 0.15 eV. These results could indicate that electrical transport is mainly controlled by trapping and thermal release of carriers from localised states. © 2004 Elsevier B.V. All rights reserved. Keywords: Thin-film Transistors (TFTs); Pentacene; PMMA dielectric
1. Introduction Over the last years, the use of organic semiconductors in field-effect transistors has been envisioned as a viable alternative to more traditional technologies based on inorganic materials. In particular, the use of conjugated p-type semiconductors has gained considerable interest due to their potential application in low cost integrated circuits. Pentacene has been used in the best performance thin-film transistors (TFTs) with organic semiconductor channel [1]. The field effect mobilities measured in these devices are similar to those achieved with the mature amorphous silicon technology. Furthermore, integrated circuits incorporating more than 1800 pentacene TFTs have been fabricated very recently [2]. Nowadays, organic TFTs are already competitive for applications requiring large-area coverage and low temperature processing compatible with flexible or weightless substrates. Nevertheless, the threshold voltage of such devices is often high, especially considering applications running on batteries. Although most research has been focused on the improvement and processability of pentacene layers, the gate dielectric could ∗
Corresponding author. Tel.: +34 93 4011002; fax: +34 93 4016756. E-mail address: [email protected] (J. Puigdollers).
0379-6779/$ – see front matter © 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.synthmet.2004.08.027
also have some influence on the threshold voltage of these devices [3]. In a previous work [4] our group reported the fabrication of pentacene TFTs using polymethyl methacrylate (PMMA) as a gate dielectric. The use of this polymer has allowed us to fabricate pentacene TFTs on both crystalline silicon and polyethylenenaphtalate (PEN) substrates. Our studies point to an improved self-ordering of pentacene molecules in films evaporated on PMMA compared to inorganic dielectrics as silicon oxide [5]. In this paper we try to obtain a higher insight in physical aspects of pentacene TFTs with PMMA gate dielectric. The thermal dependence of the electrical characteristics is measured and discussed in detail. 2. Experimental The pentacene TFTs were fabricated with an inverted staggered configuration, a schematic of which can be found elsewhere [5]. The bottom-gate electrode was a chromium layer thermally evaporated on both crystalline silicon and polyethylenenaphtalate substrates. Crystalline silicon was used because of its flatness for atomic force microscopy (AFM) measurements, whereas PEN was used to test flexible devices (Fig. 1).
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Fig. 1. Photograph of pentacene TFTs fabricated on PEN substrates. In the inset it is shown a top view of one of these devices. Gold electrodes and pentacene stripes deposited with the same shadow mask lie crosswise.
The PMMA was spun at 4000 rpm for 40 s to form an uniform dielectric coating around 700 nm thick. PMMA has a high resistivity (>2 × 1015 cm) and its dielectric constant (ε = 2.6 at 1 MHz, ε = 3.9 at 60 Hz) is similar to that of silicon dioxide. Besides, the mechanical stability and low baking temperature (<170 ◦ C) make PMMA a suitable dielectric for flexible field-effect devices. Afterwards, pentacene thin films were deposited by thermal evaporation in a high-vacuum system with a base pressure of 10−6 mbar. The pentacene source is available from Aldrich Chemical (98%) and further purification processes were not performed. The pentacene thin films were deposited at room temperature and high deposi˚ In order to define and isolate the detion rates over 10 A/s. vices, pentacene and gold electrodes were evaporated through a metallic mask. Actually, as it can be observed in the inset of Fig. 1, the device consists of the parallel connection of two pentacene TFTs. The dimensions of each one are a width and length of 300 and 120 m, respectively. The thickness of the pentacene layer is about 800 nm. The maximum process temperature is 170 ◦ C, that corresponds to the baking of PMMA. The electrical characterization of the fabricated devices was done by means of a HP4145B parameter analyzer and a MMR Technologies K-20 temperature controller.
Fig. 2. Atomic force microscope image of a pentacene layer deposited on PMMA-coated crystalline silicon. Grain dimensions in the range of a few hundred nanometers can be distinguished.
pentacene molecules prefer growing more vertically on the PMMA surface [5]. The same effect has been reported with the use of self-assembling monolayers (SAM) such as octadecyltrichlorosilane (OTS), one of the most considered SAM for pentacene growth [6]. Actually, PMMA has the same methyl ending groups (–CH3 ) than OTS. It has been proposed that an hydrophobic surface could promote the growth of highly ordered pentacene layers [7]. The electrical characteristics presented in this work correspond to pentacene TFTs fabricated on crystalline silicon. Devices with the same structure on PEN substrates exhibited similar electrical characteristics with slightly reduced performance. This could be attributed to the natural roughness of PEN substrates, as it has been observed by AFM measurements. Fig. 3 shows the output characteristic, i.e., the drain current (ID ) as a function of the drain-source voltage (VDS ) for
3. Results and discussion Previous structural characterization seems to indicate that, besides the deposition conditions, the growth process of pentacene films is also affected by the base layer. Fig. 2 shows the AFM image of a pentacene film deposited on PMMA-coated crystalline silicon. Organic grains, which reach average sizes of a few hundred nanometers can be observed. The topographic analysis reveals a granular microstructure with r.m.s. roughness around 70 nm. By contrast, pentacene films grown on silicon dioxide present much smaller grain dimensions [4]. Furthermore, X-ray diffraction measurements indicate that
Fig. 3. Output characteristic of a pentacene TFT fabricated on crystalline silicon. The gate-source voltage varied between 0 and 40 V with a fixed drain-source voltage of −40 V.
J. Puigdollers et al. / Synthetic Metals 146 (2004) 355–358
Fig. 4. Transfer characteristics measured at different temperatures ranging from 300 to 360 K. The inset shows the Arrhenius plot of the on-current, where an activation energy of 0.15 eV is obtained.
not encapsulated, we cannot neglect a reduction of the on/off ratio by the off-current increase. The inset of Fig. 4 shows the thermal activated behaviour of the on-current in an Arrhenius plot. The calculated activation energy of the channel conductance is around 0.15 eV. This value remains almost constant in the accumulation regime (VGS < −15 V). In our opinion, this activation energy could be due to trapping and thermal release mechanisms of holes in the accumulation channel. Actually, it is presumed a high density of states at the dielectric/polymer interface. This could explain the activated behaviour in the on state but the slight thermal dependence observed in the off region. In order to obtain further knowledge about the transport mechanisms, the saturation characteristic (VDS = VGS ) was measured at different temperatures. In this regime, ID can be approximated by the following equation: ID =
different applied gate-source voltages (VGS ). The absence of current-crowding at low VDS voltages indicates low resistance contacts with the source and drain gold electrodes. Satisfactory drain saturation currents up to 0.5 A could be obtained at moderate VGS voltages. The transfer characteristic, i.e., ID as a function of VGS at a fixed VDS , is shown in Fig. 4. This measurement was done in vacuum at different temperatures ranging from 300 to 360 K. The device exhibits typical p-type characteristics with moderate on/off ratios of 103 for VGS ranging from −30 to 30 V. In order to explain the nearly temperature independent off-current, we should consider that the contact between gold and pentacene does not form a potential barrier for holes [8]. In this situation, holes are allowed to move freely in either direction. Since pentacene material is a p-type semiconductor, the off-current flowing from drain to source would be described by the polymer conductivity (σ) and device geometry. Assuming the contacts are of a width W, the channel is of a length L, the polymer is of a thickness t and the applied voltage between electrodes is VDS , the off-current can be estimated by application of the Ohm’s law, W (1) tVDS L Considering the device dimensions and the dark condutivity, around 10−7 −1 cm−1 in as deposited pentacene layers [9], Eq. (1) estimates the off-current in the order of tens of picoampers. This result is in agreement with the measured off-current values observed in Fig. 4. The slight thermal dependence for positive VGS voltages also points to holes conduction in ptype pentacene to be responsible for the off-current. Application of negative VGS voltages accumulates holes near the dielectric/polymer interface. The off-current of the TFT will dominate until the channel current is sufficiently larger than the bulk current. Then, devices operate in the accumulation mode and start to switch on. It has been reported that oxidation of conjugated polymers can introduce high levels of p-type doping [8]. Therefore, since our devices are
357
W 1 µCd (VGS − VT )2 L 2
(2)
where W/L is the aspect ratio of the TFT, Cd the dielectric capacity per unit area, µ the field-effect mobility and VT the threshold voltage. The fit of the saturation characteristic at room temperature allows us to obtain a field-effect mobility value of 0.01 cm2 /V s and a threshold voltage around −14 V (Fig. 5). In devices on flexible PEN substrates the µ was significantly reduced about a factor 3, whereas VT was around −3 V. It is worth mentioning that these devices are normally off, which is an important advantage to be considered for low power consumption applications. By differentiating Eq. (2) the field-effect mobility as a function of VGS can be obtained. These curves measured at different temperature are shown in Fig. 6. It can be observed a steady increase in µ values for higher VGS voltages together with a thermally activated behaviour. The inset is an Arrhenius plot of the field-effect mobility calculated at VGS = −30 V. The value of 0.15 eV agrees with the activation energy of the channel conductance calculated previously in the
Ioff = σ
Fig. 5. Saturation characteristics of pentacene TFTs fabricated on crystalline silicon (circles) and PEN (squares) substrates. The field-effect mobility on PEN is significantly reduced.
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J. Puigdollers et al. / Synthetic Metals 146 (2004) 355–358
this result. Although great work for understanding charge transport in pentacene has been performed, a completed and well-developed microscopy description is still lacking. It is for this reason that the analysis of device characteristics measured at different temperature is still necessary.
Acknowledgements
Fig. 6. Field-effect mobility as a function of VGS measured at different temperatures ranging from 300 to 360 K. In the inset it is shown the Arrhenius plot of the field-effect mobility at VGS = −30 V. The fit indicates an activation energy of 0.15 eV.
This work was developed in the framework of CerMAE and the PICS2003-21 Program of the Generalitat de Catalunya. It has been also supported by the CICYT of the Spanish Government under programmes MAT2002-04263 and TIC2002-04184. One of the authors (M. Vetter) acknowledges the support of the Program Ramon y Cajal of the Spanish Ministery of Science and Technology.
References transfer characteristic (Fig. 4). These results suggest that the temperature variation of electrical characteristics is mainly attributed to a thermally activated field-effect mobility. It has been proposed that trapping at localised states near the carrier mobility edge could be responsible for this behaviour [10].
4. Conclusions Our results seem to indicate that the particular surface of PMMA could improve the ordering of pentacene molecules. Besides, the low baking temperature of this polymeric dielectric allows the use of inexpensive and flexible substrates. Field-effect mobilities up to 0.01 cm2 /V s and threshold voltages around −15 V have been obtained using crystalline silicon substrates. Leakage currents of a few tens of microamperes could be attributed to the bulk conductance of the pentacene layer. The temperature variations in the electrical characteristics seem to be due to a thermally activated field-effect mobility. Trapping and thermal release at states near the dielectric/polymer interface would explain
[1] M. Shtein, J. Mapel, J.B. Benziger, S.R. Forrest, Appl. Phys. Lett. 81 (2002) 268. [2] G.H. Gelinck, H. Edzer, A. Huitema, E.V. Veenendaal, E. Cantatore, L. Schrijnemakers, Jan B.P.H. Van Der Putten, Tom C.T. Geuns, M. Beenhakkers, J.B. Giesbers, B.-H. Huisman, E.J. Meijer, E.M. Benito, F.J. Touwslager, A.W. Marsman, Bas J.E. Van Rens, D.M. De Leeuw, Nat. Mater. 3 (2004) 106. [3] H. Klauk, M. Halik, U. Zschieschang, G. Schmid, W. Radlik, W. Weber, J. Appl. Phys. 92 (2002) 5259. [4] J. Puigdollers, C. Voz, A. Orpella, R. Quidant, I. Mart´ın, M. Vetter, R. Alcubilla, Organic Electronics 5 (1–3) (2004) 67. [5] J. Puigdollers, C. Voz, I. Martin, A. Orpella, M. Vetter, R. Alcubilla, J. Non-Cryst. Solids 338–340 (2004) 617. [6] D.J. Gundlach, Y.Y. Lin, T.N. Jackson, IEEE Electron Device Lett. 18 (1997) 87. [7] S.H. Jin, J.S. Yu, J.W. Kim, C.A. Lee, B.G. Park, J.D. Lee, J.H. Lee, Society for Information Display International Symposium (SID 2003), Baltimore, Maryland, USA. [8] G. Lloyd, B. Ecclestone, Mat. Res. Soc. Symp. Proc. 660 (2001) JJ5.12.1. [9] J. Puigdollers, C. Voz, A. Orpella, I. Martin, M. Vetter, R. Alcubilla, Thin Solid Films 427 (2003) 367. [10] D. Knipp, R.A. Street, A. V¨olkel, J. Ho, J. Appl. Phys. 93 (2003) 347.
Electrical characterization of pentacene thin-film transistors with polymeric gate dielectric J. Puigdollers∗ , C. Voz, I. Mart´ın, M. Vetter, A. Orpella, R. Alcubilla Departament d’Enginyeria Electr`onica, Universitat Polit`ecnica de Catalunya, c/Jordi Girona 1-3, M`odul C4, Barcelona 08034, Spain Available online 28 September 2004
Abstract Pentacene thin films obtained by thermal evaporation at room temperature have been incorporated as the active layer in bottom-gate thin-film transistors (TFTs). The dielectric was spin-cast polymethyl methacrylate (PMMA) baked at only 170 ◦ C. Crystalline silicon wafers and polyethylenenaphtalate (PEN) polymer foils were used as substrates. These devices were electrically characterised by measuring the output and transfer characteristics at different temperatures. Both the channel conductance and field-effect mobility evidenced similar thermal activation energies around 0.15 eV. These results could indicate that electrical transport is mainly controlled by trapping and thermal release of carriers from localised states. © 2004 Elsevier B.V. All rights reserved. Keywords: Thin-film Transistors (TFTs); Pentacene; PMMA dielectric
1. Introduction Over the last years, the use of organic semiconductors in field-effect transistors has been envisioned as a viable alternative to more traditional technologies based on inorganic materials. In particular, the use of conjugated p-type semiconductors has gained considerable interest due to their potential application in low cost integrated circuits. Pentacene has been used in the best performance thin-film transistors (TFTs) with organic semiconductor channel [1]. The field effect mobilities measured in these devices are similar to those achieved with the mature amorphous silicon technology. Furthermore, integrated circuits incorporating more than 1800 pentacene TFTs have been fabricated very recently [2]. Nowadays, organic TFTs are already competitive for applications requiring large-area coverage and low temperature processing compatible with flexible or weightless substrates. Nevertheless, the threshold voltage of such devices is often high, especially considering applications running on batteries. Although most research has been focused on the improvement and processability of pentacene layers, the gate dielectric could ∗
Corresponding author. Tel.: +34 93 4011002; fax: +34 93 4016756. E-mail address: [email protected] (J. Puigdollers).
0379-6779/$ – see front matter © 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.synthmet.2004.08.027
also have some influence on the threshold voltage of these devices [3]. In a previous work [4] our group reported the fabrication of pentacene TFTs using polymethyl methacrylate (PMMA) as a gate dielectric. The use of this polymer has allowed us to fabricate pentacene TFTs on both crystalline silicon and polyethylenenaphtalate (PEN) substrates. Our studies point to an improved self-ordering of pentacene molecules in films evaporated on PMMA compared to inorganic dielectrics as silicon oxide [5]. In this paper we try to obtain a higher insight in physical aspects of pentacene TFTs with PMMA gate dielectric. The thermal dependence of the electrical characteristics is measured and discussed in detail. 2. Experimental The pentacene TFTs were fabricated with an inverted staggered configuration, a schematic of which can be found elsewhere [5]. The bottom-gate electrode was a chromium layer thermally evaporated on both crystalline silicon and polyethylenenaphtalate substrates. Crystalline silicon was used because of its flatness for atomic force microscopy (AFM) measurements, whereas PEN was used to test flexible devices (Fig. 1).
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J. Puigdollers et al. / Synthetic Metals 146 (2004) 355–358
Fig. 1. Photograph of pentacene TFTs fabricated on PEN substrates. In the inset it is shown a top view of one of these devices. Gold electrodes and pentacene stripes deposited with the same shadow mask lie crosswise.
The PMMA was spun at 4000 rpm for 40 s to form an uniform dielectric coating around 700 nm thick. PMMA has a high resistivity (>2 × 1015 cm) and its dielectric constant (ε = 2.6 at 1 MHz, ε = 3.9 at 60 Hz) is similar to that of silicon dioxide. Besides, the mechanical stability and low baking temperature (<170 ◦ C) make PMMA a suitable dielectric for flexible field-effect devices. Afterwards, pentacene thin films were deposited by thermal evaporation in a high-vacuum system with a base pressure of 10−6 mbar. The pentacene source is available from Aldrich Chemical (98%) and further purification processes were not performed. The pentacene thin films were deposited at room temperature and high deposi˚ In order to define and isolate the detion rates over 10 A/s. vices, pentacene and gold electrodes were evaporated through a metallic mask. Actually, as it can be observed in the inset of Fig. 1, the device consists of the parallel connection of two pentacene TFTs. The dimensions of each one are a width and length of 300 and 120 m, respectively. The thickness of the pentacene layer is about 800 nm. The maximum process temperature is 170 ◦ C, that corresponds to the baking of PMMA. The electrical characterization of the fabricated devices was done by means of a HP4145B parameter analyzer and a MMR Technologies K-20 temperature controller.
Fig. 2. Atomic force microscope image of a pentacene layer deposited on PMMA-coated crystalline silicon. Grain dimensions in the range of a few hundred nanometers can be distinguished.
pentacene molecules prefer growing more vertically on the PMMA surface [5]. The same effect has been reported with the use of self-assembling monolayers (SAM) such as octadecyltrichlorosilane (OTS), one of the most considered SAM for pentacene growth [6]. Actually, PMMA has the same methyl ending groups (–CH3 ) than OTS. It has been proposed that an hydrophobic surface could promote the growth of highly ordered pentacene layers [7]. The electrical characteristics presented in this work correspond to pentacene TFTs fabricated on crystalline silicon. Devices with the same structure on PEN substrates exhibited similar electrical characteristics with slightly reduced performance. This could be attributed to the natural roughness of PEN substrates, as it has been observed by AFM measurements. Fig. 3 shows the output characteristic, i.e., the drain current (ID ) as a function of the drain-source voltage (VDS ) for
3. Results and discussion Previous structural characterization seems to indicate that, besides the deposition conditions, the growth process of pentacene films is also affected by the base layer. Fig. 2 shows the AFM image of a pentacene film deposited on PMMA-coated crystalline silicon. Organic grains, which reach average sizes of a few hundred nanometers can be observed. The topographic analysis reveals a granular microstructure with r.m.s. roughness around 70 nm. By contrast, pentacene films grown on silicon dioxide present much smaller grain dimensions [4]. Furthermore, X-ray diffraction measurements indicate that
Fig. 3. Output characteristic of a pentacene TFT fabricated on crystalline silicon. The gate-source voltage varied between 0 and 40 V with a fixed drain-source voltage of −40 V.
J. Puigdollers et al. / Synthetic Metals 146 (2004) 355–358
Fig. 4. Transfer characteristics measured at different temperatures ranging from 300 to 360 K. The inset shows the Arrhenius plot of the on-current, where an activation energy of 0.15 eV is obtained.
not encapsulated, we cannot neglect a reduction of the on/off ratio by the off-current increase. The inset of Fig. 4 shows the thermal activated behaviour of the on-current in an Arrhenius plot. The calculated activation energy of the channel conductance is around 0.15 eV. This value remains almost constant in the accumulation regime (VGS < −15 V). In our opinion, this activation energy could be due to trapping and thermal release mechanisms of holes in the accumulation channel. Actually, it is presumed a high density of states at the dielectric/polymer interface. This could explain the activated behaviour in the on state but the slight thermal dependence observed in the off region. In order to obtain further knowledge about the transport mechanisms, the saturation characteristic (VDS = VGS ) was measured at different temperatures. In this regime, ID can be approximated by the following equation: ID =
different applied gate-source voltages (VGS ). The absence of current-crowding at low VDS voltages indicates low resistance contacts with the source and drain gold electrodes. Satisfactory drain saturation currents up to 0.5 A could be obtained at moderate VGS voltages. The transfer characteristic, i.e., ID as a function of VGS at a fixed VDS , is shown in Fig. 4. This measurement was done in vacuum at different temperatures ranging from 300 to 360 K. The device exhibits typical p-type characteristics with moderate on/off ratios of 103 for VGS ranging from −30 to 30 V. In order to explain the nearly temperature independent off-current, we should consider that the contact between gold and pentacene does not form a potential barrier for holes [8]. In this situation, holes are allowed to move freely in either direction. Since pentacene material is a p-type semiconductor, the off-current flowing from drain to source would be described by the polymer conductivity (σ) and device geometry. Assuming the contacts are of a width W, the channel is of a length L, the polymer is of a thickness t and the applied voltage between electrodes is VDS , the off-current can be estimated by application of the Ohm’s law, W (1) tVDS L Considering the device dimensions and the dark condutivity, around 10−7 −1 cm−1 in as deposited pentacene layers [9], Eq. (1) estimates the off-current in the order of tens of picoampers. This result is in agreement with the measured off-current values observed in Fig. 4. The slight thermal dependence for positive VGS voltages also points to holes conduction in ptype pentacene to be responsible for the off-current. Application of negative VGS voltages accumulates holes near the dielectric/polymer interface. The off-current of the TFT will dominate until the channel current is sufficiently larger than the bulk current. Then, devices operate in the accumulation mode and start to switch on. It has been reported that oxidation of conjugated polymers can introduce high levels of p-type doping [8]. Therefore, since our devices are
357
W 1 µCd (VGS − VT )2 L 2
(2)
where W/L is the aspect ratio of the TFT, Cd the dielectric capacity per unit area, µ the field-effect mobility and VT the threshold voltage. The fit of the saturation characteristic at room temperature allows us to obtain a field-effect mobility value of 0.01 cm2 /V s and a threshold voltage around −14 V (Fig. 5). In devices on flexible PEN substrates the µ was significantly reduced about a factor 3, whereas VT was around −3 V. It is worth mentioning that these devices are normally off, which is an important advantage to be considered for low power consumption applications. By differentiating Eq. (2) the field-effect mobility as a function of VGS can be obtained. These curves measured at different temperature are shown in Fig. 6. It can be observed a steady increase in µ values for higher VGS voltages together with a thermally activated behaviour. The inset is an Arrhenius plot of the field-effect mobility calculated at VGS = −30 V. The value of 0.15 eV agrees with the activation energy of the channel conductance calculated previously in the
Ioff = σ
Fig. 5. Saturation characteristics of pentacene TFTs fabricated on crystalline silicon (circles) and PEN (squares) substrates. The field-effect mobility on PEN is significantly reduced.
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J. Puigdollers et al. / Synthetic Metals 146 (2004) 355–358
this result. Although great work for understanding charge transport in pentacene has been performed, a completed and well-developed microscopy description is still lacking. It is for this reason that the analysis of device characteristics measured at different temperature is still necessary.
Acknowledgements
Fig. 6. Field-effect mobility as a function of VGS measured at different temperatures ranging from 300 to 360 K. In the inset it is shown the Arrhenius plot of the field-effect mobility at VGS = −30 V. The fit indicates an activation energy of 0.15 eV.
This work was developed in the framework of CerMAE and the PICS2003-21 Program of the Generalitat de Catalunya. It has been also supported by the CICYT of the Spanish Government under programmes MAT2002-04263 and TIC2002-04184. One of the authors (M. Vetter) acknowledges the support of the Program Ramon y Cajal of the Spanish Ministery of Science and Technology.
References transfer characteristic (Fig. 4). These results suggest that the temperature variation of electrical characteristics is mainly attributed to a thermally activated field-effect mobility. It has been proposed that trapping at localised states near the carrier mobility edge could be responsible for this behaviour [10].
4. Conclusions Our results seem to indicate that the particular surface of PMMA could improve the ordering of pentacene molecules. Besides, the low baking temperature of this polymeric dielectric allows the use of inexpensive and flexible substrates. Field-effect mobilities up to 0.01 cm2 /V s and threshold voltages around −15 V have been obtained using crystalline silicon substrates. Leakage currents of a few tens of microamperes could be attributed to the bulk conductance of the pentacene layer. The temperature variations in the electrical characteristics seem to be due to a thermally activated field-effect mobility. Trapping and thermal release at states near the dielectric/polymer interface would explain
[1] M. Shtein, J. Mapel, J.B. Benziger, S.R. Forrest, Appl. Phys. Lett. 81 (2002) 268. [2] G.H. Gelinck, H. Edzer, A. Huitema, E.V. Veenendaal, E. Cantatore, L. Schrijnemakers, Jan B.P.H. Van Der Putten, Tom C.T. Geuns, M. Beenhakkers, J.B. Giesbers, B.-H. Huisman, E.J. Meijer, E.M. Benito, F.J. Touwslager, A.W. Marsman, Bas J.E. Van Rens, D.M. De Leeuw, Nat. Mater. 3 (2004) 106. [3] H. Klauk, M. Halik, U. Zschieschang, G. Schmid, W. Radlik, W. Weber, J. Appl. Phys. 92 (2002) 5259. [4] J. Puigdollers, C. Voz, A. Orpella, R. Quidant, I. Mart´ın, M. Vetter, R. Alcubilla, Organic Electronics 5 (1–3) (2004) 67. [5] J. Puigdollers, C. Voz, I. Martin, A. Orpella, M. Vetter, R. Alcubilla, J. Non-Cryst. Solids 338–340 (2004) 617. [6] D.J. Gundlach, Y.Y. Lin, T.N. Jackson, IEEE Electron Device Lett. 18 (1997) 87. [7] S.H. Jin, J.S. Yu, J.W. Kim, C.A. Lee, B.G. Park, J.D. Lee, J.H. Lee, Society for Information Display International Symposium (SID 2003), Baltimore, Maryland, USA. [8] G. Lloyd, B. Ecclestone, Mat. Res. Soc. Symp. Proc. 660 (2001) JJ5.12.1. [9] J. Puigdollers, C. Voz, A. Orpella, I. Martin, M. Vetter, R. Alcubilla, Thin Solid Films 427 (2003) 367. [10] D. Knipp, R.A. Street, A. V¨olkel, J. Ho, J. Appl. Phys. 93 (2003) 347.