Energy-band barrier to improve open-circuit voltage of CdTe solar cells

Energy-band barrier to improve open-circuit voltage of CdTe solar cells

Solar Energy Materials & Solar Cells 120 (2014) 647–653 Contents lists available at ScienceDirect Solar Energy Materials & Solar Cells journal homep...

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Solar Energy Materials & Solar Cells 120 (2014) 647–653

Contents lists available at ScienceDirect

Solar Energy Materials & Solar Cells journal homepage: www.elsevier.com/locate/solmat

Energy-band barrier to improve open-circuit voltage of CdTe solar cells Kuo-Jui Hsiao n Institute of Electro-Optical Science and Technology, National Taiwan Normal University, Taipei 11677, Taiwan

art ic l e i nf o

a b s t r a c t

Article history: Received 17 April 2013 Received in revised form 22 June 2013 Accepted 19 October 2013 Available online 7 November 2013

Incorporation of a conduction-band barrier around the interface between absorber layer and metal contact is a proposed strategy to improve Voc for CdTe solar cells by reducing electron contact with the back surface. The conduction-band barrier is referred to as an electron reflector (ER) in this work, which can be formed by a back layer with an expanded bandgap, a reversed back barrier, or a heavily doped back surface. Experimentally, this strategy has applied to Cu(In,Ga)Se2 and Silicon-based solar cells successfully. These approaches to electron reflectors in CdTe solar cells are investigated with numerical simulations. The expanded bandgap is shown to be the more efficient and practical way to create a CdTe electron reflector. Moreover, there is no additional improvement from the combination of any two mechanisms. For optimal improvement with an electron reflector, reasonable lifetime (1 ns or above) and full depletion are required. Without full depletion, bulk recombination limits the improvement. Theoretically, a 200-mV increase in voltage and 3% in efficiency are achievable for a 2-micron CdTe cell with 1013-cm  3 hole density, 1-ns lifetime, and a 0.2-eV electron reflector barrier. For thinner cells, the electron reflector should give a similar increase in the performance. A good-quality interface between the p-type CdTe layer and the electron-reflector layer is required, or the loss caused by the back-surface recombination is simply shifted to the interfacial recombination. Alloy CdXTe, where X can be Zn, Mg, or Mn, should be a good material for the electron-reflector barrier since the valence-band offset at CdTe/ CdXTe interface is negligible for a 0.2-eV ER and the band expansion is almost exclusively in the conduction band. Preliminary experimental evidence of electron reflector was also discussed. & 2013 Elsevier B.V. All rights reserved.

Keywords: CdTe solar cells 1-D numerical simulation Conduction-band offset Device modeling

1. Introduction Energy consumption has increased steadily with civilization development. To sustain human development, more electricity consumption is expected in future decades. To avoid negative irreversible impacts due to the energy from traditional energy sources such as fossil fuels or nuclear plants, Environmentallybenign renewable energy is needed. Solar energy is one of the most competitive renewable energy resources. To make the price of solar energy competitive with traditional energy sources, low-cost PV systems are required. There are two approaches to this goal: either higher efficiency or lower cost. The CdTe thin‐film solar cell is one of the most promising photovoltaic devices from the standpoint of both cost and efficiency. Typically, it has a metal/CdTe/CdS/TCO/glass superstrate configuration, which means sunlight from the glass side. The bandgap of CdTe, around 1.5 eV, is near optimal for achieving high efficiency with the AM1.5 solar spectrum [1]. Good temperature coefficient due to the large bandgap of CdTe results in more annual energy yield than other PV technologies [2]. In addition, CdTe's large optical absorption coefficient (4105 /cm at 600 nm) allows a

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small amount of CdTe (2–8 μm thick) for the absorber layer [3] (100 times thinner than typical crystalline-Si solar cells). CdTe solar cells can be fabricated with a variety of deposition techniques, because the electronic properties and the structure are generally optimized by post‐deposition treatments. Economic fabrication processes have led to large-scale manufacturing [4–6]. Today, 18.7% record efficiency for the CdTe cell, 16.1% for the CdTe module [7], and manufacturing cost at 68 cents per watt for CdTe modules have been reached by First Solar Inc. [8]. This milestone has demonstrated the potential of CdTe solar cells. However, the record efficiency for a CdTe solar cell is much less than its theoretical maximum efficiency ( 29%). To further enhance the photovoltaic performance, other strategies are needed. Photo-current losses of solar cells already can be well quantified and qualified [9]. In this article, strategies to improve solar-cell voltage will be focused. In 2006, two strategies to increase the voltage of CdTe solar cells were proposed and briefly evaluated [10]. One strategy was to increase the CdTe carrier density and lifetime to values more comparable to single‐crystal cells. The other was to add an electron reflector (ER) at the back contact of a fully depleted CdTe cell. The electron‐ reflector strategy is probably more practical for voltage improvement, because it does not require a major improvement in the quality of thin‐film CdTe. For many solar cells, there are many allowed states within the forbidden gap at the back surface, and recombination can occur

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2. Method

Fig. 1. Calculated band diagram of a fully depleted baseline CdTe cell (a) without bias, where the built-in field can drive electrons in the conduction band across the cell away from the back surface, and (b) with bias as well as an electron reflector, where the recombination resulting from the forward electron flow to the back surface will be reduced by electron reflector.

efficiently through these states. When the minority-carrier diffusion length is longer than the cell thickness, back-surface recombination may become the primary limitation on cell performance. Fig. 1 shows the band diagrams of a fully depleted baseline CdTe solar cell (a) at zero bias and (b) at Vbias ¼V with an electronreflector layer. Carriers can be collected efficiently with the assistance of the built-in field in the depletion region where the bands are not flat. In a fully depleted cell as shown in Fig. 1(a), the built-in field can drive electrons in the conduction band across the cell away from the back surface. At forward bias, the field is reduced, and it can be reduced too much to drive carriers (see Fig. 1(b)). Then more minority-carrier electrons can flow to the back surface. If there is a conduction-band barrier at the back surface, it can keep electrons away from the back surface (see Fig. 1(b)). Therefore, the recombination resulting from the forward electron flow to the back surface will be reduced, especially at forward bias. If the cell thickness is reduced, the bulk recombination which occurs is proportionally reduced, and if the cell thickness is reduced to be comparable to the diffusion length, the back-surface recombination dominates and lowers the opencircuit voltage. Under this condition, ER is particularly useful to reduce the back-surface recombination, and allow higher opencircuit voltage. Hence, ER should allow thinner absorber layer with acceptable performance. There are two mechanisms to create an electron reflector. One is an expanded bandgap, and the other is the band bending. When an electron-reflector layer with an expanded bandgap is joined to the CdTe absorber layer, an electron reflector is created. In the band bending mechanism, there are two possibilities, reversed back barrier and heavily doped back surface. Due to the alignment of Fermi level, either of these two possibilities can create a conduction-band barrier at the back surface. All three possibilities for a reflector strategy for CdTe solar cells are investigated in this work.

This work focuses on how the band structure affects the device performance. Therefore, one-dimensional numerical simulation is sufficient for this investigation work. The simulation program AFORS-HET [11,12] v2.4.1 is used to calculate numerical simulations. The operation of semiconductor devices can be described by a set of basic equations, including Poisson's equation, continuity equations, and other physical models. AFORS-HET can solve these coupled equations with proper boundary conditions for the band diagram and current density versus voltage (J–V) curves. This simulation work was done with a five-layer CdTe device model: SnO2, CdS, bulk CdTe layer, electron reflector layer, and metal back contact. Fig. 2 shows the band diagram of the model. A baseline parameter setting [13] with minor adjustment was assigned to this model. The values used have been either determined by independent measurements or are reasonable estimates. In this model, the absorber layer, including the bulk CdTe layer and the electron-reflector layer, is fixed at 2 μm. With the baseline carrier concentration p ¼1013 cm  3, the cell is fully depleted for all forward biases below Voc, which is important, because it means there will be an electric field throughout the CdTe. Typically, CdTe cells have short diffusion length (few micrometers at a typical 1-ns lifetime). The diffusion length Le can be calculated by Le ¼ (Deτe)1/2, where De is the diffusion constant, which is related to carrier mobility by Einstein relation. The built-in electric field in the depletion region, often referred to as the drift field, can be used to increase the carrier collection, and thus to reduce the bulk recombination. It should be particularly beneficial for CdTe thicknesses below 2 μm when the CdTe is fully depleted at a typical carrier density. Back barrier height of the solar cell can be calculated by absorber bandgap þ electron affinity—work function of the metal contact (see Fig. 3), and Fermi energy EF of p-CdTe can be determined by EF  Ev ¼kTLn(Nv/p), where Ev is valence-band maximum, Nv the effective density of states at the valence-band edge. EF  Ev ¼ 0.374 V can be calculated with T ¼300 K, Nv ¼1.8  1019 cm  3 and p¼ 1013 cm  3, which means a 0.374-eV back barrier corresponds to a flat band. Therefore, a 0.3-eV back barrier used in this model forms an ohmic contact. The surface recombination velocity S is given by S¼Nssvt, where Ns is the defect density at the surface, s capture cross section, and vt thermal velocity. With Ns ¼109 cm  2, s ¼10  9 cm2, and vt ¼ 107 cm/s, S equals 107 cm/s, which is the order of the thermal velocity at room temperature. Physically, this means that nearly all electrons will recombine at the back surface at room temperature. Minority carrier lifetime τ is given by τ ¼ 1/(svtNDG), where NDG is the donorlike defect density. The lifetime for the baseline setting is 1 ns,

Fig. 2. A 1-dimensional five-layer CdTe cell model is utilized: SnO2, CdS, bulk CdTe layer, electron reflector layer, and metal back contact. In this model, the absorber layer, including the bulk CdTe layer and the electron-reflector layer, is fixed at 2 μm. With the baseline carrier concentration p ¼ 1013 cm  3, the cell is fully depleted for all forward biases below Voc.

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semiconductor to be adjusted over a range of 1.04–1.67 eV. Specifically, this electron reflector is in the form of conductionband grading formed during the absorber formation process, and its impact is primarily on open-circuit voltage [15].

Fig. 3. Band diagrams of a p-CdTe semiconductor and a metal contact before forming a Schottky junction.

which is currently achievable [14]. Donors and acceptors are assumed to be completely ionized, so p ¼NA and n ¼ ND. In this model, the electron reflector layer has a 200-nm layer thickness and the other properties are the same as CdTe layer for the baseline setting. An electron reflector can be created by changing the bandgap or the carrier density of the electron-reflector layer. The primary parameter is the electron-reflector barrier height φe shown in Fig. 2. The CdS layer has a 15-nm thickness, and external reflection of the superstrate was assumed to be 8%. CdS has a wide bandgap (  2.4 eV) and can be deposited thin by chemical bath deposition or atomic layer deposition. Band structures and J–V curves are calculated for a variety of situations. Physical parameters includes layer thickness (d), carrier density (p), carrier lifetime (τ), electron-reflector barrier height (φe), back-contact barrier height (φb), and back-surface recombination velocity (Sb). All other parameters are kept constant throughout all calculations. Calculated J–V curves can be described by diode equation: J ¼ J 0 exp ðqðV  JRs Þ=AkTÞ  J L þ GðV  JRs Þ; where saturation current density J0 and ideality factor A can be solved analytically [9]. J0 and A are used as the indicators for recombination. Large J0, above 10  6 mA/cm2, and A close to 2 typically imply large recombination. Series resistance Rs ¼1 Ω cm2 and leakage conductance G ¼ 0.3 mS/cm2 are set in the device model. Based on this simulation model, a reasonable baseline cell (short-circuit current Jsc ¼23.7 mA/cm2, open-circuit voltage Voc ¼831 mV, fill factor FF¼81%, Rs ¼1 Ω cm2, G ¼0.3 mS/ cm2, A¼ 1.3, J0 ¼10  9 mA/cm2, and efficiency eff ¼16%) is utilized.

3. Results and discussion

3.1.1. Effect of electron reflector on Voc Back-surface recombination can significantly degrade the opencircuit voltage of CdTe cells. The common parameter to quantify it is the back-surface recombination velocity Sb. In this simulation, a fully-depleted cell (dabs ¼2 um, p ¼ 1013 cm  3) with a 200-nm electron-reflector layer and a 0.3-eV back barrier (φb ¼0.3 eV corresponds to a flat band at the back surface when p  1013 cm  3) is used. Fig. 4 shows the calculated J–V curves for a fully depleted CdTe cell with no electron reflector as well as a series of values for Sb ¼107, 104, and 101 cm/s, and it also shows that with Sb ¼107 cm/s and different electron reflector barrier heights (0, 0.1, and 0.2 eV). These curves illustrate the effect of an electron reflector on the open-circuit voltage and the voltage difference with a series of values for Sb. There is some equivalence between lower Sb and larger φe. Both increase Voc by reduced back-surface recombination, and one can say that the electron reflector reduces the effective value of Sb. Note that several orders of magnitude in Sb are needed to match the electron-reflector improvement. Therefore, the electron reflector is potentially an efficient way to improve Voc by reducing the back-surface recombination. The calculated values of Jsc change little with Sb or φe because most incident light will not reach the back surface. Fig. 5 summarizes the effect of varied Sb (101–107 cm/s) and φe (0, 0.1, 0.2, and 0.3 eV) on Voc assuming a 1-ns lifetime for all barrier heights and a 10-ns lifetime for the 0.3-eV ER. When Sb is large (above 106 cm/s), the Voc improvement is nearly equal to φe/q, but saturates above a 200-mV increase by 0.2-eV electron reflector for 1-ns lifetime. To have further improvement, higher lifetime is required. Improved Voc allows a larger bias voltage cross the device before turning up, which results in a weaker built-in field in the bulk absorber layer, so longer diffusion length is required to avoid the saturation of Voc improvement with larger electron reflector. On the other side, with smaller Sb, the base Voc is larger, and the electron-reflector improvement is less. With even larger Voc improvement, reverse drift field for the minority carriers will hurt FF. 3.1.2. Electron reflector vs. carrier density In this simulation, 1-ns lifetime, a 200-nm 0.2-eV electron reflector layer, and a 0.3-eV back barrier are assumed. The carrier density is varied from 1013 to 1015 cm  3. With this variation in carrier density, the back band is not always flat, and the cell is not

The simulation results of electron reflectors formed with the three different approaches are discussed in this section. 3.1. Expanded-bandgap electron reflector This kind of electron reflector can be abrupt and the barrier height remains constant with external bias. The material of the electron-reflector layer needs to have a higher bandgap than that of the bulk part of the absorber layer with the increase primarily happening in the conduction band, which means a negligible valence-band offset. A large valence-band offset will form a barrier to holes and then increase contact resistance. With specific materials, the barrier height φe is approximately the difference between bandgaps as shown in Fig. 2. Alloys such as CdZnTe (1.5– 2.4 eV), CdMgTe (1.5–3.6 eV), and CdMnTe (1.5–3.2 eV) should serve this purpose. Their bandgaps can be modified by adjusting the composition ratios. Expanded-bandgap electron reflector has been used to improve the performance of Cu(In,Ga)Se2 (CIGS) solar cells. The quaternary system of CIGS allows the bandgap of the

Fig. 4. Calculated J–V curves for a fully depleted CdTe cell with no electron reflector as well as a series of values for Sb ¼ 107, 104, and 101 cm/s, and calculated J–V curves for a fully depleted cell with Sb ¼ 107 cm/s and different electron reflector barrier heights (0, 0.1, and 0.2 eV). These curves illustrate the voltage difference with a series of values for both Sb and the effect of an electron reflector on the open-circuit voltage. There is some equivalence between lower Sb and larger φe.

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3.1.3. Electron reflector layer thickness Here, a fully-depleted 2-mm cell with 1-ns lifetime and a 0.3-eV back barrier is used. The thickness of the electron-reflector layer dER was varied from 20 to 500 nm with dabs fixed at 2 um. Simulation shows that the thickness of the electron-reflector layer has little effect with dER above 200 nm, and intuitively, unless the electrons tunnel, one expects it is only the barrier height and not the thickness that matters.

Fig. 5. Summary of the effect of varied Sb (101–107 cm/s) and φe (0, 0.1, 0.2, and 0.3 eV) on Voc assuming a 1-ns lifetime and a 10-ns lifetime only for 0.3-eV ER. When Sb is above 106 cm/s, the Voc improvement is initially nearly equal to φe/q, but saturates above a 200 mV increase for a 1-ns lifetime, and above 300 mV for higher lifetimes. On the other side, with smaller Sb, the base Voc is larger, and the electronreflector improvement is less.

3.1.4. Bulk-bandgap reduction The other way to create an expanded-bandgap electron reflector is to reduce the bandgap of the bulk absorber layer Egbulk and keep the bandgap of ER layer at 1.5 eV. The possible material for bulk-band-gap reduction is CdHgTe (1.5–0 eV). A reasonable assumption, which is approximately correct for many semiconductor alloys, is that the spectrum shifts in energy by the same amount as the band-gap change. The calculated J–V curves illustrate that the reduction of bandgap increases the Jsc. The bulk layer can absorb photons with energy above Egbulk. With the bulkbandgap reduction, more photons can be absorbed. Based on simulation, a 0.2-eV bulk-bandgap reduction is predicted to have an increase of 6.5 mA/cm2 in current density and 3% in efficiency, which is essentially equivalent to the expanded bandgap. Bulkbandgap reduction is not considered separately below, because its effect is very similar to expanded-bandgap layer. 3.2. Band bending In this section, the conduction-band barrier is created by upward curvature of the bands with respect to the Fermi level near the back surface due to a reversed back barrier or a heavilydoped back surface. This type of electron reflector produces a gradual conduction-band barrier and the barrier height may vary with the external bias. Here, we will focus on the effect of conduction-band offset due to the two mechanisms.

Fig. 6. (a) Conduction band of a baseline CdTe cell with the carrier density varied from 1013 to 1015 cm  3 at Vbias ¼ Voc. With this variation, the cell is not always fully depleted. (b) Calculated corresponding J–V curves. A first-quadrant kink limits the Voc improvement, and a fourth-quadrant kink decreases the FF. In either case, the lack of full depletion compromises the electron-reflector strategy.

always fully depleted (see Fig. 6(a)). The corresponding J–V curves (see Fig. 6(b)) show that fully depleted cells (p ¼1013, 1014 cm  3) have similar curves, but the electron-reflector enhancement is significantly diminished in non-fully depleted cells (p 4 1014 cm  3). More recombination in the bulk absorber region happens due to the lack of built-in field in the neutral region. The curves with carrier density above 3  1014 cm  3 show a kink where the second derivative of the J–V curve is negative. The kink can exist in the first (p 43  1014 cm  3) or fourth quadrant (p o3  1014 cm  3). A first-quadrant kink limits the Voc improvement, and a forth-quadrant kink decreases the FF. In either case, the lack of full depletion compromises the electron-reflector strategy.

3.2.1. Reversed back barrier A back-contact barrier for holes φb usually has a negative effect on the cell performance. A back barrier resulting from a very high work function of the metal contact, however, could in principle create a barrier to the forward electron flow in the conduction band, and therefore be beneficial to the cell performance. In this simulation, which will be referred to as a reversed back barrier, a cell with 1-ns lifetime and no expanded-bandgap electron reflector is considered. The back-barrier height is varied for a fullydepleted cell (lightly doped, p¼1013 cm  3). Fig. 7(a) shows that the fully-depleted cell with a lower back barrier has a higher conduction-band barrier. In Fig. 7(b), the corresponding J–V curves show that this barrier serves as an electron reflector to improve the Voc. 3.2.2. Heavily doped back surface For higher hole density near the back surface, the Fermi level will be closer to the top of the valence band, and a barrier in the conduction band will be formed at the back surface (see Fig. 8(a)). The barrier height for this kind of electron reflector is quantified by the ratio of the carrier density of the electron-reflector layer to that of the bulk layer, or pER/pbulk. This kind of electron reflector is also referred to as a backsurface field (BSF). It has been used to improve the performance of Si-based solar cells for many years [16–20]. In a typical BSF Si-based solar cell, the back surface is heavily doped by aluminum, and a conduction-band barrier to the forward electron flow is created. The BSF also increases the collection probability for carriers generated near the back contact and hence boosts the

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Fig. 8. (a) Conduction band of a baseline CdTe cell with pER/pbulk varied from 101 to 105 at Vbias ¼0.8 V. (b) Calculated corresponding J–V curves, which show that this barrier serves as an electron reflector to improve the Voc. The effectiveness of a depleted electron-reflector layer is likely to be limited. To have an optimal effect, a carrier density ratio above 103 is required for a 200-nm ER layer. If the carrier density is larger, thinner electron reflector layer without compensating Voc improvement is possible.

Fig. 7. (a) Band diagrams of a baseline CdTe cell with φb varied from 0 to 0.5 eV at Vbias ¼ 0 V and 0.6 V, which is below Voc. (b) Calculated corresponding J–V curves, which show that this barrier serves as an electron reflector to improve the Voc.

long-wavelength photon collection. Such improvements have been obtained experimentally [21,22]. However, the effectiveness of a depleted electron-reflector layer is likely to be limited (Fig. 8(b)). To have an optimal effect, a carrier density ratio above 103 (pER ¼1016 cm  3) is required for a 200-nm ER layer. If the carrier density is larger, thinner electron reflector layer without compensating Voc improvement is possible. 3.3. Comparisons of mechanisms Different approaches to electron reflectors were discussed previously. In this section, three mechanisms to increase voltage, the expanded-bandgap layer, the reversed back-contact barrier, and the heavily-doped back surface, will be compared. Fig. 9 summarizes the effect of different mechanisms on voltage, fill factor, ideality factor, saturation current density, and efficiency. Jsc is not plotted because the electron-reflector strategy has little effect on Jsc. The results for mechanisms are plotted against its corresponding parameter (φe for expanded-bandgap layer, φb for reversed back barrier, and pER/pbulk for heavily doped back surface). Fig. 9(a) shows that Voc varies relatively linearly with φe, φb, or pER/pbulk, and that Voc can exceed 1 V with any of the three mechanisms. The secondary impact of electron reflector is on FF. Fig. 9(b) shows that fill factor changes slightly with

parameters, but starts to decrease when the voltage increase is above 100 mV for a reversed back barrier and a heavily-doped back surface. The decrease in FF and the increase in both A and J0 are consistent. The decrease in FF can be explained by more recombination. Fig. 9(e) shows that the efficiency increases relatively linearly with parameters, but saturates when the fill factor begins to decrease for band-bending mechanisms. Among these mechanisms in Fig. 9, the improvement in Voc and the maintenance of the FF make the expanded-bandgap approach more likely to be more efficient than the other two mechanisms. The predicted efficiency improvement is approximately 50% larger. Fig. 10 shows that the calculated conduction bands of cells with different electron-reflector mechanisms at open-circuit voltage. One can see that cells with different types of electron-reflector barriers should all result in a voltage increase approaching 200 mV, but the details of the conduction-band diagrams are quite different. Moreover, the barrier height of the expandedbandgap layer is a constant with variation in external bias. Metals such as gold and platinum with work functions large enough to form a reversed back barrier with p-type CdTe are typically expensive, so it is unlikely that a p-type CdTe will have a reversed back barrier economically due to its very high work function. Besides, p-type CdTe is not easily heavily doped because it is generally heavily compensated [23]. Besides, several orders of magnitude in carrier density ratio are needed to match the electron-reflector improvement. Consequently, the expandedbandgap layer is probably more practical and efficient than the others. The combination of any two of the three mechanisms is also investigated. Based on simulation, results from different strategies are qualitatively similar. There is little or no gain from combinations.

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required for the electron-reflector strategy. A CdTe cell with a ZnTe electron-reflector layer can create a 0.8-eV conduction barrier and a 0.1-eV valence-band offset [24]. A 0.2-eV electronreflector barrier can be created by alloy CdZnTe with 25% in Zn composition. Proportionally, the valence-band offset should be around 0.025 eV. With this small offset, the valence-band offset has little effect on the cell performance. Therefore, the valenceband offset at the CdTe/CdZnTe interface should be negligible in the electron-reflector strategy. Other alloys for electron reflectors can be evaluated similarly. 3.5. Experimental results

Fig. 9. The effect of different mechanisms on voltage, fill factor, ideality factor, saturation current density, and efficiency are summarized. Fits shown are for the expanded bandgap strategy. Voc varies relatively linearly with φe, φb, or pER/pbulk, and that Voc can exceed 1 V with any of the three mechanisms. The decrease in FF can be explained by more recombination. the improvement in Voc and the maintenance of the FF make the expanded-bandgap approach more likely to be more efficient than the other two mechanisms.

Solar cells with the configuration of TCO/CdS/CdTe/ZnTe/contact have been studies by Tim Gessert since almost 20 years ago [25–30]. In Ref. [25], two ZnTe interface layers were deposited between p-CdTe and subsequent metallization to control Cu diffusion in p-CdTe layer, where Cu concentration affects carrier lifetime [29] and carrier concentration [28], for improving electrical contact. When Cu content in p-CdTe layer is optimized, better carrier lifetime and proper depletion width will result in a better PV performance. I–V curves in Fig. 11, which were extracted from Fig. 6 in Ref. [25], showed that the solar cell with CdTe/iZnTe/ZnTe:Cu configuration had a larger Voc than that with CdTe/ ZnTe:Cu configuration by 234 mV (from 513 mV to 747 mV). The reason for the significant improvement in Voc was not explained in the reference. Cu content was found to affect the minority carrier lifetime of CdTe solar cells, which ranged from 1 ns to 10 ns [29]. Based on numerical simulation, improvement in carrier lifetime around 1 ns by 10 times can increase FF by up to 10%, but Voc around 20 mV. Besides, decrease in back barrier height improves both Voc and FF. Therefore, both larger carrier lifetime and improved contact cannot explain the significant improvement in Voc entirely, which happened with reduced FF (from 66.1% to 60.4%). One reasonable explanation is that the cell with CdTe/ i-ZnTe/ZnTe:Cu configuration gave a better condition for electronreflector strategy than CdTe/ZnTe:Cu one, which means reasonable carrier lifetime and depletion width. Compared with CdTe/ZnTe:Cu cell, voltage increase above 200 mV, slightly reduced FF, and similar Jsc of CdTe/i-ZnTe/ZnTe:Cu cell are consistent with the simulation results of Voc improvement due to electron reflector in Fig. 9. Therefore, the effectiveness of electron reflector with the CdTe/i-ZnTe/ZnTe:Cu configuration due to a better control of Cu diffusion is believed to account for the significant improvement in Voc. To have more improvement in Voc, higher lifetime is required and interfacial recombination between CdTe and wide gap layers needs to be minimized. To achieve in practice the reasonable value of the recombination rate between the CdTe and wide gap layers, some suggestions are given below.

Fig. 10. The calculated conduction bands of cells with different electron-reflector mechanisms at open-circuit voltage. One can see that cells with different types of electron-reflector barriers should all result in a voltage increase approaching 200 mV, but the details of the conduction-band diagrams are quite different. Moreover, the barrier height of the expanded-bandgap layer is a constant with variation in external bias.

3.4. Related issues In the previous sections, the mechanisms were investigated and compared. After an electron-reflector layer is created, however, an additional interface is formed. Possible interfacialrecombination and valence-band-offset issues are discussed below. If interfacial recombination is as serious as back-surface recombination, the deposited electron-reflector layer only shifts the problem due to back-surface recombination to interfacial recombination. Therefore, a good-quality reflector interface is

Fig. 11. I–V curves of cells with CdTe/i-ZnTe/ZnTe:Cu and CdTe/ZnTe:Cu configurations, which were extracted from Fig. 6 in Ref. [25]. Intrinsic (undoped) ZnTe layer is used to control Cu diffusion from ZnTe:Cu layer to CdTe layer.

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I. Before depositing the electron-reflector layer, contaminating the back surface of CdTe should be avoided. Surface contamination could come from the exposure to atmosphere. II. CdTe-related alloy is preferred to be the material of electron reflector. For example, a 0.2-eV electron-reflector barrier can be created by alloy CdZnTe with 25% in Zn composition. With the alloy, lattice mismatch can be reduced. If composition grading is formed between CdTe and CdZnTe, the lattice mismatch is believed to be minimal. Interdiffusion between CdTe and CdZnTe layers can result in composition grading. III. Evaporation, electrodeposition, and sputtering can be used to deposit the electron-reflector layer, and the damage to the back surface of CdTe during process needs to be avoided. 4. Summary and conclusions An electron reflector is a conduction-band barrier to electrons reaching the back solar-cell surface, which can reduce the backsurface recombination, especially at forward bias. There are two types of mechanisms to create an electron reflector. One is an expanded bandgap. For this mechanism, the bandgap of the electron-reflector layer is larger than that of the bulk part of the absorber layer. Either an expanded-band-gap layer or a band-gap reduction over most of the bulk can create an expanded bandgap near the back. The former increases the open-circuit voltage, and the latter increases the short-circuit current. The other type of electron reflector is band bending. Both a reversed back barrier and a heavily-doped back surface can create an electron reflector by band bending. Investigation shows that the expanded-bandgap layer should be more efficient and practical than a reversed back barrier or a heavily-doped back surface. However, there is no additional improvement from the combination of any two of mechanisms. Therefore, an expanded-band-gap layer is recommended for CdTe thin-film solar cells. Theoretically, an increase of 200 mV in voltage and 3% in absolute efficiency is achievable for a 2-μm CdTe cell with a 1013 cm  3 hole density, a 1-ns lifetime, and a 0.2-eV electron reflector. To have the optimal effect of an electron reflector, a reasonable lifetime (1 ns or above) and full depletion are required. For thinner cells, the electron reflector should give a similar increase in performances. A good-quality interface between the p-type CdTe layer and the electron-reflector layer is required, or else the deposited electron-reflector layer simply shifts the loss caused by the back-surface recombination to the interfacial recombination. Alloy CdXTe, where X can be Zn, Mg, or Mn, should be a good material for the electron-reflector barrier since the valence-band offset at CdTe/CdXTe interface is negligible for a 0.2-eV ER and the band expansion is almost exclusively in the conduction band. Preliminary experimental evidence of electron reflector was also discussed.

Acknowledgements Simulations used the software AFORS-HET v2.4.1, developed in Hahn-Meitner-Institut Berlin with support from the German Bundesministerium für Bildung und Forschung. References [1] M.A. Green, Solar cells: operating principles, technology, and system application, Prentice-Hall, New Jersey (1982) 89.

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