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Enhancement of open circuit voltage of CdTe solar cell
Materials Today: Proceedings xxx (xxxx) xxx
Contents lists available at ScienceDirect
Materials Today: Proceedings journal homepage: www.elsevier.com/locate/matpr
Enhancement of open circuit voltage of CdTe solar cell R. Venkatesh a,b,⇑, N.R. Banapurmath a,b, K. Ramesh c, A. Venkatesh b, Swapnil A. Khandake b, Pramod R. Kurade b, Sachin M. Modagi b, M. Nipun Nitin b, Ashok S. Shettar a a
Centre for Material Science, KLE Technological University, Hubbali 580031, Karnataka, India School of Mechanical Engineering, KLE Technological University, Hubbali 580031, Karnataka, India c Department of Physics, Indian Institute of Science, Bangalore 560012, Karnataka, India b
a r t i c l e
i n f o
Article history: Received 13 August 2019 Received in revised form 11 September 2019 Accepted 15 September 2019 Available online xxxx Keywords: Solar cell Thermal evaporator Cadmium Telluride (CdTe) Open-circuit voltage (Voc) I–V characteristics UV–Visible-NIR spectroscopy
a b s t r a c t In the present work, FTO/CdS/CdTe/Te/Al superstrate structured solar cell has been fabricated using thermal evaporation method. A 40 nm thin layer of P-type tellurium has been incorporated between CdTe and back contact to reduce the potential energy barrier by improving the quality of interfaces. The fabricated device characterized using UV–Visible-NIR spectroscopy and I–V measurement. The tellurium interlayer plays a vital role in enhancing the performance of the device. The fabricated device generated open circuit voltage (Voc) of 0.7 V. Ó 2019 Elsevier Ltd. All rights reserved. Selection and Peer-review under responsibility of the scientific committee of the First International Conference on Recent Advances in Materials and Manufacturing 2019.
1. Introduction Cadmium Telluride (CdTe) is the most promising photovoltaic materials due to its high absorption coefficient (˃104/cm) and direct bandgap of 1.45 eV [1]. The production cost of CdTe solar cell reduced to below 1$/Wp made them second largest available solar cell after silicon and considered to be alternative to silicon solar cells [2]. CdTe shown efficiency of 22.1% [3] at lab scale but the commercially available module shown average efficiency of below 18.6% [3], which is far less than the predicted efficiency of 30%. Many issues have been hindering the performance of the CdTe solar cell such as materials, post growth treatment, chemical etching of the prepared film to get Tellurium rich surface and choice of back contacts. The above-mentioned areas need deeper understand to produce improved efficiency. Apart from the above-mentioned issues, many researchers have been focusing on different types of electrode materials, preparation techniques, anti-reflection coating on glass substrate to get better efficiency. The most important and common step to produce highly efficient CdTe solar cell is CdCl2 treatment. The CdCl2 treatment helps ⇑ Corresponding author at: Centre for Material Science, KLE Technological University, Hubbali 580031, Karnataka, India. E-mail address: [email protected] (R. Venkatesh).
in grain growth, recrystallization, and reduce the lattice mismatch between CdS and CdTe [5,6]. But the fermi energy pinning (potential energy barrier between CdTe and Top electrode) is one of the main factors which reduces the open circuit voltage and arises due to the potential energy barrier between absorber layer and top metal electrode. CdTe has higher work function of 5.01 eV and it is necessary to find a material which matches the band alignment to both CdTe layer and top aluminum (Al) electrode. Tellurium (Te) is found to the best materials which can reduces the potential energy barrier between CdTe and top Al electrode [4]. In this work, glass/FTO/CdS/CdTe/Te/Al superstrate structured solar cell has been developed and Te has been incorporated between CdTe layer and Aluminum electrode. The prepared solar cell device has been studied using UV–Visible-NIR spectroscopy and I–V characteristics. 2. Experimental details All the required chemical (CdS, CdTe, Te and FTO glass slides) for this work were procured from Sigma Aldrich. In this study, N-type CdS (4 N purity) thin film of 100 nm was deposited on commercial Fluorine doped SnO2 (surface resistivity of 7 X/sq) coated 3 mm thick soda lime glass by thermal evaporator at 70 °C and all other layers were deposited using thermal evaporator and
https://doi.org/10.1016/j.matpr.2019.09.035 2214-7853/Ó 2019 Elsevier Ltd. All rights reserved. Selection and Peer-review under responsibility of the scientific committee of the First International Conference on Recent Advances in Materials and Manufacturing 2019.
Please cite this article as: R. Venkatesh, N. R. Banapurmath, K. Ramesh et al., Enhancement of open circuit voltage of CdTe solar cell, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2019.09.035
2
R. Venkatesh et al. / Materials Today: Proceedings xxx (xxxx) xxx
constant base pressure of 2 105 m bar was maintained. Then the prepared CdS film annealed at 350 °C for 30 min to crystallize the film under vacuum (104 m bar). Then P-type CdTe (99.98% Purity) absorber layer of thickness 2 mm deposited over FTO/CdS film at 250 °C. To make P-N junction, the prepared sample annealed at 450 °C in an open air for 10 min. Followed by P-N junction formation, a 40 nm tellurium thin film was deposited on CdTe layer and finally top electrode 100 nm thin aluminum was deposited through a mask of 3 mm 3 mm at room temperature. Solar cell with the configuration of FTO/n-CdS/p-CdTe/p-Te/Al was prepared by simple thermal evaporation technique and the stacking sequence of layers of solar cell shown in Fig. 1. The schematic energy band diagram of the device shown in Fig. 2. 3. Results and discussions 3.1. UV–Visible-NIR spectroscopy The optical transmittance of the fabricated device (Glass slide/FTO/CdS/CdTe/Te thin film) has been studied in the wavelength range of 200–1100 nm using UV–Visible-NIR-spectrometer. Fig. 3 shows the optical transmittance spectrum of the fabricated device. The fabricated device shows transmittance of 48% in the IR range from 810 to 1000 nm and less transmittance range from 810 to 200 nm. This less transmission due to the high absorption characteristics of CdTe between 200 and 810 nm. The wavelength ranges from 810 to 200 nm corresponding to 1.46 to 6 eV range and utilized for energy conversion.
Fig. 1. Device structure of CdTe cell.
3.2. Band gap of the device The optical band gap of the prepared thin film has been calculated using Tauc Plot method. This method allows to calculate bandgap directly from the relation (ahv) = A(hv-Eg)n [7]. Where, A – Constant,
a – Absorption coefficient hv – Photon energy in eV Eg – Bandgap in eV n – Constant number, having values 1/2, 2, 3/2 or 3 corresponding to allowed direct, allowed indirect, forbidden direct or forbidden indirect transitions, respectively. The graph of (ɑhm)2 vs hm was plotted to determine the energy band gap of the film. The Bandgap (Eg) can be obtained by extrapolating the linear portion to the photon energy axis as shown in the Fig. 4. The bandgap was calculated and found to be 1.46 eV which is optimized bandgap for CdTe absorber material.
3.3. I–V characteristics The I–V measurement was performed on FTO/CdS/CdTe/Te/Aluminum device of area, i.e., 3 mm 3 mm.
Fig. 3. Transmittance spectrum in the wavelength range 200–1000 nm of the fabricated device (Glass/FTO/CdS/CdTe/Te).
Fig. 2. Schematic Energy Band diagram of the Device.
Please cite this article as: R. Venkatesh, N. R. Banapurmath, K. Ramesh et al., Enhancement of open circuit voltage of CdTe solar cell, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2019.09.035
R. Venkatesh et al. / Materials Today: Proceedings xxx (xxxx) xxx
3
the extracted voltage i.e. open-circuit voltage (Voc) was 0.7 V or 700 mV was higher than previously reported results [8,10,11,12], though the difference in preparation methods and thickness of the devices. Tellurium has work function of 4.7 eV which lies between CdTe (5.01 eV) and aluminium (4.3 eV) electrode which helps in reduces the defect states between CdTe and Al electrode and influence the flawless charge transport by the quality of interfaces. Also, tellurium helps in improving the electrical properties of CdTe. The number of layers was more so the series resistance was high. This series resistance reduces current flow through the device which causes less current extraction. C. Hernandez et al reported same work without tellurium layer and shows the Voc of 418 mV [4] and our work has shown the Voc of 700 mV with tellurium layer between CdTe and aluminium layer without CdCl2 treatment which is comparable to C. Hernandez et al report. Fig. 4. Plot of (ɑhm)2 vs photon energy (hm) for the evaluation of energy band gap of CdTe thin films.
4. Conclusion We fabricated glass/FTO/CdS/CdTe/Te/Al superstrate structured solar cell completely by thermal evaporation technique. A 40 nm thin layer of Tellurium was introduced to reduces the potential energy barrier between CdTe and Al electrode. Tellurium has good band alignment with CdTe and P-type material which reduces the interface defects and reduces the potential barrier between CdTe and Aluminum electrode which helps in extracting more voltage from the device. After careful observation and calculation, we could observe that the open circuit voltage of about 0.7 V was observed which is high compared with previous reports, though the other parameters such as Isc, FF and the efficiency were less though we do not conduct CdCl2 for our device to improve the crystalline size. Our work here gives another way to improve the performance of the CdS/CdTe solar cell. Acknowledgements
Fig. 5. I–V response of the FTO/CdS/CdTe/Te/Al solar cell.
The efficiency of the fabricated solar cell has been measured using solar simulator under 1000 W/m2 (1 sun) incident power and 1.5 AM solar light spectrum with keithley 2400 sourcemeter. Two flawless dark and light illumination curves were obtained by sweeping the voltage from 1 to 1 V in dark and light illumination (AM 1.5) conditions shown in Fig. 5. The measurement system was calibrated using crystalline silicon solar cell with known efficiency (9%) and J-V parameters. The fill factor (FF) and the efficiency were calculated from the Eqs. (1) and (2) [8,9]:
FF ¼
V max Imax V oc ISc
Efficiency ðgÞ ¼
ð1Þ FF: V oc : Isc Pinput
ð2Þ
The Voc = 0.7 V or 700 mV, Isc = 0.23 mA, fill factor is 28% and efficiency is 0.54% were obtained from the prepared solar cell. The observed curve shows the high Voc but there was low current extraction. The curve is almost straight which is because of the series resistance of the solar cell. The parasitic resistance (series, shunt resistance) of the solar cell effect is higher, which in turn affects the fill factor [19] and it is low, about 28%. Even when the fabricated device generated less Isc, fill factor and efficiency but
Funding Support from KLE Technological University, Hubbali is greatly acknowledged. Authors would Thank Dr. Pumlian Munga, Assistant Professor, Department of Physics, Jamia Millia Islamia (Central University), New Delhi, India for his valuable discussion for this work. References [1] Min Wang, Xun Li, Deliang Wang, Eur. Phys. J. Appl. Phys. 83 (2018) 20101. [2] G. Kartopu, A.J. Clayton, W.S.M. Brooks, S.D. Hodgson, V. Barrioz, A. Maertens, D.A. Lamb, S.J.C. Irvine, Effect of window layer composition in Cd1-xZnxS/CdTe solar cells, Prog. Photovolt. 22 (2014) 18–23. [3] M.A. Green, K. Emery, Y. Hishikawa, et al., Solar cell efficiency tables (version 50), Prog. Photovolt Res. Appl. 25 (7) (2017) 668–676. [4] C. Hernández Vásquez et al., Mater Res. Express 4 (2017) 086403. [5] Judith Schaffner, Markus Motzko, Alexander Tueschen, Andreas Swirschuk, Hermann-Josef Schimper, Andreas Klein, Thomas Modes, Olaf Zywitzki, Wolfram Jaegermann, J. Appl. Phys. 110 (2011) 064508. [6] Ruilong Yang, Dezho Wang, Lei Wan, Deliang Wang, RSC Adv. 4 (2014) 22162– 22171. [7] Abdul Wahab S.Z. Lahewil et al., Proc. Eng. 53 (2013) 217–224. [8] T. Gaewdang, N. Wongcharoen, T. Wongcharoen, Energy Procedia 15 (2012) 299–304. [9] Arturo Morales-Acevedo, Solar Energy 80 (2006) 675–681. [10] W. Lee, J. Sharp, G.A. Umana-Membreno, J. Dell, L. Faraone, Deposition heating effect on CdS thin films prepared by thermal evaporation for CdTe solar cells, 2014 Conference on Optoelectronic and Microelectronic Materials & Devices, Perth, WA, 2014, pp. 153–155. [11] Suha A. Fadaam et al., Energy Procedia 157 (2019) 635–643. [12] Z.-B.K. Gutierrez, G. Zayas-Bazán, P. de Melo O, et al., CdS/CdTe heterostructures for applications in ultra-thin solar cells, Materials (Basel) 11 (10) (2018) 1788.
Please cite this article as: R. Venkatesh, N. R. Banapurmath, K. Ramesh et al., Enhancement of open circuit voltage of CdTe solar cell, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2019.09.035
Contents lists available at ScienceDirect
Materials Today: Proceedings journal homepage: www.elsevier.com/locate/matpr
Enhancement of open circuit voltage of CdTe solar cell R. Venkatesh a,b,⇑, N.R. Banapurmath a,b, K. Ramesh c, A. Venkatesh b, Swapnil A. Khandake b, Pramod R. Kurade b, Sachin M. Modagi b, M. Nipun Nitin b, Ashok S. Shettar a a
Centre for Material Science, KLE Technological University, Hubbali 580031, Karnataka, India School of Mechanical Engineering, KLE Technological University, Hubbali 580031, Karnataka, India c Department of Physics, Indian Institute of Science, Bangalore 560012, Karnataka, India b
a r t i c l e
i n f o
Article history: Received 13 August 2019 Received in revised form 11 September 2019 Accepted 15 September 2019 Available online xxxx Keywords: Solar cell Thermal evaporator Cadmium Telluride (CdTe) Open-circuit voltage (Voc) I–V characteristics UV–Visible-NIR spectroscopy
a b s t r a c t In the present work, FTO/CdS/CdTe/Te/Al superstrate structured solar cell has been fabricated using thermal evaporation method. A 40 nm thin layer of P-type tellurium has been incorporated between CdTe and back contact to reduce the potential energy barrier by improving the quality of interfaces. The fabricated device characterized using UV–Visible-NIR spectroscopy and I–V measurement. The tellurium interlayer plays a vital role in enhancing the performance of the device. The fabricated device generated open circuit voltage (Voc) of 0.7 V. Ó 2019 Elsevier Ltd. All rights reserved. Selection and Peer-review under responsibility of the scientific committee of the First International Conference on Recent Advances in Materials and Manufacturing 2019.
1. Introduction Cadmium Telluride (CdTe) is the most promising photovoltaic materials due to its high absorption coefficient (˃104/cm) and direct bandgap of 1.45 eV [1]. The production cost of CdTe solar cell reduced to below 1$/Wp made them second largest available solar cell after silicon and considered to be alternative to silicon solar cells [2]. CdTe shown efficiency of 22.1% [3] at lab scale but the commercially available module shown average efficiency of below 18.6% [3], which is far less than the predicted efficiency of 30%. Many issues have been hindering the performance of the CdTe solar cell such as materials, post growth treatment, chemical etching of the prepared film to get Tellurium rich surface and choice of back contacts. The above-mentioned areas need deeper understand to produce improved efficiency. Apart from the above-mentioned issues, many researchers have been focusing on different types of electrode materials, preparation techniques, anti-reflection coating on glass substrate to get better efficiency. The most important and common step to produce highly efficient CdTe solar cell is CdCl2 treatment. The CdCl2 treatment helps ⇑ Corresponding author at: Centre for Material Science, KLE Technological University, Hubbali 580031, Karnataka, India. E-mail address: [email protected] (R. Venkatesh).
in grain growth, recrystallization, and reduce the lattice mismatch between CdS and CdTe [5,6]. But the fermi energy pinning (potential energy barrier between CdTe and Top electrode) is one of the main factors which reduces the open circuit voltage and arises due to the potential energy barrier between absorber layer and top metal electrode. CdTe has higher work function of 5.01 eV and it is necessary to find a material which matches the band alignment to both CdTe layer and top aluminum (Al) electrode. Tellurium (Te) is found to the best materials which can reduces the potential energy barrier between CdTe and top Al electrode [4]. In this work, glass/FTO/CdS/CdTe/Te/Al superstrate structured solar cell has been developed and Te has been incorporated between CdTe layer and Aluminum electrode. The prepared solar cell device has been studied using UV–Visible-NIR spectroscopy and I–V characteristics. 2. Experimental details All the required chemical (CdS, CdTe, Te and FTO glass slides) for this work were procured from Sigma Aldrich. In this study, N-type CdS (4 N purity) thin film of 100 nm was deposited on commercial Fluorine doped SnO2 (surface resistivity of 7 X/sq) coated 3 mm thick soda lime glass by thermal evaporator at 70 °C and all other layers were deposited using thermal evaporator and
https://doi.org/10.1016/j.matpr.2019.09.035 2214-7853/Ó 2019 Elsevier Ltd. All rights reserved. Selection and Peer-review under responsibility of the scientific committee of the First International Conference on Recent Advances in Materials and Manufacturing 2019.
Please cite this article as: R. Venkatesh, N. R. Banapurmath, K. Ramesh et al., Enhancement of open circuit voltage of CdTe solar cell, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2019.09.035
2
R. Venkatesh et al. / Materials Today: Proceedings xxx (xxxx) xxx
constant base pressure of 2 105 m bar was maintained. Then the prepared CdS film annealed at 350 °C for 30 min to crystallize the film under vacuum (104 m bar). Then P-type CdTe (99.98% Purity) absorber layer of thickness 2 mm deposited over FTO/CdS film at 250 °C. To make P-N junction, the prepared sample annealed at 450 °C in an open air for 10 min. Followed by P-N junction formation, a 40 nm tellurium thin film was deposited on CdTe layer and finally top electrode 100 nm thin aluminum was deposited through a mask of 3 mm 3 mm at room temperature. Solar cell with the configuration of FTO/n-CdS/p-CdTe/p-Te/Al was prepared by simple thermal evaporation technique and the stacking sequence of layers of solar cell shown in Fig. 1. The schematic energy band diagram of the device shown in Fig. 2. 3. Results and discussions 3.1. UV–Visible-NIR spectroscopy The optical transmittance of the fabricated device (Glass slide/FTO/CdS/CdTe/Te thin film) has been studied in the wavelength range of 200–1100 nm using UV–Visible-NIR-spectrometer. Fig. 3 shows the optical transmittance spectrum of the fabricated device. The fabricated device shows transmittance of 48% in the IR range from 810 to 1000 nm and less transmittance range from 810 to 200 nm. This less transmission due to the high absorption characteristics of CdTe between 200 and 810 nm. The wavelength ranges from 810 to 200 nm corresponding to 1.46 to 6 eV range and utilized for energy conversion.
Fig. 1. Device structure of CdTe cell.
3.2. Band gap of the device The optical band gap of the prepared thin film has been calculated using Tauc Plot method. This method allows to calculate bandgap directly from the relation (ahv) = A(hv-Eg)n [7]. Where, A – Constant,
a – Absorption coefficient hv – Photon energy in eV Eg – Bandgap in eV n – Constant number, having values 1/2, 2, 3/2 or 3 corresponding to allowed direct, allowed indirect, forbidden direct or forbidden indirect transitions, respectively. The graph of (ɑhm)2 vs hm was plotted to determine the energy band gap of the film. The Bandgap (Eg) can be obtained by extrapolating the linear portion to the photon energy axis as shown in the Fig. 4. The bandgap was calculated and found to be 1.46 eV which is optimized bandgap for CdTe absorber material.
3.3. I–V characteristics The I–V measurement was performed on FTO/CdS/CdTe/Te/Aluminum device of area, i.e., 3 mm 3 mm.
Fig. 3. Transmittance spectrum in the wavelength range 200–1000 nm of the fabricated device (Glass/FTO/CdS/CdTe/Te).
Fig. 2. Schematic Energy Band diagram of the Device.
Please cite this article as: R. Venkatesh, N. R. Banapurmath, K. Ramesh et al., Enhancement of open circuit voltage of CdTe solar cell, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2019.09.035
R. Venkatesh et al. / Materials Today: Proceedings xxx (xxxx) xxx
3
the extracted voltage i.e. open-circuit voltage (Voc) was 0.7 V or 700 mV was higher than previously reported results [8,10,11,12], though the difference in preparation methods and thickness of the devices. Tellurium has work function of 4.7 eV which lies between CdTe (5.01 eV) and aluminium (4.3 eV) electrode which helps in reduces the defect states between CdTe and Al electrode and influence the flawless charge transport by the quality of interfaces. Also, tellurium helps in improving the electrical properties of CdTe. The number of layers was more so the series resistance was high. This series resistance reduces current flow through the device which causes less current extraction. C. Hernandez et al reported same work without tellurium layer and shows the Voc of 418 mV [4] and our work has shown the Voc of 700 mV with tellurium layer between CdTe and aluminium layer without CdCl2 treatment which is comparable to C. Hernandez et al report. Fig. 4. Plot of (ɑhm)2 vs photon energy (hm) for the evaluation of energy band gap of CdTe thin films.
4. Conclusion We fabricated glass/FTO/CdS/CdTe/Te/Al superstrate structured solar cell completely by thermal evaporation technique. A 40 nm thin layer of Tellurium was introduced to reduces the potential energy barrier between CdTe and Al electrode. Tellurium has good band alignment with CdTe and P-type material which reduces the interface defects and reduces the potential barrier between CdTe and Aluminum electrode which helps in extracting more voltage from the device. After careful observation and calculation, we could observe that the open circuit voltage of about 0.7 V was observed which is high compared with previous reports, though the other parameters such as Isc, FF and the efficiency were less though we do not conduct CdCl2 for our device to improve the crystalline size. Our work here gives another way to improve the performance of the CdS/CdTe solar cell. Acknowledgements
Fig. 5. I–V response of the FTO/CdS/CdTe/Te/Al solar cell.
The efficiency of the fabricated solar cell has been measured using solar simulator under 1000 W/m2 (1 sun) incident power and 1.5 AM solar light spectrum with keithley 2400 sourcemeter. Two flawless dark and light illumination curves were obtained by sweeping the voltage from 1 to 1 V in dark and light illumination (AM 1.5) conditions shown in Fig. 5. The measurement system was calibrated using crystalline silicon solar cell with known efficiency (9%) and J-V parameters. The fill factor (FF) and the efficiency were calculated from the Eqs. (1) and (2) [8,9]:
FF ¼
V max Imax V oc ISc
Efficiency ðgÞ ¼
ð1Þ FF: V oc : Isc Pinput
ð2Þ
The Voc = 0.7 V or 700 mV, Isc = 0.23 mA, fill factor is 28% and efficiency is 0.54% were obtained from the prepared solar cell. The observed curve shows the high Voc but there was low current extraction. The curve is almost straight which is because of the series resistance of the solar cell. The parasitic resistance (series, shunt resistance) of the solar cell effect is higher, which in turn affects the fill factor [19] and it is low, about 28%. Even when the fabricated device generated less Isc, fill factor and efficiency but
Funding Support from KLE Technological University, Hubbali is greatly acknowledged. Authors would Thank Dr. Pumlian Munga, Assistant Professor, Department of Physics, Jamia Millia Islamia (Central University), New Delhi, India for his valuable discussion for this work. References [1] Min Wang, Xun Li, Deliang Wang, Eur. Phys. J. Appl. Phys. 83 (2018) 20101. [2] G. Kartopu, A.J. Clayton, W.S.M. Brooks, S.D. Hodgson, V. Barrioz, A. Maertens, D.A. Lamb, S.J.C. Irvine, Effect of window layer composition in Cd1-xZnxS/CdTe solar cells, Prog. Photovolt. 22 (2014) 18–23. [3] M.A. Green, K. Emery, Y. Hishikawa, et al., Solar cell efficiency tables (version 50), Prog. Photovolt Res. Appl. 25 (7) (2017) 668–676. [4] C. Hernández Vásquez et al., Mater Res. Express 4 (2017) 086403. [5] Judith Schaffner, Markus Motzko, Alexander Tueschen, Andreas Swirschuk, Hermann-Josef Schimper, Andreas Klein, Thomas Modes, Olaf Zywitzki, Wolfram Jaegermann, J. Appl. Phys. 110 (2011) 064508. [6] Ruilong Yang, Dezho Wang, Lei Wan, Deliang Wang, RSC Adv. 4 (2014) 22162– 22171. [7] Abdul Wahab S.Z. Lahewil et al., Proc. Eng. 53 (2013) 217–224. [8] T. Gaewdang, N. Wongcharoen, T. Wongcharoen, Energy Procedia 15 (2012) 299–304. [9] Arturo Morales-Acevedo, Solar Energy 80 (2006) 675–681. [10] W. Lee, J. Sharp, G.A. Umana-Membreno, J. Dell, L. Faraone, Deposition heating effect on CdS thin films prepared by thermal evaporation for CdTe solar cells, 2014 Conference on Optoelectronic and Microelectronic Materials & Devices, Perth, WA, 2014, pp. 153–155. [11] Suha A. Fadaam et al., Energy Procedia 157 (2019) 635–643. [12] Z.-B.K. Gutierrez, G. Zayas-Bazán, P. de Melo O, et al., CdS/CdTe heterostructures for applications in ultra-thin solar cells, Materials (Basel) 11 (10) (2018) 1788.
Please cite this article as: R. Venkatesh, N. R. Banapurmath, K. Ramesh et al., Enhancement of open circuit voltage of CdTe solar cell, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2019.09.035