Thin Solid Films 369 (2000) 233±239
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Epitaxial silicide interfaces in microelectronics R.T. Tung*, S. Ohmi 1 Lucent Technologies Bell Labs, Murray Hill, NJ 07974, USA
Abstract The need for low-resistance, shallow contacts in Si-based microelectronic devices has driven the search for fabrication techniques of epitaxial silicides which are compatible with the manufacturing environment. For ultra large scale integration (ULSI) applications, techniques such as high temperature sputtering (HTS), Ti-interlayer mediated epitaxy (TIME), and oxide mediated epitaxy (OME) have shown varied degrees of success, and also problems. In this paper, a number of modi®cations aimed at simplifying the OME technique will be presented. New experimental results regarding HTS on sloped Si surfaces will also be described which suggest possible improvement to the HTS technique. q 2000 Elsevier Science S.A. All rights reserved. Keywords: Oxide mediated epitaxy; Epitaxial silicide; Ti cap; CoTi alloy; CoSi2, High temperature sputtering
1. Introduction The epitaxial growth of silicides on Si has been investigated since the 1970's [1,2] but initially only out of scienti®c interest [3]. Extensive studies on the nearly perfect interfaces between epitaxial silicides and silicon led to a dramatic demonstration of the correlation of the Schottky barrier height (SBH) with the interface atomic structure. Readers are referred to a recent review [4] for a discussion of how such a correlation rocks the very foundation of established SBH concepts, including the well-known Fermi level pinning concept. On the practical side, however, attempts to ®nd suitable applications for epitaxial silicides have not been very successful. The often-discussed metal base transistor (MBT) has proved to be unrealistic to implement with thin epitaxial silicide layers [5]. Isolated uses of epitaxial silicides in novel devices [6] have thus far attracted only scienti®c interest. The lack of interest in epitaxial silicides for large scaled applications is understandable. Epitaxial silicides are usually dif®cult to fabricate and their fabrication is thought to involve techniques which are incompatible with typical fabrication environment [7,8]. Due to some recent discoveries, however, these perceptions are no longer accurate.
* Corresponding author. E-mail address:
[email protected] (R.T. Tung). 1 Present address: P & I Laboratory, Tokyo Institute of Technology, 4259 Nagatsuta, Midori-ku, Yokohama, 226-8503, Japan.
Silicides are widely used in Si ultra large scale integration (ULSI) devices as contacts, gates, and interconnects. The main advantage of silicide thin ®lms is the low sheet resistance they offer and, from that respect alone, it seems unimportant whether the silicide ®lms are epitaxial or polycrystalline. However, epitaxial silicide layers have an increasing advantage over polycrystalline silicide layers when junction depths continue to shrink. The good layer uniformity and high thermal stability of epitaxial silicide, due to favorable interface energetics and the absence of grain boundaries, are very attractive for shallow junction formation. Therefore, the development of reliable and convenient epitaxial silicide technologies is likely to be important for sub 0.1 mm devices. Ti silicide is presently the most popular self-aligned silicide (salicide) for high-performance ULSI devices. It is, however, dif®cult to process TiSi2 devices with a gate length shorter than 0.25 mm, because of the well-known phase transformation problem in narrow silicide lines [9]. An apparent replacement for TiSi2 is CoSi2, which forms easily, even in narrow geometries. CoSi2 is also one of the silicides which are known to grow epitaxially on Si, although layers processed under usual fabrication conditions are usually non-epitaxial. As far as shallow junction formation is concerned, CoSi 2 has the additional advantage that it can be used as a doping source (SADS) [10], thus avoiding the problem of transient enhanced diffusion (TED) of implanted dopants [11]. In recent years, there have been important developments in the fabrication technologies of epitaxial silicides. Three
0040-6090/00/$ - see front matter q 2000 Elsevier Science S.A. All rights reserved. PII: S 0040-609 0(00)00814-2
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techniques, high temperature sputtering (HTS), Ti-interlayer mediated epitaxy (TIME), and oxide mediated epitaxy (OME) have demonstrated the capability to produce epitaxial CoSi2 using only conventional tools. These techniques are not without serious shortcomings, however. HTS leads to partially epitaxial growth of CoSi2 on heavily doped Si [12,13] but growth by HTS on lightly doped Si only leads to polycrystalline ®lms. Thus, the HTS technique cannot generate epitaxial silicide ®lms for SADS-related applications. TIME leads to single crystal CoSi2 layers on lightly doped and p 1Si, [14] but TIME is plagued by a void formation problem at the edges of oxide patterns [15,16]. This voiding problem, to which there are no known solutions, essentially excludes the TIME technique from further consideration for real applications. OME allows the growth of single crystal CoSi2 layers and successfully avoids the void formation problem, but this technique is complicated as it involves repeated deposition and annealing procedures for silicide layers more than 10 nm thick [17,18]. In this work, a few modi®cations of the OME technique are presented which have allowed thick (,20±40 nm) epitaxial CoSi2 layers to be grown in one or two deposition sequence(s). The effectiveness of (a) thin Ti cap, (b) thin Ti blocking layer, (c) co-deposition of metal-rich CoSix, and (d) co-deposition of CoTix on the epitaxial growth of CoSi2 in a single deposition sequence is discussed. The high quality of epitaxial CoSi2 ®lms in a two-step process is demonstrated. Some preliminary results from this work can be found elsewhere [19] and will not be repeated here. New results concerning the growth of HTS CoSi2 on narrow Si regions are also presented which show that a slight surface misorientation could improve the epitaxial formation on lightly doped Si. The implications of these results on the possible implementation of epitaxial silicide in microelectronic devices are discussed. 2. Experimental procedures A variety of patterned and unpatterned Si(100) wafers were used in the present studies. Substrates intended for OME growth were cleaned chemically, ending with the growth of a thin protective oxide layer on the exposed Si surface in a peroxide bath [18]. A ®nal dilute HF dip was given to substrates intended for HTS processing. Substrates were transferred to an ultrahigh vacuum evaporation system and properly degassed before metal deposition(s). Cobalt, silicon and titanium were e-beam evaporated from individually controlled sources, while the pressure in the growth chamber remained below 1 £ 10 29 Torr. Throughout this paper, a 1 nm* thick CoSix or CoTix layer is de®ned as a mixed layer, with the said composition, which contains the equivalent of 1 nm of pure Co (9 £ 10 15 atoms cm 22). Anneals were carried out in UHV or in a side chamber back®lled with ultra-high purity gas, without breaking vacuum.
3. Experimental results 3.1. Modi®ed oxide mediated epitaxy With pure Co, formation of epitaxial CoSi2 is limited to ,1±3 nm Co by OME [18]. When a Ti cap is added to the OME process, the maximum thickness of CoSi2 layer which can be grown in a single deposition step is found to increase signi®cantly, in agreement with an earlier report [20,21]. A Ti or TiN cap has previously been shown to eliminate bridging problems in cobalt salicide process [22], presumably through the reduction of surface diffusion. The Ti cap in particular, getters oxygen and improves Co silicide formation near the edges of the oxide pattern [23,24]. It is also known, however, that, with Ti, the formation of ternary CoxTiySiz silicide reduces the amount of Co taking part in the Co silicide reaction. Anneals were usually carried out in nitrogen to alleviate this problem. The present study shows that a relatively thick Ti cap is needed for the epitaxial growth of thick CoSi2 layers by OME [19]. Shown in Fig. 1a is the (200) dark-®eld TEM image of an epitaxial CoSi2 layer grown from 7.5 nm Co, with a 10 nm thick Ti cap. The epitaxial (100) orientation is found for the vast majority of this ®lm, although defects are still clearly detectable. Even though Ti caps could lead, under suitable conditions, to CoSi2 ®lms which are dominated by epitaxial orientation in one deposition step, the thickness of these ®lms are often not uniform, as evidenced by the mottled contrast of Fig. 1a. The cross-sectional TEM images of Fig. 2, from a thinner silicide stack, show that the surface of the sample appears to be ¯at, but a severe modulation of the depth of the silicide-Si interface is present. There seem to be large inclined facets as well as voids at the interface. It should be pointed out that void formation in OME samples grown with Ti caps depends on many variables, and that it usually is signi®cant only for thinner samples after a high temperature (.7008C) anneal. Void formation can be signi®cantly reduced through optimized annealing and etching processes. A continuous, heavily oxidized, TiN layer was found to cover the surface of the epitaxial CoSi2 layer after an anneal in nitrogen, as shown by the dark ®eld image of Fig. 2b, which also reveals that the silicide layer overwhelmingly occupies the epitaxial orientation. To reduce the interface roughness of OME layers grown with Ti capping, a thin Ti `blocking' layer has been found effective. When a thin Ti layer, 0.5 nm thick, was inserted in the as-deposited Co layer, the uniformity of the epitaxial layer improved signi®cantly. Since the maximum amount of Co, which could react into uniform epitaxial CoSi2 in the OME process was about 2±3 nm, the Ti blocking layer was chosen to be inserted at such a distance from the original Si surface. Cross-sectional TEM showed that an essentially smooth interface was grown with such a blocking layer [19]. Planview TEM (Fig. 1b) and RBS channeling (not shown) also indicated that layers grown with a Ti blocking layer generally have higher crystalline quality, in terms of
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Fig. 1. Planview, (200) dark ®eld, TEM images of epitaxial CoSi2 layers grown on oxidized Si(100) from the depositions of (a) 7.5 nm Co and 10 nm Ti and (b) 3 nm Co, 0.5 nm Ti, 4.5 nm Co and 6 nm Ti. An anneal of 10 min at 6508C in nitrogen was performed.
epitaxial fraction and layer uniformity, than layers grown with only Ti cap. It should be pointed out, however, that even though a Ti layer as thin as 0.5 nm is presently shown to effectively improve the OME process, the insertion of a Ti layer of such a thickness at the beginning of the OME process, i.e. on the oxide-covered Si prior to cobalt deposition, led to non-uniform formation of silicide and poor epitaxy. To grow epitaxial ®lm (by TIME), a much thicker Ti interlayer (.4 nm) is usually needed [16]. As previously
Fig. 2. Cross-sectional TEM images of an epitaxial CoSi2 layer grown on oxidized Si(100) from the depositions of 5 nm Co and 3 nm Ti, and the annealing at 7508C in nitrogen. (a) Bright ®eld and (b) (200) dark ®eld.
reported [18], co-deposition of CoSix with a Co-rich ratio could lead to the growth of thick epitaxial CoSi2 layers in one deposition step by OME. It is known that the combination of CoSi0.5 co-deposition, Co pre-deposition (2 nm) and Ti capping (2 nm) could lead to the growth of high quality epitaxial CoSi2 layers with a channeling minimum yield of ,6% [19]. However, epitaxial CoSi2 layers, as grown from co-deposited CoSix, are not very uniform, as shown by the cross-sectional TEM images of Fig. 3. Post-growth annealing can signi®cantly reduce the interface roughness in these ®lms. The uniformity of OME layer grown from co-depos-
Fig. 3. Cross-sectional, (200) dark ®eld, TEM images of epitaxial CoSi2 layers grown by the depositions of (a) 2 nm Co, 3 nm* CoSi0.5, and 4 nm Ti (b) 3 nm Co, 13 nm* CoSi0.5, and 4 nm Ti. These layers were annealed at 7008C for 2 min.
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Fig. 4. Cross-sectional TEM image of a silicide/cap stack grown with the depositions of 10 nm* CoTi0.2 and 2 nm Ti and anneals in nitrogen at 6508C for 10 min and 8008C for 30 s.
ited CoSix layers can also be improved by inserting a thin Ti blocking layer between Co and CoSix layers [19]. Due to the obvious incompatibility with self-aligned formation, techniques involving co-deposited CoSix are not expected to have much impact on ULSI device fabrication. Co-deposition of CoTix, with x , 1, was found to support the OME process, in agreement with a recent report [25]. Shown in Fig. 4 is a cross-sectional TEM image of an epitaxial layer grown by the depositions of 10 nm* CoTi0.2 and 4 nm Ti and a nitrogen anneal. The CoSi2
Fig. 5. Planview, (200) dark-®eld, TEM images of epitaxial CoSi2 layer grown in two steps in Si(100) areas de®ned by a 300 nm thick ®eld oxide pattern. A thin template was ®rst grown by OME using 2 nm Co. Depositions of (a) 5 nm Co and 3 nm Ti, and (b) 8 nm Co and 3 nm Ti were then performed, followed by an anneal in nitrogen.
layer shown in Fig. 4 appears to be uniform in thickness, although it has not been uncommon to ®nd CoSi2 layers, asgrown from CoTix alloy, to display a considerable degree of interface roughness. Epitaxial growth has been achieved with Ti concentration as small as 5%. Co-deposited CoTix has also been used as interlayer, i.e. placed between the oxidized Si and a Co layer, for OME growth. However, without the thin oxide layer on the Si surface, the use of CoTix alloy did not lead to good epitaxial growth, in agreement with an early report [26]. It was also noted that reversing the deposition order, e.g. the deposition of 2±3 nm Co followed by the deposition of a CoTix alloy layer, led to poor epitaxy and poor ®lm morphology. OME with a single deposition sequence is a simple process, but the elimination of defects and the growth of completely epitaxial ®lm have been dif®cult to achieve. OME growth by template, on the other hand, produces high quality, entirely epitaxial, silicide ®lms, but the template procedures are tedious as many deposition and annealing steps are involved. A two-step scheme may represents the right compromise between these two extremes Following the growth of an initial template by the usual OME procedures, a second deposition supplies the rest of the Co, with a Ti cap, necessary to achieve the ®nal desired CoSi2 thickness. A second anneal then completes the growth of thick epitaxial CoSi2 layers. Shown in Fig. 5 are planview TEM images of epitaxial CoSi2 layers grown by such a two-
Fig. 6. Planview, (220) bright-®eld, TEM images of a 22 nm thick CoSi2 layer grown by HTS in unimplanted, single crystal Si(100) areas de®ned by a 200 nm thick polycrystalline Si gate stack (darker areas). (a) Moire fringes are observed for the majority of CoSi2 layer formed in narrow Si lines. (b) Polycrystalline structure is observed for CoSi2 in the central portion of a wide Si area.
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Fig. 7. Planview dark-®eld TEM images of the same area of a 22 nm CoSi2 layer grown by HTS. A post-silicidation implantation of 1E15 As, 4 kV and an anneal at 9008C for 100 s have also been carried out. (a) (200) dark-®eld, exciting (100) oriented epitaxial silicide regions. Images of (b) and (c) are formed with type B-related (113) spots found by tilting the sample and they indicate the locations of {221} oriented epitaxial CoSi2.
step OME process on Si lines separated by ®eld oxide. These CoSi2 layers appear to be completely epitaxial and quite uniform in thickness. In the (200) dark-®eld image of Fig. 5a, patches of lower contrast have been analyzed and determined to have approximately the (100) orientation, but with a slight rotation (,1±28) from the exact epitaxial orientation. The origin of the small misorientation in these grains is not clear, although it apparently can be eliminated by a high temperature anneal and, therefore, is not expected to affect the thermal stability of the epitaxial ®lm. After the initial OME growth of template, the second deposition could alternatively consist of a co-deposition of a CoTix alloy and a thin Ti cap. Very high quality epitaxial CoSi2 layers have also been fabricated using the latter method. 3.2. HTS in narrow Si regions When Co was deposited at elevated temperature on lightdoped, planar Si(100), annealing ordinarily leads to the growth of essentially polycrystalline CoSi2, an example of which is shown in the planview TEM image of Fig. 6b. A
polycrystalline structure with an average grain size of ,200 nm was found at the central portion of a wide single crystal Si(100) region. The pattern in Fig. 6 was formed with a 4 nm gate oxide/200 nm thick polycrystalline Si gate stack and a 100 nm thick oxide spacer. CoSi2 grains near the edges of the pattern, however, display Moire fringes under (220) bright ®eld imaging condition (Fig. 6b). On narrow Si regions, Fig. 6a, the majority of the CoSi2 layer displays Moire fringes, indicating a set of planes, apparently the CoSi2(220), are parallel to the Si(220) planes. Detailed analyses, shown in Fig. 7, revealed that three dominant orientations are present for CoSi2 layers grown in narrow Si lines. They are the usual CoSi2[100]//Si[100] orientation, excited in the (200) dark ®eld image of Fig. 7a, and two variants of the CoSi2[122]//Si[100], CoSi2[02Å2]//Si[022] orientations, separately revealed in Fig. 7b,c. Dark ®eld images of Fig. 7b,c were formed with (311) beams of CoSi2, which were found when the sample was tilted away from the (100) zone axis by about 88, along either the [022] or the [02Å2Å] direction, respectively, perpendicular to the silicide lines. There is an obvious preference for one particular CoSi2(122) orientation on one side of the pattern,
Fig. 8. Cross-sectional TEM image of a 22 nm CoSi2 grown by HTS on Si(100) patterned with a 4 nm gate oxide/200 nm polycrystalline Si/100 nm oxide sidewall stack.
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and vice versa. These orientations are twin-related (type B orientation) to the inclined Si{111} planes and are likely the result of a slight slope near the edge of the sidewall. The cross sectional TEM image of Fig. 8 con®rms the presence of a slight slope near the edges of the pattern, likely due to a slight over-etch of the spacer layer. It is thus shown that the HTS process is sensitive to the orientation of the Si substrate and majority epitaxial ®lms can be produced by the HTS technique on lightly-doped, yet misoriented, Si(100). 4. Discussion The role played by the thin oxide layer in promoting epitaxial growth in the OME process has generally been thought to be that of a cap and a diffusion barrier [17,27,28]. The initial nucleation of epitaxial CoSi2 is likely enhanced by the constrained reaction con®guration underneath a cap. After the formation of epitaxial CoSi2 in the initial stage of the reaction, the success of the epitaxial growth depends on a survival of these epitaxial regions during subsequent reactions. A slow supply rate of Co prevents the epitaxial regions from being consumed in parallel CoSi or Co2Si reactions. In the original OME scheme, the supply rate of Co was essentially controlled by the limited amount of the deposited Co. During template growth, the supply rate of Co was also arti®cially curbed by the supply of only small amounts of Co to this reaction at one time. It is likely that the presence of a Ti cap or a dilute CoTix alloy increased the thickness of OME CoSi2 layer by a similar mechanism, namely, a slow-down of the Co supply rate or its diffusion speed. The initial reaction/intermixing of deposited Co with the Ti cap likely limited the subsequent supply of cobalt toward the Co silicide reaction. Present results from co-deposited CoTix can also be explained by a reduced reaction rate. It is interesting to note that, without the thin silicon oxide layer to promote OME, CoTix alone does not lead to epitaxial CoSi2 growth. The effectiveness of a Ti blocking layer in the present study likely also stems from a reduced diffusion rate of the Co. When CoSix is used in the OME process, the silicide reaction across the original Si interface is limited to only CoSi2, and hence the reaction rate issue is no longer relevant. However, the use of codeposited CoSix is not compatible with self-aligned silicide formation. The main function of Ti being added to the OME process seemed to be to control the Co diffusion kinetics. It is clear that the reaction kinetics depends on many parameters in addition to the as-deposited pro®le. The annealing temperature, the temperature ramp rate, and the annealing ambient, etc. may all affect the silicide reaction. With an optimally designed Co/Ti deposition pro®le and a well controlled annealing temperature pro®le, it is possible that the OME process can be controlled to the point that essentially uniform, single crystal, and thick CoSi2 layers can be grown with a single deposition sequence. However, the
present results showed that such a level of control is dif®cult to achieve within a single deposition sequence. Two-step processes separate the nucleation step of the OME from its growth (thickening) process, allowing each step to be individually optimized. As a result, the crystalline quality of CoSi2 layers grown by two-step processes is much higher than that from one-step processes. Since OME templates can be grown by sputtering, it is conceivable that the entire two-step OME process can also be carried out in a sputtering tool. The introduction of Ti into the OME process widens the process window, but it may create issues with void formation on patterned Si [15,16]. A connection of void formation to the stress in Si was recently hypothesized [29]. The voiding problem in the TIME case was most serious when thick Ti interlayers, typically 5±10 nm, were used. It is thus expected that the voiding problem in OME will also be most signi®cant for processes involving large amounts of Ti, and that it may be alleviated for growth with a small amount of Ti. Fig. 2 illustrates an extreme case of void formation with a thick Ti cap. One notes that the total amount of Ti used in OME with dilute CoTix alloy can be reduced to ,2 nm. The use of two-step processing further reduces the need for extensive use of Ti. Preliminary studies have not produced evidence for voids at oxide edges for one-step OME with dilute CoTix, nor for OME layers processed in two steps. These observations suggest that dilute CoTix layers or interlayers, combined with OME, may offer good chance for epitaxial silicide processing for ULSI applications. HTS is an established Co salicide technology. The ability for HTS to generate epitaxial CoSi2 layers on heavily doped single crystal Si(100) has thus far been viewed as a side issue. In any event, the formation of polycrystalline CoSi2 by HTS on lightly doped Si negates the advantages HTS has over other Co salicide processes from the standpoint of SADS. The present results, however, showed an interesting dependence of the epitaxial formation of HTS on the surface orientation of the Si substrate. This shows that on faceted Si, such as selectively grown Si, or slightly roughened Si surface, a signi®cant degree of epitaxy can be expected from CoSi2 layers processed by the HTS technique. This phenomenon may have a bearing on the design of low-resistance, shallow junctions, especially when SADS is considered.
5. Summary Recent progress in fabrication technologies have put epitaxial silicide contacts within reach under conventional processing conditions. Various modi®cations to the OME process have simpli®ed the procedures to produce high quality epitaxial CoSi2 layers. It is also possible to generate epitaxial CoSi2 layers by HTS on lightly doped Si. Low-
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