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Explanatory Notes on the Test System Used for UL1449 3rd Ed. Related Tests Done at Waikato Uni HV Labs
Appendix A
Explanatory Notes on the Test System Used for UL1449 3rd Ed. Related Tests Done at Waikato Uni HV Labs
A.1 General The document below is developed as an aid to explain the test set-up used at the UOW HV-Test-Lab while testing the Smart TV IQ2 product.
A.2 Noiseken LSS and Its Monitoring Outputs It is important to note at the first instance that the Noiseken LSS 6130/6230 [6.6 kV/3.3 kA testers], whose internal circuit diagram is depicted in Fig. A.6, has two monitoring outputs for the following: 1. Voltage output—It is via a voltage divider of three resistors, where the middle resistor voltage is supplied to the oscilloscope via an isolation transformer unit. 2. Current output—This is via a current transformer which is to monitor the overall loop current through the DUT. However, the voltage measurement channel under Item 1 above is considered part of the loop current. We have measured the loop current via this current transformer, with the DUT port kept open, and it reads about 138 A (peak) and this reading is directly related to the current through the voltage monitoring channel. All commercial LSS systems have a setting based on the highlighted area in brown dotted lines, as in Fig. A.6 where a set of resistors and capacitors are injected or removed from the loop for respective loop current and VPR measurements. 199
200 Appendix A
As per our observations, the peak voltage reading at the DUT, fed into the oscilloscope, reads a value less than the set voltage on the front panel of the LSS. For example, as depicted in Fig. A.2A which indicates the voltage at the 0.5 ohm resistor (wire-wound version of 10 W capability) [VLR] in yellow, voltage at the monitoring channel [LSV] in purple plotted against the injection voltage setting of the LSS. For example, when the LSS output is set to 6.6 kV (UL requirement of voltage), monitoring output shows only 3.76kV with a loop current of 2760 A. This simply indicates the relationship between the LSS set voltage versus the voltage measured at the voltage monitoring output of the LSS. Fig. A.2C shows the loop current through the test loop in green when the DUT connected is a 0.5 ohms resistor. For example, when the voltage setting of the LSS is at 6.6 kV, loop current read is 2760 A. Brown and blue graphs show the cases with short-circuited DUT and a DUT of 1.0 ohms. As shown in Fig. A.4, when the LSS output put is kept open, [i.e., DUT not connected], shows a loop current 138 A at the set voltage of 6.6 kV. This is due to the effect of the voltage monitoring output of the LSS loaded by the oscilloscope probe capacitance, and so on. This measurement shows the case of how the measurements and the waveforms on the scope relates to the calibrated voltage output set (UL 1449 Ed 3 requirement) on the LSS and the worst case current through the loop (typically of 3 kA). As we see from Fig. A.2C measured loop current depends on the value of the DUT, since the total loop impedance is composed of multiple components such as: l l l
l
Internal resistance of the high voltage source of the LSS Wave-shaping circuit of the LSS Coupling circuit at the LSS output (which is composed of a combination of 10 ohms resistor, and two 9 μF capacitors) Path resistances and inductances created by the connections
In addition to all above the input impedance of the DUT will get added and the equivalent circuit of a fired MOVs has a parallel combination of a capacitance and a resistance (of few ohms). In Fig. A.1, Zp will include the effect of the coupling circuit as well. It is important to note that, when a fully assembled SPD is tested, the loop current will depend on the effective input impedance of the SPD under fired condition, where we record the VPR value at the output of the SPD. So this value will be slightly different to the reading from the current monitoring output of the LSS.
A.3 Equivalent Simplified Circuit for LSS Fig. A.1 is a simplified case of a LSS internal circuit diagram, showing the effect of various internal impedances which affects the total loop resistance
Appendix A
Zp
Zs
201
L
Voltage monitor
Surge generator 6.6 kV
Current monitor
N
FIG. A.1 LSS internal simplified circuit diagram (Zs—internal series impedance, Zp—path series impedance).
during a measurement, and its voltage monitoring and current monitoring outputs, providing electrical isolation for the oscilloscope input channels. The maximum current which can be drawn when the L and N terminals of the LSS are short circuited is 3.42 kA (higher than the UL value of 3000 A) and the monitored voltage through LSS monitor is 3.8 kV (for a front panel setting of 6.6 kV). If you open the short circuit, LSS voltage monitoring channel output rises to 7.6 kV.
A.3.1 Calibration Measurements: Based on a Constant 10 W Wire Wound Resistors Used as the DUT (Load) Voltage across the load resistor—VLR Voltage at the output of the LSS (LSS Monitor Output)—LSV Loop Current (LSS Monitor Output)—LSLC (Fig. A.2)
A.4 Additional Measurements Done to Confirm the Validity of Above Data For our own understanding and to make sure that simplifications used for Fig. A.1 are valid, we have done some additional measurements to establish the variation of the total loop resistances with applied surge voltage, as well as the effect of vertical channel setting on the leakage current measurement.
A.4.1
Loop Resistance in the Closed Circuit Loop
Characteristics of the 0.5 ohms closed loop circuit have been measured to investigate about the resistivity of the loop circuit. Fig. A.1 shows the simplified case of the measurement loop, showing the simplified model of the surge generator, connection path resistances, and the relative locations of the monitoring points
202 Appendix A
(A)
(B)
(C) FIG. A.2 (A) Measured voltages against surge injection. (B) Oscillographs at 6.6 kV Surge to a 0.5 ohms resistive load. (C) Monitored current in at different loads (DUTs of 0.5 ohms, 1.0 ohms and a short circuit).
within the measurement systems. As we see from the graphs of Fig. A.3, there is a small variation of the total loop resistance with the applied surge voltage. However, this variation is due to simplification that all impedances within the loop are considered resistive and linear.
A.4.2 Leakage Current Investigation In the open loop condition at the DUT, the results below show that some leakage current in the LSS can be directly monitored through the LSS Current sensor. This is mainly due to the case that the current monitoring channel always monitors current drawn by the voltage monitoring path of the LSS. Fig. A.4 shows the effect of vertical channel setting of the Tektronix TPS 2014 versus the leakage current reading, which leads to the conclusion that approximately 138 A value shown in the Fig. A.4 is a reasonable estimate. This is due to multiple
203
Appendix A
Total loop resistance versus applied surge voltage, with a DUT of 0.5 ohms closing the loop 1.60
Resistance (Ω)
1.40
1.34 1.36 1.34 1.34 1.35 1.33 1.28 1.33 1.35 1.37 1.31 1.34 1.27 1.25 1.31 1.26 1.25 1.31 1.24 1.29 1.19 1.18 1.16
1.20 1.00 0.80
0.76
0.60
0.66 0.68 0.69
0.81 0.83 0.85 0.84 0.84 0.75 0.74 0.79
0.40 0.20 0.00 1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.6
Injection voltage (kV)
Path resistance
Loop resistance
Calculated loop resistance
FIG. A.3 Loop resistance investigation.
Leakage current in different resolution (6.6 kV injection with 18 uF coupling) 1200
Current (A)
1000
1000
800 600 480
400
240
200
180
152
140
138
138
0 5000
2000
1000
500
200
100
50
20
Resolution (Tektronix TPS 2014) FIG. A.4 Leakage current in different resolutions.
effects of the 8-bit resolution of the vertical channels combined with the probe effects at high voltage inputs.
A.4.2.1 Test Set-Up in the Lab (See Fig. A.5.)
204 Appendix A
(A)
(B) FIG. A.5 (A) Test set-up (Tektronics TPS2014, LSS 6230). (B) LSS-6230 (set to 6.6 kV Injection and 18 uF coupling).
A.4.2.2 Internal Circuits of the LSS-6130 Indicating Its Voltage and Current Outputs (See Fig. A.6.)
Appendix A
205
FIG. A.6 LSS internal circuit diagram.
206 Appendix A
A.5 Conclusion It can be observed that the open circuit waveform peak is 7.6 kV and the shortcircuit current is 3.42 kA for the setting of 6.6 kV on the front panel of the LSS. This means effective impedance is 2.21 ohms which satisfies the UL1449 effective impedance requirement. The test results of the Smart TVIQ2 show the current as 3 kA as the value through the device. Therefore, the injected voltage to the DUT is 6.63 kV.
Explanatory Notes on the Test System Used for UL1449 3rd Ed. Related Tests Done at Waikato Uni HV Labs
A.1 General The document below is developed as an aid to explain the test set-up used at the UOW HV-Test-Lab while testing the Smart TV IQ2 product.
A.2 Noiseken LSS and Its Monitoring Outputs It is important to note at the first instance that the Noiseken LSS 6130/6230 [6.6 kV/3.3 kA testers], whose internal circuit diagram is depicted in Fig. A.6, has two monitoring outputs for the following: 1. Voltage output—It is via a voltage divider of three resistors, where the middle resistor voltage is supplied to the oscilloscope via an isolation transformer unit. 2. Current output—This is via a current transformer which is to monitor the overall loop current through the DUT. However, the voltage measurement channel under Item 1 above is considered part of the loop current. We have measured the loop current via this current transformer, with the DUT port kept open, and it reads about 138 A (peak) and this reading is directly related to the current through the voltage monitoring channel. All commercial LSS systems have a setting based on the highlighted area in brown dotted lines, as in Fig. A.6 where a set of resistors and capacitors are injected or removed from the loop for respective loop current and VPR measurements. 199
200 Appendix A
As per our observations, the peak voltage reading at the DUT, fed into the oscilloscope, reads a value less than the set voltage on the front panel of the LSS. For example, as depicted in Fig. A.2A which indicates the voltage at the 0.5 ohm resistor (wire-wound version of 10 W capability) [VLR] in yellow, voltage at the monitoring channel [LSV] in purple plotted against the injection voltage setting of the LSS. For example, when the LSS output is set to 6.6 kV (UL requirement of voltage), monitoring output shows only 3.76kV with a loop current of 2760 A. This simply indicates the relationship between the LSS set voltage versus the voltage measured at the voltage monitoring output of the LSS. Fig. A.2C shows the loop current through the test loop in green when the DUT connected is a 0.5 ohms resistor. For example, when the voltage setting of the LSS is at 6.6 kV, loop current read is 2760 A. Brown and blue graphs show the cases with short-circuited DUT and a DUT of 1.0 ohms. As shown in Fig. A.4, when the LSS output put is kept open, [i.e., DUT not connected], shows a loop current 138 A at the set voltage of 6.6 kV. This is due to the effect of the voltage monitoring output of the LSS loaded by the oscilloscope probe capacitance, and so on. This measurement shows the case of how the measurements and the waveforms on the scope relates to the calibrated voltage output set (UL 1449 Ed 3 requirement) on the LSS and the worst case current through the loop (typically of 3 kA). As we see from Fig. A.2C measured loop current depends on the value of the DUT, since the total loop impedance is composed of multiple components such as: l l l
l
Internal resistance of the high voltage source of the LSS Wave-shaping circuit of the LSS Coupling circuit at the LSS output (which is composed of a combination of 10 ohms resistor, and two 9 μF capacitors) Path resistances and inductances created by the connections
In addition to all above the input impedance of the DUT will get added and the equivalent circuit of a fired MOVs has a parallel combination of a capacitance and a resistance (of few ohms). In Fig. A.1, Zp will include the effect of the coupling circuit as well. It is important to note that, when a fully assembled SPD is tested, the loop current will depend on the effective input impedance of the SPD under fired condition, where we record the VPR value at the output of the SPD. So this value will be slightly different to the reading from the current monitoring output of the LSS.
A.3 Equivalent Simplified Circuit for LSS Fig. A.1 is a simplified case of a LSS internal circuit diagram, showing the effect of various internal impedances which affects the total loop resistance
Appendix A
Zp
Zs
201
L
Voltage monitor
Surge generator 6.6 kV
Current monitor
N
FIG. A.1 LSS internal simplified circuit diagram (Zs—internal series impedance, Zp—path series impedance).
during a measurement, and its voltage monitoring and current monitoring outputs, providing electrical isolation for the oscilloscope input channels. The maximum current which can be drawn when the L and N terminals of the LSS are short circuited is 3.42 kA (higher than the UL value of 3000 A) and the monitored voltage through LSS monitor is 3.8 kV (for a front panel setting of 6.6 kV). If you open the short circuit, LSS voltage monitoring channel output rises to 7.6 kV.
A.3.1 Calibration Measurements: Based on a Constant 10 W Wire Wound Resistors Used as the DUT (Load) Voltage across the load resistor—VLR Voltage at the output of the LSS (LSS Monitor Output)—LSV Loop Current (LSS Monitor Output)—LSLC (Fig. A.2)
A.4 Additional Measurements Done to Confirm the Validity of Above Data For our own understanding and to make sure that simplifications used for Fig. A.1 are valid, we have done some additional measurements to establish the variation of the total loop resistances with applied surge voltage, as well as the effect of vertical channel setting on the leakage current measurement.
A.4.1
Loop Resistance in the Closed Circuit Loop
Characteristics of the 0.5 ohms closed loop circuit have been measured to investigate about the resistivity of the loop circuit. Fig. A.1 shows the simplified case of the measurement loop, showing the simplified model of the surge generator, connection path resistances, and the relative locations of the monitoring points
202 Appendix A
(A)
(B)
(C) FIG. A.2 (A) Measured voltages against surge injection. (B) Oscillographs at 6.6 kV Surge to a 0.5 ohms resistive load. (C) Monitored current in at different loads (DUTs of 0.5 ohms, 1.0 ohms and a short circuit).
within the measurement systems. As we see from the graphs of Fig. A.3, there is a small variation of the total loop resistance with the applied surge voltage. However, this variation is due to simplification that all impedances within the loop are considered resistive and linear.
A.4.2 Leakage Current Investigation In the open loop condition at the DUT, the results below show that some leakage current in the LSS can be directly monitored through the LSS Current sensor. This is mainly due to the case that the current monitoring channel always monitors current drawn by the voltage monitoring path of the LSS. Fig. A.4 shows the effect of vertical channel setting of the Tektronix TPS 2014 versus the leakage current reading, which leads to the conclusion that approximately 138 A value shown in the Fig. A.4 is a reasonable estimate. This is due to multiple
203
Appendix A
Total loop resistance versus applied surge voltage, with a DUT of 0.5 ohms closing the loop 1.60
Resistance (Ω)
1.40
1.34 1.36 1.34 1.34 1.35 1.33 1.28 1.33 1.35 1.37 1.31 1.34 1.27 1.25 1.31 1.26 1.25 1.31 1.24 1.29 1.19 1.18 1.16
1.20 1.00 0.80
0.76
0.60
0.66 0.68 0.69
0.81 0.83 0.85 0.84 0.84 0.75 0.74 0.79
0.40 0.20 0.00 1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.6
Injection voltage (kV)
Path resistance
Loop resistance
Calculated loop resistance
FIG. A.3 Loop resistance investigation.
Leakage current in different resolution (6.6 kV injection with 18 uF coupling) 1200
Current (A)
1000
1000
800 600 480
400
240
200
180
152
140
138
138
0 5000
2000
1000
500
200
100
50
20
Resolution (Tektronix TPS 2014) FIG. A.4 Leakage current in different resolutions.
effects of the 8-bit resolution of the vertical channels combined with the probe effects at high voltage inputs.
A.4.2.1 Test Set-Up in the Lab (See Fig. A.5.)
204 Appendix A
(A)
(B) FIG. A.5 (A) Test set-up (Tektronics TPS2014, LSS 6230). (B) LSS-6230 (set to 6.6 kV Injection and 18 uF coupling).
A.4.2.2 Internal Circuits of the LSS-6130 Indicating Its Voltage and Current Outputs (See Fig. A.6.)
Appendix A
205
FIG. A.6 LSS internal circuit diagram.
206 Appendix A
A.5 Conclusion It can be observed that the open circuit waveform peak is 7.6 kV and the shortcircuit current is 3.42 kA for the setting of 6.6 kV on the front panel of the LSS. This means effective impedance is 2.21 ohms which satisfies the UL1449 effective impedance requirement. The test results of the Smart TVIQ2 show the current as 3 kA as the value through the device. Therefore, the injected voltage to the DUT is 6.63 kV.