Failure modes and mechanisms of InP-based and metamorphic high electron mobility transistors

Microelectronics Reliability 42 (2002) 685–708 www.elsevier.com/locate/microrel

Failure modes and mechanisms of InP-based and metamorphic high electron mobility transistors Gaudenzio Meneghesso, Enrico Zanoni

*

Dipartimento di Elettronica e Informatica, Universita’ di Padova, Via Gradenigo 6/A and INFM Padova, 35131 Padova, Italy Received 7 February 2002

Abstract This paper reviews most recent results concerning reliability of InP-based and metamorphic high electron mobility transistors (HEMTs). Thanks to research work carried out in the last 10 years, a deeper understanding of failure mechanisms of these devices has been achieved, and process and technology solutions have been found for the control of premature breakdown (related to the reduced energy gap of InGaAs) and of parasitic effects, such as ‘‘kink’’ effects, and transconductance frequency dispersion. After a brief description of impact-ionization effects in InGaAs, an analysis of failure modes and mechanisms of InP and metamorphic HEMTs is carried out, including hot-carrier-induced degradation, gate sinking and Schottky/ohmic contact interdiffusion, hydrogen effects, and donor compensation due to fluorine atoms indiffusion. Results show that reliability of these devices is continuously improving, opening the way for applications in microwave and millimeter-wave systems. Ó 2002 Elsevier Science Ltd. All rights reserved.

1. Introduction In InGaAs-based high electron mobility transistors (HEMTs), the device characteristics are enhanced by increasing the indium content of the channel: the electron mobility, conduction band discontinuity and the two-dimensional electron gas carrier density all increase with increasing the In fraction of the Inx Ga1
x As channel. Inx Ga1
x As with 53% indium (In0:53 Ga0:47 As with a bandgap of 0.76 eV) is lattice-matched to InP, and can be coupled with In0:52 Al0:48 As as donor (Schottky) layer. The combination of In0:53 Ga0:47 As and In0:52 Al0:48 As, lattice-matched to InP, can provide a large density of the two-dimensional electron gas (2DEG); the conduction band discontinuity for these materials is 0.5 eV, which is almost twice that between GaAs and Al0:3 Ga0:7 As. Research and development of InP-based HEMTs started in the early 80s [1,2]. Already in 1988, the cut-off frequency (fT ) of state-of-the-art InP-based HEMTs was over 200

* Corresponding author. Tel.: +39-049-827-7658; fax: +39049-827-7699. E-mail addresses: [email protected], [email protected] (E. Zanoni), .

GHz, which was approximately 33% larger than the fT of state-of-the-art GaAs based HEMTs [3,4]. To further increase the mobility of the channel, the indium content of the channel can be increased beyond 52%, thus resulting in a pseudomorphic HEMT on InP. Since InP substrates are more expensive than GaAs substrates, various strategies have been developed in order to obtain ‘‘metamorphic’’ InAlAs/InGaAs heterostructures on GaAs suitable for HEMT fabrication. Epitaxy of strain-relaxed Aly In1
y As/Gax In1
x As on GaAs with good material quality can be achieved by means of a stepwise or continuous change of In content (and thus of lattice-constant) during the growth of a ternary Aly In1
y As or Gax In1
x As buffer layer and by the use of different growth temperatures. A quaternary Alx Gay In1
x
y As buffer layer can be used to compensate lattice misfit by varying the composition in step or linearly graded fashion. The relaxed buffer layer sequence acts as a new substrate, thus giving in theory the possibility of growing lattice-matched heterostructures with an arbitrarily chosen In content. For instance, Dammann et al. [5] have developed InAlAs/InGaAs HEMT on linearly graded metamorphic buffer on GaAs; the lattice mismatch between the HEMT layers and the GaAs substrate is approximately 3.8%, and is accomodated by dislocations which remain confined within the metamorphic

0026-2714/02/$ - see front matter Ó 2002 Elsevier Science Ltd. All rights reserved. PII: S 0 0 2 6 - 2 7 1 4 ( 0 2 ) 0 0 0 4 5 - 8

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buffer. Metamorphic devices have comparable performances and reliability to InP-based HEMTs. High In-content InGaAs-based HEMTs (latticematched and pseudomorphic HEMTs on InP, and metamorphic HEMTs on GaAs) currently offer record performances in terms of cut-off frequency and oscillation frequency; HEMTs on InP represent the leading devices for very low-noise millimeter-wave applications: their very high values of transconductance (800–1000 mS/mm for a 0:1 lm gate device, compared with 600 mS/mm for comparable GaAs pHEMT), high fT and fmax values, and low-source resistance are ideally suited for low-noise amplifiers, with noise figures lower than 1 dB at 60 GHz and 1.3 dB at 94 GHz. Even in the case of power applications there are a number of advantages of HEMTs on InP over GaAs-based devices: thermal conductivity is higher than GaAs, higher electron densities and electron velocities allow the achievement of higher current densities; composite-channel InGaAs/InP structures can be adopted, thus exploiting the high electron mobility of the InGaAs layer, and the high saturation velocity of InP [6]. The major hindrances to power applications of high In-content HEMTs are represented by the low gatedrain and channel breakdown voltage (due to the reduced energy bandgap of InGaAs), and by the low Schottky barrier height of the gate contact. By proper layer design, however, it is possible to overcome the drawbacks of InP-based HEMTs for power applications [7]. Optimization of the InP HEMT layer structure has led to the development of power HEMTs with state-ofthe-art power performance at microwave and millimeter-wave frequencies [6]. Output power densities of more than 1 W/mm with power-added efficiencies of about 60% have been reported at 4 and 12 GHz [8,9]. By using a composite channel-layer design and optimizing the Schottky layer, gate-to-drain breakdown voltages of more than 20 V have been reported for 0:25 lm gatelength high-performance InP-based HEMTs [9]. By adopting double-recess gate process, 0:15 lm gatelength HEMTs can achieve breakdown voltages as high as 19 V [10]. The higher In composition and higher velocity gives to InP-HEMTs a definite advantage for power devices at W-band, as compared to pseudomorphic HEMTs on GaAs [3]. Ingram and co-workers [11] have demonstrated a two-stage InP HEMT MMIC power amplifier with 427 mW of output power and 20% PAE, twice the PAE of P-HEMT parts with comparable output power, at 95 GHz [12]. The impact of quantization, channel thickness, composition and design, device layout on breakdown voltage of InP HEMTs has been elucidated by the recent works of Meneghesso and Somerville and their coworkers [13–17]. Much effort has also been devoted to the optimization of recess etching to achieve both high breakdown voltage and current capability [10,18]. Chen

et al. demonstrated InP HEMT with 7 V breakdown voltage for V-band operation; a 0.5 W MMIC power amplifier with 25% PAE was demonstrated at 62 GHz [19]. At Ka-band and below, GaAs P-HEMT’s currently dominate. InP HEMTs offer higher PAE and gain down to K-band, but GaAs P-HEMTs are currently preferred for power applications, because of their higher breakdown voltage and lower cost. At V-band, InP HEMTs show a definite advantage for applications in which both output power and PAE are important. At W-band and above, InP HEMTs are clearly the best three-terminal device technology available today for power applications [3]. InP-HEMTs can provide excellent performances for high-speed telecommunication systems and high-frequency wireless systems. For 40 Gbit/s optical fiber communication systems, InP HEMTs are applied to create and detect the high speed signals through the optical fiber. On the other hand, InP-based HEMTs also represent extremely interesting devices for millimeterwave frequencies (30–300 GHz). Frequencies centered around 35, 94 140 and 220 GHz are technologically interesting because the atmospheric absorption of propagated waves reaches a local minimum [4,6]. For opposite reasons, communication links in the 60 GHz range can be useful for local area wireless networks and for secure communication military or inter-satellite links, since the absorption peak due to oxygen molecules prevents the signals from broadcasting in a wide area. Moreover, the frequency range of 77 GHz is currently allocated for automotive millimeter-wave radar sensors for intelligent cruise control or collision avoidance systems. For all these applications, InP devices offer the best receiver sensitivities and operating frequencies. For the above mentioned reason, a large research effort has been spent in many laboratories throughout the world in the development of advanced InP HEMT structures. Recent developments include Sb-containing channel layers, graded channel composition, insertion of an InAs quantum-well inside the channel layer. Part of this effort has been devoted to improving device quality and reliability, an essential step towards practical use of these devices. This paper reviews most recent results concerning reliability of InP-based and metamorphic HEMT’s. After a brief description of impact-ionization effects in InGaAs, we will discuss anomalies in device characteristics like the infamous ‘‘kink’’ effect, which consists in an abrupt increase in drain current as the drain voltage is increased beyond a certain value, or in dependence of the transconductance on frequency (in the low-frequency range often below 1 MHz), usually identified as ‘‘low-frequency transconductance dispersion’’. Degradation due to hot-electron stress is then discussed, followed by the analysis of failure mechanisms more directly related to processing and technology

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Fig. 1. Schematic cross-section of an InP-based HEMT, identifying the location of possible failure mechanisms.

conditions: Schottky and ohmic contact degradation, hydrogen effects, and fluorine donor compensation. Fig. 1 shows a schematic cross-section of an InP-based HEMT, and identifies schematically the location of main failure mechanisms.

2. Impact-ionization effects in InGaAs 2.1. The impact ionization coefficient in In0:53 Ga0:47 As The In0:53 Ga0:47 As is lattice-matched on InP and, therefore, represents the natural choice for the channel of InP-based HEMTs or for the collector of InP-based HBTs. Its reduced energy gap, however, penalizes the value of the breakdown voltage in these devices; moreover, the behavior of the impact ionization coefficient of In0:53 Ga0:47 As as a function of electric field and temperature presents anomalies which further complicate the design of devices with high breakdown voltages. Fig. 2 refers to experimental data of the electron impact ionization coefficient a of In0:53 Ga0:47 As obtained by Canali et al. [20], compared with the experimental data of Ritter et al. [21] and with the Monte Carlo theoretical results of Bude and Hess [22]. For electric fields, E, lower than approximately 200 kV/cm, all data show a dependence of a on 1=E that is weaker than the usual exp ð
1=EÞ trend (see Fig. 2). Bude and Hess [22] explained this anomalous behavior in terms of the density of states in the conduction band of In0:53 Ga0:47 As. As opposed to GaAs, In0:53 Ga0:47 As is characterized by a low energy gap (0.75 eV) and a high separation between the L valley minimum and the Cvalley minimum (0.55 eV). An electron with energy just about the ionization energy threshold has its final state close to the minimum of the C-valley after an ionization event. The same is true for the ionized elec-

Fig. 2. Experimental data an (solid lines) in In0:53 Ga0:47 As as extracted from measured M-1 values in HBTs. The experimental data for an obtained by Ritter et al. [21] (filled circles) and the theoretical results by Bude and Hess [22] (open squares) are also reported.

tron. Whereas the density of states in the C-valley minimum is low, only a small number of final-state combinations satisfy the energy and pseudomomentum conservation at the same time. Consequently, the ionization rate is limited by the number of possible final states, and shows a weak dependence on the electric field until the energy of the ionizing electron is sufficiently high to allow the states in the L valley to become final states. From this point on, the number of possible final states increases dramatically, resulting in a much stronger dependence of the ionization rate on the electric field. Furthermore, as opposed to the behavior observed in most semiconductors, a reduction of the commonemitter breakdown voltage BVCE0 with increasing temperature has been observed in InGaAs/InP (which has a In0:53 Ga0:47 As collector) [21,23]. An increase of ionization current with temperature has also been reported in In0:53 Ga0:47 As-channel HEMTs [17]. Neviani et al. [24] studied the temperature dependence of the impactionization coefficient by means of In0:53 Ga0:47 As HBT’s. A positive temperature dependence of a is observed, as shown in Fig. 3 for an average electric field of 125 kV/ cm, which is opposite with respect to that observed in most other semiconductors. As an example, Fig. 3 also reports the corresponding bebavior of a measured in GaAs at a different field E ¼ 225 kV/cm. The ‘‘ordinary’’ behavior observed in GaAs, that is, the decrease of a with temperature, is attributed to temperature-enhanced phonon scattering that reduces the population of the primary electrons high-energy tail.

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inant role on a temperature behavior. This is clear from Fig. 4, in which the natural logarithm of a is plotted against Eg , showing a negative exponential relationship. At high electric fields, upper valleys start to be involved in the process and the temperature coefficient of the multiplication factor returns to negative (see Fig. 5). 2.2. Techniques for the control of breakdown effects in InP-based HEMTs Several research group have studied techniques and solutions aimed at improving both off-state and on-state breakdown voltage values of HEMT’s. The various proposed solutions are summarized in the following subsections. Fig. 3. Electron ionization coefficient an vs temperature measured in InGaAs at a fixed electric field F ¼ 125 KV/cm (open circles) and in GaAs at F ¼ 225 KV/cm (filled circles). Reprinted with permission from A. Neviani et al., IEEE Electron Dev Lett 1997;18. Ó 1997 IEEE, New York.

The positive temperature dependence of a in In0:53 Ga0:47 As can be linked, within the scheme proposed in [22], with the fact that impact ionization at low electric fields is limited in this material by the low density of states near the C-valley minimum and not by the number of primary electrons with energy above the ionization threshold. In this picture, temperature-increased phonon scattering, which reduces the population of the highenergy tail of the electron distribution, has little effect on the ionization rate. On the contrary, the reduction of the energy gap Eg (and thus of the ionization threshold energy) with inercasing temperature seems to play a dom-

2.2.1. Double recessed gate An improved off-state breakdown voltage can be obtained by using an undoped or depleted cap layer [25], but this has the drawback of increasing the drain (RD ) and source (RS ) parasitic resistances, thus possibly degrading microwave performance. The use of a doped cap layer (which reduces RS ) is, therefore, usually coupled with a wide double-recess gate trench, which reduces the electric field in the gate-drain region, thus improving onstate and off-state breakdown characteristics. By increasing the recess width, a spreading of the space-charge region is obtained, the electric field is lowered, and the breakdown voltage improves; however, source resistance and transconductance may degrade, so that a gate offset in the recess toward the source is usually realized [26].

Fig. 4. Electron ionization coefficient an vs energy gap EG in InGaAs at a fixed electric field F ¼ 125 KV/cm. Reprinted with permission from A. Neviani et al., IEEE Electron Dev Lett 1997;18. Ó 1997 IEEE, New York.

Fig. 5. Impact ionization coefficient of In0:53 Ga0:47 As vs. inverse electric field for different temperatures.

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Higuchi et al. [26] fabricated 0.66-lm gate length InAlAs/InGaAs HEMTs on GaAs. Devices were characterized by a single, wide recess; the extension of the gate-to-source and gate-to-drain distances Lr (measured from cap layer edges) was varied between 0.05 and 0:4 lm. Both the breakdown voltage and the maximum oscillation frequency were found to improve with Lr (due to electric field and gate-drain parasitic capacitance reduction, respectively) up to the point where BVoff saturates and fmax starts to decrease at increasing Lr (due to the increase in RS ). An optimum value of Lr is found around 0:3 lm, resulting in an off-state breakdown voltage  13:5 V with fmax 130 GHz. It should be stressed that if one tries to obtain high breakdown voltages in a simple single-recess structure simply by increasing the gate-drain distance and exposing larger AlGaAs or InAlAs surfaces in the recessed region, reliability problems may arise due to generation of surface traps by hot carriers. In this case, devices that have higher breakdown voltages also show enhanced degradation after hot-electron accelerated tests, see Section 2.2.5. 2.2.2. Engineering of the gate Schottky contact and of the barrier or donor layer Several authors studied breakdown voltage improvements consequent to enhancement of the gate Schottky contact barrier height. This improves off-state breakdown by decreasing thermionic-field emission. Wide bandgap barrier layers [27–29], have been widely adopted for this purpose: Bahl et al. [28] used strained InAlAs insulating layers for InP-based HFETs; Amano et al. [27] improved the gate and noise characteristics of InAlAs/InGaAs HEMTs using an InGaP Schottky contact layer. A graded InGaP layer was adopted by Chough et al. [30]. Matloubian et al. [29] adopted a GaP0:35 Sb0:65 Schottky layer, which reduces electron injection from the gate. Other authors have tried to reduce the leakage current injected from the gate contact by improving the properties of the semiconductor surface. Habibi et al. [31] developed a dry photochemical etching and sulfur passivation process that reduces the gate leakage current of InAlAs/InGaAs HEMTs by three orders of magnitude. Auger electron spectroscopy and X-ray photoelectron spectroscopy measurements of the passivated InAlAs surface revealed that the photochemically generated free sulfur radicals are capable of replacing As–O and In–O bonds by As–S and In–S bonds. A similar effect was found by Vaccaro et al. [32], who reduced native oxides in InP-based HEMTs using a CdS treatment. InAlAs barrier layers that have a high Al content have also been used, thanks to the increased DEv discontinuity, to prevent holes from being collected by the gate. This improves gate leakage in the on state, but does not eliminate the parasitic effects induced by the holes

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that remain in the channel and/or are injected in the substrate. To increase the gate barrier height (thus improving the off-state breakdown) and decrease the electric field at the drain (which has a beneficial effect on both on-state and off-state breakdown), Shealy et al. [33] developed an InAlAs/InGaAs HEMT by adopting a pþ -InGaAs/ p-AlInAs/InP gate layer and regrown nþ -InGaAs ohmic contacts. These devices achieved BVoff  31 V and BVon  7V with ID =W ¼ 300 mA/mm, both at IG ¼ 1 mA/mm. Finally, the use of wide bandgap materials contributes to improve breakdown properties by reducing impact ionization in the barrier or donor layer, where a non-negligible contribution to electron–hole pair generation can take place. 2.2.3. Management of hole charge: p substrate and p contacts If holes are removed using a p-buffer layer and grounded by p-type ohmic contact, parasitic phenomena, such as kinks, increase of output conductance, and on-state breakdown, are suppressed or reduced. Nishihori et al. [34] suggested replacing the p buffer with a ppocket layer under the source, which removes the holes from the substrate region under the channel, thus reducing their influenee. Experimental results reported in [34] demonstrate that this structure shows reduced kink effects and output conductance, and two-dimensional numerical simulations confirm the reduction in the hole accumulation. 2.2.4. Reduction of impact-ionization in the channel On-state breakdown phenomena can be reduced significantly only if impact ionization in the channel is quenched. A reduction of the electric field, however, requires difficult technological steps or implies a worsening of rf performance. A possible solution is engineering of the channel material properties with the use of wide bandgap materials or engineering of channel quantization. 2.2.5. Composite channel and high-energy gap channel materials Breakdown effects are particularly severe in InPbased HEMTs, due to the reduced bandgap of In0:53 Ga0:47 As, lattice-matched on InP, which enhances impact ionization. Other channel materials bave been considered, for instance, InP, which, being characterized by a wide energy bandgap, shows reduced impact-ionization phenomena. The 0:8 lm InAlAs/nþ –InP HFETs studied in [35] show no signature of impact ionization up to VDS ¼ 5:5 V, with a 60 times reduction in gate current with respect to InAlAs/InGaAs HEMTs. The breakdown

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voltage increased with increasing drain current, with a BVoff value of 10 V. Enoki and co-workers [36,37] proposed a composite channel structure, combining a thin layer of In0:53 Ga0:47 As with InP as the channel material. With this structure it is possible to exploit the advantageous physical properties of both materials, that is, the high electron mobility of In0:53 Ga0:47 As at low electric fields, and the high breakdown and saturation velocity of InP at high electric fields. 2.2.6. Reduction of impact ionization by channel quantization Another approach to improve the breakdown voltage is to reduce the thickness of the channel layer to the order of the de Broglie wavelength of the electron, which makes it possible to enhance the effective bandgap in the channel due to quantum size effects (channel quantization) [17,38,39]. Fig. 6 shows a schematic cross-section of a 0.15-lm InAlAs/InGaAs/InP composite channel HEMT. The thickness of the In0:53 Ga0:47 As was varied among 30, 50,
, while keeping the other layers unchanged and 100 A [17]. In Fig. 7, the effective energy gap EG;eff has been calculated as a function of channel thickness in the square-well approximation. Fig. 8 compares the on-state impact-ionization gate current in the three structures. A 20 times reduction in IG is observed by comparing the 30
channel device with the 100-A
device. At the same A time, the off-state breakdown increases from 4.8 to 7.8 V at IG ¼ 1 mA/mm [17]. This improvement in breakdown characteristics is obtained at the expenses of the device transconductance and maximum drain current [17].

Fig. 7. Effective energy-gap EG;eff as a function of channel thickness, calculated solving the Schr€ odinger equation in flat band conditions (square well approximation). The inset shows the schematic energy-band diagram. Reprinted with permission from G. Meneghesso et al., IEEE Trans Electron Dev 1999; 46:2. Ó 1999 IEEE, New York.

Fig. 8. On-state impact ionization current IG vs VGS , measured at VDS ¼ 1:8 V, for composite-channel HEMTs with different
. Reprinted In0:53 Ga0:47 As channel thickness: 30, 50 and 100 A with permission from G. Meneghesso et al., IEEE Trans Electron Dev 1999;46:2. Ó 1999 IEEE, New York.

Fig. 6. A schematic cross-section of the basic AlInAs/InGaAs/ InP composite-channel HEMT. The thickness of the In0:53 Ga0:47 As layer of the channel is varied among 30, 50 and
, while keeping the other layers unchanged. Reprinted 100 A with permission from G. Meneghesso et al., IEEE Trans Electron Dev 1999;46:2. Ó 1999 IEEE, New York.

Another critical point for InAlAs/InGaAs HEMTs is represented by the already mentioned increase with temperature of the impact-ionization coefficient, see Fig. 9. The channel quantization concept was applied to InAs channel HEMTs using AlSb barrier layers by Bolognesi et al. [39]. Energy level quantization in the 50
InAs channel layer was shown to reduce impact ionA ization and to suppress short-channel effects. The use of the thinner well reduces the cutoff frequency fT , the transconductance gm and the current drive, because of

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Somerville and Del Alamo [14] recently reviewed the state-of-the-art of millimeter-wave power InP HEMTs and compared it to pseudomorphic HEMTs. Fig. 10 shows the reported BVoff versus maximum drain current for InP- and GaAs-based, HEMTs, both lattice matched and pseudomorphic. In general, for a given maximum current, InP-based HEMTs exhibit BVoff values 2–3 V lower than GaAs pseudomorphic HEMTs and have significantly worse BVon characteristics. At the moment, GaAs pseudomorphic HEMTs show higher power output than InP HEMTs across nearly the entire frequency spectrum from 1 to 100 GHz; at high frequencies (94 GHz), however, the power-added efficiency of InP HEMTs is higher than that of GaAs pseudomorphic HEMT’s in the 0.01–1 W power range. Fig. 9. Gate current IG vs VGS , measured in the device having a
In0:53 Ga0:47 As channel thickness at VDS ¼ 1:8 V, for 100 A various temperatures. Reprinted with permission from G. Meneghesso et al., IEEE Trans Electron Dev 1999;46:2. Ó 1999 IEEE, New York.

the reduced low-field mobility due to interface roughness scattering in thin InAs/A1Sb channel layers: the low-field mobility decreases from ln ¼ 21; 000 to 9000 cm2 /(Vs)
quantum wells, respectively [39]. for the 100- and 50-A

Fig. 10. Comparison of the off-state breakdown voltage as a function of extrinsic carrier concentration for given gate technologies. The trendline indicated results from off-state breakdown calculations performed by Somerville [14], where the predicted breakdown voltage is calculated as a function of extrinsic carrier concentration and the Schottky barrier height /B . Data are from [17] and [14]. The value of breakdown voltage obtained by Shealy et al. [40] for composite channel devices with non-alloyed ohmic contacts is also reported. Reprinted with permission from G. Meneghesso et al., IEEE Trans Electron Dev 1999;46:2. Ó 1999 IEEE, New York.

3. Kink effects and low-frequency transconductance dispersion A typical anomaly of InP-based HEMTs is the presence of a ‘‘kink’’ in the output characteristics, i.e. of an abrupt increase in drain current at a certain drain voltage, which is usually followed by a rapid increase in output conductance. Kink is a problem not only in InAlAs/ InGaAs HEMTs, but also in AlGaAs/GaAs, AlGaAs/ InGaAs HEMT’s and HFET’s [41,42] and siliconon-insulator metal-oxide-semiconductor FET’s (SOIMOSFETs). In some structures of SOI-MOSFETs the kink is a direct result of substrate floating: holes generated by impact-ionization accumulate under the gate and change the threshold voltage. In MESFETs and HEMTs the involved physics is much more complicated, so that a generally accepted explanation for kink effects in these devices has not been formulated yet, possibly due to the fact that the ‘‘kink’’ can be due to different mechanisms. Moreover, the kink is remarkably dependent on growth and process conditions, and sometimes has different characteristics in devices even on the same wafer [43]. Kink is a (low-) frequency-dependent phenomenon, which is sometimes correlated with dependence of transconductance on frequency at low frequency (transconductance dispersion, gm (f)), with transients in drain current when the drain or gate voltage is pulsed (drainor gate-lag, respectively), with frequency dispersion of output conductance (gD (f)). Together with thermal transients, these phenomena induce a time-dependent shift in operating point, and various forms of non-linearity. In digital integrated circuits for broadband optical communication systems, the gD frequency dispersion causes jitter which reduces the size of the eye-pattern openings [44,45]. Most recent models of kink effect are based on the effect of holes, generated by impact-ionization and accumulated at the extrinsic source, coupled with Fermi level pinning at the surface and the buffer and/or presence of

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surface or buffer/interface traps. Hole pile-up at the source results in a change in channel potential beneath the source end of the gate, thus changing both the threshold voltage [46] and the source resistance of the device [43]. In the model developed by Somerville et al. [46] holes, generated by impact-ionization, flow back through the channel toward the source, where they accumulate in the channel and recombine. A steady-state hole distribution in the channel is achieved in a time of the order of the hole transit time through the channel plus the recombination time in InGaAs (around 1 ns). In the vertical direction, a small hole current should take place to the surface and buffer, in order to maintain Fermi level pinning; this should take longer, since the holes have to overcome a non-negligible energy barrier. The positive charge at the surface and in the buffer is imaged by additional electrons in the channel, thus changing the quasi-Fermi level there. The potential should change by Vkink ¼ kT =q lnðp0 þ p1 Þ=p0 where k is Boltzmann’s constant, T absolute temperature, p0 is the ‘‘pre-kink’’ hole concentration in the extrinsic channel, and p1 is the excess hole concentration there. The additional drain current is then given by DID  gm0 Vkink and, since the excess holes are generated by impactionization Iimpact ¼ AID expð
B=ðVDS
VDSAT ÞÞ the excess drain current which originates the kink becomes: DID  gm0 kT =q ln½1 þ AID expð
B=ðVDS
VDSAT ÞÞ On the basis of this description, Somerville et al. have developed a circuit model which reproduces the main features of kink effects in MESFETs and HEMTs. Dynamic effects are fitted by inserting in the circuit a capacitor (7 nF/mm) which represents the transient hole accumulation at the source end of the channel and the positive charging of surface and buffer. Georgescu et al. [47] investigated the kink in InAlAs/ InGaAs/InP inverted HFET’s as a function of temperature and optical excitation. They show that above 325 K the kink effect disappears, while the impact ionization process is still present. The kink at low temperatures is suppressed by illumination with photons of energy above 1 eV; the authors attribute the kink to the presence of traps in the top layers. Suemitsu and co-authors [43] have studied the physics of kink phenomena in InAlAs/InGaAs HEMT’s using two-dimensional device simulations, which included an accurate description of impact-ionization based on effective temperature model [48]. Electron trapping in the

surface states was modeled using a one-level acceptorlike trap referring to data on the deep levels of bulk InAlAs [49]. The amplitude of the kink was shown to increase with surface trap density in the 2 1012 –6 1014 cm2 range, and as side-etching length increases from 50
. At 1 1012 cm
2 , no kink is present. In the view to 350 A of Suemitsu and co-authors, the prevailing mechanism leading to the kink consists in a sudden reduction of RS : the electron density in the channel of the side-etched region is reduced by surface depletion caused by surface states. Once holes are generated by impact-ionization and accumulate in the source/gate side-etched region, the potential profile is modified, and the electron density is recovered. According to [43], strategies to eliminate the kink mainly involve either (a) reducing or changing the surface traps––thus increasing ns0 , the electron density at the source-to-gate side etched region, or (b) preventing the modification of the potential profile due to hole accumulation. Wang et al. [50] have found that the kink in InAlAs/ InGaAs HFETs can be suppressed by using suitably deposited silicon nitride passivation. An InP layer grown on top of the InAlAs donor layer, which is also used as an etching-stopper layer for improving threshold voltage reproducibility, is effective for eliminating the kink, as will be shown in more detail in the following. The InP layer maintains a high electron density because the pinning level of InP is close to the conduction band minimum [51]. The model in [43] shows that the kink arises from a change in ns at increasing VDS and predicts that the magnitude of the kink depends on the inverse of ns . If ns is large enough, the influence of the change will be negligible, and the kink will not appear. Since ns becomes smaller as VT increases towards 0 V, devices with high threshold voltage close to zero are critical. Another way to eliminate the kink is to reduce the effect of generated holes on the potential profile (indicated as point b above). A low temperature buffer includes a high density of deep levels that capture holes in the channel, thus making the change in hole density with VDS smaller than with a buffer without deep levels [52]. A body contact (i.e. an ohmic contact to a p-substrate or a buried p-buffer under the channel layer) reduces the hole density at high VDS [53]. Light irradiation [47] either removes charge from the traps or injects holes even when VDS is below the threshold for impact-ionization. As a consequence, light irradiation eliminates the kink by shifting the drain current to the ‘‘post-kink’’, ‘‘high’’ value, whereas a p-buffer with ground contact keeps the current at the ‘‘pre-kink’’, ‘‘low’’ value even at high VDS . In the following, some examples concerning the effectiveness of an InP stopper layer in removing the kink will be presented [54,55]. The examples refer to 0:1 lm gate length and 10 lm gate width InP-based lattice-

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Fig. 11. Schematic cross-section of a standard InP-based HEMTs WITH an InP etch-stop layer grown on top of the InAlAs barrier layer. All layers are MOCVD grown LM on InP. The standard device present a WIDE gate recess regions (LgC ¼ 0:1 lm) and is called A1.

matched (LM) HEMTs. The MOCVD grown basic
thick InAlAs epitaxial structure consists of a 2000 A

InAlAs buffer, a 150 A thick InGaAs channel, a 30 A
InAlAs Schottky spacer, a Si -doped plane, a 60 A
InP-recess-etch stopper, and nþ -InAlAs/ barrier, a 50 A þ n -InGaAs cap layers. We also studied HEMTs having the same structure except for the absence of the InPrecess-etch stopper. In both devices the whole structure is covered by a SiO2 /SiN bilayer. Fig. 11 shows a schematic cross-section of the studied devices. The standard gate recess region width (distance between CAP and gate contact) is LgC ¼ 0:1 lm. We have investigated five types of devices characterized mainly by the following differences: (A) Devices with the InP etch stopper layer; A1: the InP stopper layer covers all the gate access region and the gate is placed over the InP (see Fig. 11); or A2: the InP stopper covers only the ungated gate recess region, hence the gate directly contacts the InAlAs barrier layer. (B) Devices without the InP etch stop-per layer; B1: the InP stopper has not been grown during the device processing, these devices have a narrow gate recess region, LgC ¼ 0:02 lm. B2, B3: a previously grown InP stopper layer, between the CAP and the barrier, has been removed in the access region by a subsequent etching process step. By using two different etching times, devices with standard LgC ¼ 0:1 lm (B2) or LgC ¼ 0:02 lm (B3) have been obtained. Devices without InP recess-etch stopper layer and wide lateral recess region (device B2) are affected by a kink in the output I–V characteristics, which is enhanced at low temperature, see for instance Fig. 12. On the contrary, kink effect is almost not observed, even at low temperature, in the devices with InP etch stop layer (see Fig. 13 for the (A1 device) or in devices with a narrow lateral recess region, see for instance

Fig. 12. Output I–V curves obtained in a device without the InP stopper (removed with a second step etching procedure) and wide gate recess region (B2 device), measured at room (solid) and
80 °C (dashed). VGS from
0.4 to 0.2 V, step 0.1V.

measurements reported in Fig. 14 carried out in a B1 device. Similarly to the kink effects, transconductance frequency dispersion has been observed only in the B2 device, i.e. in the device without the InP stopper layer and wide lateral recess region, see Fig. 15. On the other hand, the typical bell shape behaviour in the IG vs VGS curves, has been observed in all the devices demonstrating that impact ionization is always present, see for instance Fig. 16. Fig. 17(a) shows the output characteristics of a typical device without InP ‘‘passivating’’ layer (removed InP and wide recess region, type B2), carried out at room temperature. A considerable collapse of the drain current (at low VDS values) is observed. At higher VDS , the ID current completely recovers, giving rise to a remarkable kink effect. Fig. 17(b) shows the output characteristics of a typical device with the InP

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Fig. 13. Output I–V curves obtained in a device with the InP stopper layer and wide recess (A1 device) measured at room (solid) and
80 °C (dashed). VGS from
0.4 to 0.1 V, step of 0.1 V.

Fig. 14. Output I–V curves obtained in a device without the InP stopper layer and narrow recess (B1 device) measured at room (solid) and
80 °C (dashed). VGS from 0 to 0.6 V, step of 0.1 V.

passivating layer (type A2) and almost no kink effect in the drain current is observed. The gate current, IG , is also reported in Fig. 17(a) and (b). Both devices present similar IG values: gate current is dominated by the collection of holes generated by impact ionization, as demonstrated by the non monotonic IG vs VGS behaviour. In Fig. 18 the transconductance frequency dispersion is reported as a function of temperature for VDS ¼ 100 mV and VGS ¼
600 mV in a device without InP etch stop layer (type B2). A shift towards lower frequency is observed on the gm (f) dispersion on decreasing the temperature. The characteristic frequency FM is the frequency where the dispersion is half of the total one. By plotting FM ðT Þ=T 2 as a function of 1=kT in an Arrhenius plot, a straight line is obtained (see inset of Fig. 18). From the slope of this line, an activation energy of 0:28 0:03 eV has been obtained. In devices having a wide lateral recess region without InP etch stopper layer, traps in the gate-source and gate-drain access region can become negatively charged since they behave as acceptors. As discussed previously, this trapped charge induces an increase of the parasitic drain and source resistances, RS and RD or a shift in threshold voltage reducing the ID at low VDS . At increasing VDS several effects can lead to a change of the trapped charge and/or to the modification of potential profile in the gate-source and gate-drain recess, thus giving rise to an abrupt increase in ID . In order to understand if the kink is due to a threshold voltage shift or to a reduction of the parasitic resistance, we have measured the transconductance in a type B3 device at VDS ¼ 0:3 and 0.7 V, i.e. before and after the kink (see Figs. 19 and 20), at room temperature. As it can be observed, the main feature observed before and after the kink is a change in the transconductance peak without any apparent shift in the threshold voltage with

Fig. 15. Normalized trasconductance frequency dispersion in all the studied devices. Only in the B2 devices (i.e. the one without the InP stopper layer and with wide gate recess region) present gm (f) dispersion.

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Fig. 16. IG vs VGS at different VDS measured at þ20 °C (solid lines) and
80 °C (dashed lines) in a device without the InP stopper and wide lateral recess region.

respect to the ‘‘kink’’ region. This suggests that the parasitic resistance reduction is the main responsible for the ID increase (and then kink effect) rather than the threshold voltage shift. Devices adopting the InP ‘‘passivating’’ layer seem to be less affected by surface traps, and therefore kink effects are strongly reduced even in the presence of impact ionization. The InP stopper layer, that largely reduces the density of the surface traps, is also effective in maintaining enough electron density (because the pinning level of InP is close to the conduction band minimum) making the change in the hole density, with increasing VDS , smaller that it would be without the

Fig. 17. Output current characteristics ID (continuous lines) and IG (dash lines) vs VDS in a device without (a) and with (b) the InP ‘‘passivating’’ layer, B2 and A2, respectively (ambient temperature). VGS step ¼ 100 mV.

InP layer itself. As a last remark, it must be reported that Enoki and co-workers [56] have compared the rf

Fig. 18. gm (f) measured at different temperatures (VDS ¼ 0:1 V, VGS ¼
0.6 V) in a device without the InP stopper and wide lateral recess region (type B2). The corresponding Arrhenius plot is depicted in the inset.

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Fig. 19. Output characteristics ID vs VDS in the REWI device indicating the two VDS values chosen for the gm measurements of Fig. 20.

Fig. 20. gm measured at VDS ¼ 0:3 and 0.7 V (i.e. before and after the kink, see Fig. 19) at 20 °C.

characteristics of 0.1-lm HEMTs with and without the InP etch stopper. The experimental results demonstrate that the InP etch stopper do not present any disadvantage in terms of high-frequency performance. In conclusion, data presented here demonstrate that the InP stop etch layer, which is a viable solution to the problem of threshold voltage reproducibility, also contributes to largely suppress kink effects in InP-based HEMT’s without any disadvantage in terms of high-frequency performance.

4. Hot-electron degradation Hot-electron degradation is a well-known degradation mechanism of GaAs MESFETs and HEMTs [57]. The first works on the hot-carrier-induced degradation of lattice-matched InP-based 0:3 lm gate HEMT’s have been published by Menozzi and co-workers [58–62]. After

aging at high VDS , both the dc and rf device gain degrade after stressing. The maximum of transconductance decreases, without significant changes in threshold voltage, thus pointing to an increase in drain resistance consequent to hot-electron-induced surface degradation. In [63] the same group compared the reliability of 0:3 lm gate InP HEMT’s having different recess widths (from 0.2 to 1:2 lm), corresponding to different off-state breakdown values (from 3 to 18 V). In all devices the hot-electron stress produces transconductance and drain current decrease consequent to electron capture at interface states between the semiconductor surface and the SiN passivation, or in the SiN itself, over the gate-drain region, leading to reduced surface potential, hence increased depletion. Wide recess devices degrade more than narrow-recess ones. The trapping of electrons at the surface, and the depletion that ensues, are clearly more influential in wide-recess devices, where much of the nþ InGaAs cap has been etched away, because the semiconductor–SiN interface is closer to the channel, and the screening provided by the high-doping cap is reduced. As a consequence, indications on the hotelectron robustness of HEMT devices cannot be inferred by off-state breakdown measurements, and, conversely, high-voltage devices obtained by extending the gate recess region may be exposed to enhanced hot-electrons reliability problems. Nawaz et al. [64] have conducted hot-electron tests on 0.14 and 0:4 lm single and double delta-doped lattice-matched InP-based HEMTs, SiN-passivated and unpassivated. A temporary negative shift in the threshold voltage for unpassivated HEMTs, and permanent negative shift in the threshold voltage for passivated HEMTs has been obtained. The VT shift has been attributed to the build-up of holes inside the Schottky layer (temporary) and/or at the semiconductor/passivation interface (permanent). The degradation is certainly due to hot-carriers, since the amount of threshold voltage shift as a function of VGS is correlated with the nonmonotonic behavior of IG (VGS ) due to impact-ionization. It is worth noticing that devices described in [65] were affected by a kink, which disappears after hot-electron testing, possibly due to reduction of impact-ionization originated by electron trapping in the gate-drain region. Our group also studied the hot-electron reliability of InP HEMT devices with and without InP etch-stop passivating layer on top of InAlAs, which were described in the previous section [55]. The bias conditions were chosen in order to have the maximum impact ionization process (i.e. in the peak of the IG vs VGS bell shape). Fig. 21 demonstrates the effect of 10 h of hotelectron stress test carried out in a B2 device, i.e. in a device without the InP stopper (removed with a further etching procedure) and wide gate recess region. The bias conditions were: VDS ¼ 2:5 V, VGS ¼
0.3 V. Enhancement of the kink effects after hot electron life test can be

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Fig. 21. Output characteristics before (solid line) and after (dashed) hot-electron stress test in a device without the InP stopper and wide lateral recess region.

Fig. 23. Comparison between 15 keV CL spectra from G–D and G–S regions before and after stress. The G–S curves have been shifted for clarity.

observed. The hot electron stress induced a large increase in drain parasitic resistance and some threshold voltage shift as suggested by Fig. 22. Increase in the transconductance frequency dispersion (not shown) was also observed in these devices [55]. The activation energy, measured from gm (f) measurements in the stressed devices, was the same as in the virgin devices. All these features suggest surface state creation in the high field gate drain access region as degradation mechanism; a degradation due to pure thermal effects has been ruled out since a similar effect has been found when the devices were stressed with a higher electric field and impact ionization but with much lower primary electron current and power dissipation. The cathodoluminescence (CL) peak of the stressed HEMTs revealed a clear reduction of the integrated intensity of the CL signal collected from the gate-drain region, indicating a modification of the trap density inside the device after hot electron stress

as shown in Fig. 23 [66]. In the same figure it can be noticed that no significant variation is observed in the G–S region as expected, since during the hot electron stress the high electric field (and the consequent degradation) is present only in the G–D region. The presence of a large amount of trapped charge creates an electric field which may capture the carriers generated by the electron bombardment and then may reduce the CL integrated intensity. This result is in agreement with those previously found after hot electron stress in GaAs based PHEMTs. To confirm the hypothesis that the trapped charges did not affect the InGaAs channel, taking advantage of the sensitivity of the CL signal to the electric field created by charge accumulation in the traps, CL investigations have been carried out both on unstressed and stressed devices by varying the electron beam energy from 5 to 20 keV at T ¼ 6 K. This experimental approach allowed to collect the CL signal from different penetration depths inside the devices. The results surprisingly revealed an influence of the electric field on the layers between the nþ doped InAlAs/InGaAs cap layers and the undoped InGaAs channel and gave an estimation of its in-depth extension. Fig. 24 shows typical CL spectra obtained at T ¼ 6 K and Eb ¼ 5 keV of the G–D region before and after bias aging. The energy range contains the optical emissions from the InGaAs layers. The reduction of the CL integrated intensity of the stressed device is clearly shown. Fig. 25 reports four curves from the G–D region after electrical stress obtained by increasing the beam energy from 6 to 12.5 keV. The most striking feature concerns the onset of a shoulder at about 1300 nm in the 8 keV spectrum. The same behaviour has been obtained from the G–D region from the unstressed devices (not shown here). Deconvolution procedures reported in the inset of Fig. 25, revealed the presence of three different emissions positioned at 1523, 1428 and 1358 nm. The emission at

Fig. 22. Transconductance measured before (solid line) and after (dash line) hot-electron stress test (measured at VDS ¼ 0:3 V) in a device without the InP stopper and wide lateral recess region (B2 device).

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Fig. 24. InGaAs-related CL from the G–D region before and after stress at low Eb energy.

about 1523 nm (0.814 eV) has been ascribed to the nearband-edge (NBE) transition in the nþ doped InGaAs cap layer. On the basis of computer simulations and of literature data on similar devices, the transitions positioned at about 1358 nm (0.913 eV) and at 1428 nm (0.868 eV) have been ascribed to the band bending of the quantum well forming the undoped InGaAs channel. The higher relative intensity of the shoulder at 1358 nm in the 8 keV spectrum in Fig. 25 after hot-electron stress suggests that the bias aging could affect the device structure at a certain depth underneath the passivation as it will be shown afterwards. To confirm this hy-

pothesis, CL investigations were carried out also in the spectral energy range containing the emissions from the InAlAs layers at the electron beam energy Eb ¼ 8 keV (Fig. 26). In this case the main difference between the spectra before and after stress concerns the change in the ratios between the integrated intensities of the bands at 769 nm (1.612 eV) and at 846 nm (1.466 eV) before and after stress. Also in this spectral range the G-S region is not affected. By comparing the spectra in Figs. 24 and 26, a different behaviour between the peak at 846 nm and those at 1523, 1428 and 1358 nm can be seen after hot electron stress. In Fig. 24 the ratio between the integrated intensities of the three peaks remain almost unchanged before and after the stress (as already mentioned, only the total integrated intensity decreases after bias aging). A different behaviour is shown in Fig. 26 where only the intensity of the peak at 846 nm is strongly reduced after the stress. On the basis of deconvolution procedures reported in the inset of Fig. 26, the peak at 799 nm (1.552 eV) has been considered to be the excitonic emission mainly from the undoped InAlAs layers. The peak at 878 nm (1.412 eV) is related to the InP substrate which is slightly affected by the injected carriers at 8 keV. The ultimate understanding of the nature of the transition at 846 nm is beyond the purpose of this work and deserves further investigations; however, on the basis of literature data, the emission could be due to a deep trap inside the InAlAs layers. Finally, concerning the broad band at 769 nm (1.612 eV) we are inclined to ascribe it to the NBE transition from the heavily doped InAlAs layers. Taking into account the

Fig. 25. InGaAs-related depth resolved CL from the stressed G–D region. The inset reports the deconvolution of the spectrum acquired at 8 keV.

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Fig. 26. InAlAs-related CL spectra from the G–D region before and after bias aging. The deconvolution of dotted curve is reported in the inset.

CL spectral resolution imposed by the experimental conditions in this energy range (15 meV), the blue-shift of the 769 nm transition with respect to the excitonic emission could be due to the quasi-Fermi level shift toward higher energies due to the high doping concentration of the InAlAs donor layer (Burstein–Moss effect). In conclusion, within the sensitivity of the CL technique, our experimental results seem to suggest that mainly the layers containing Al experience the effect of the hot electron stress. The increased trap density in the gate-drain region leads to an amplification of the already present instabilities (i.e. kinks and gm ðf Þ dispersion). These degradation effects were not observed both in devices with the InP etch stopper layer. In devices without the InP etch stopper layer and with narrow lateral recess region a slight degradation (without appearance of any kinks) takes place after hot-electron stress test (see Fig. 27). The degradation is completely recovered after a few hours of unbiased storage at room temperature.

5. Schottky and ohmic contatcs degradation La Combe et al. [67] have carried out DC and rf life tests on of 0:1 lm InP HEMT’s in the 200–245 °C temperature range, with currents up to 10 mA. A parametric decrease of drain current and transconductance was observed in all tests (see Fig. 28) which was correlated with a diffusion-controlled degradation of source resistance, which increases as the square root of time, see Fig. 29. This degradation depends on both temperature and drain current, and has an activation energy

Fig. 27. Output characteristics before and after hot electron stress test in a device without the InP etch stopper and narrow lateral gate recess region. Before stress: solid lines. After stress (20 h at VDS ¼ 2:5 V and VGS ¼ 0:1 V): dashed lines. After stress and few minutes of recovery: dash–dotted lines.

of 0.37 eV. The authors in [67] also observed a shift in threshold voltage, ascribed to ‘‘gate sinking’’ [68], thermally activated with Ea ¼ 0:63 eV. A median life of 30 years at 100 °C was predicted from the DC data. Penetration of ohmic contacts with increase in contact resistance has been observed by other authors [69,70]. Ti/Pt/Au gate sinking has been also reported [71]. Use of refractory metal gates, such as WSiN [72], WSi [69], respectively for ohmic and Schottky contacts greatly improves metallization stability, which can also be achieved by high temperature stabilization annealing [73].

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Fig. 28. Plot of Idss as a function of time for 10 InP devices submitted to DC life tests. Reprinted with permission from D.J. La Combe et al., Proc IEEE-IRPS, 1993. Ó 1993 IEEE, New York.

Fig. 29. 1=gm plotted as a function of the square root of time. The fit to a straight line is evident, suggesting a diffusion-limited mechanism. Reprinted with permission from D.J. La Combe et al., Proc IEEE-IRPS, 1993. Ó 1993 IEEE, New York.

6. Hydrogen effects Hydrogen has been shown to degrade reliability of GaAs MESFETs, P-HEMTs [74] and InP HEMTs [75]. Devices fabricated with Ti/Pt/Au or Ti gate metallization are particularly exposed to the problem of hydrogen degradation. Pt is known to be a catalyst for H2 , breaking it down into atomic hydrogen, which then diffuses through the gate. Titanium reacts with H and creates a TiHx compound with a larger lattice than Ti; this induces stress and the resulting piezoelectric effect shifts the threshold voltage, VT , of the transistors, as schematically shown in Fig. 30.

Hydrogen effects in InP-based HEMTs have been studied extensively by Blanchard and co-authors [75– 78]. Lattice-matched InAlAs/InGaAs HEMT devices on InP were treated in forming gas (5% H2 in N2 ) or in pure nitrogen at 200 °C for 3 h. Under forming gas, threshold voltage underwent a negative shift in all devices. Although moderate (<20 mV), the shift was found to depend on gate length and on gate orientation, a clear signature of piezoelectric effects; devices with gates orientated along the [0 1 1] direction shifted more negative than those with the gate along the [0 1 1] direction (see Fig. 31). The threshold voltage shifts are due to the piezoelectric charge consequent to formation of TiHx , which produces compressive stress in the gate. Influence of the Si3 N4 passivation layer was ruled out by reproducing the results in unpassivated samples. Wafer exposed to forming gas were found to have increase curvature with respect to N2 -annealed ones, consistent with volume expansion of the Ti/Pt films. Auger electron spectroscopy (AES) reveals the formation of titanium hydride (TiHx ) in samples treated in forming gas. It should be stressed that this failure mode can be recovered after subsequent annealing in N2 , and that AES confirm that the TiHx also decreases in recovered samples, thus confirming the piezoelectric effect and the link with hydride formation. Threshold voltage shift is not the only failure mode observed after hydrogen exposure: devices annealed in forming gas also show a nonrecoverable increase in breakdown voltage (up to 1 V). The degradation has been attributed to permanent alteration of the surface stoichiometry of the exposed InAlAs, resulting in a reduction in the sheet carrier concentration underneath [75]. The authors also studied hydrogen effects in strainedchannel InP HEMTs and GaAs pseudomorphic HEMTs with Ti/Pt/Au 0:1 lm gates [76]. A remarkable VT shift (100 mV for InP HEMTs, 300 mV for GaAs P-HEMTs) is observed after annealing, Fig. 32, but, differently from what observed in experiments on latticematched, longer-gate devices, the shift is positive, so it cannot be directly explained using the compressive stress model adopted in [75]. Threshold voltage shift depends on t5=2 , consistently with the process of hydride Ti precipitates consequent to hydrogen diffusion along grain boundaries, associated with platelet growth [76]. A 2D finite-element simulation was adopted to calculate the mechanical stress caused by a gate that has expanded due to hydrogen absorption. The model explains experimental observations of hydrogen-induce threshold voltage shifts, both in InP HEMTs and in GaAs P-HEMTs. Devices having refractory gate metallizations are immune from both gate sinking effects and hydrogen degradation [72]. On the other hand, Chertouk and coworkers [79] have shown that, in InP-based HEMTs with conventional Ti/Pt/Au gate metallization, a thermal

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Fig. 30. Cartoon illustration of the proposed H2 degradation mechanism of [75]. H2 exposure leads to the formation of TiHx , causing compressive stress in the gate. The induced piezoeletric polarization charge density in the semiconductor is indicated by the contours of constant charge for a [0 1 1]-oriented device. Reprinted with permission from R. Blanchard et al., Proc IEEE-IPRM, 2000. Ó 2000 IEEE, New York.

pffi Fig. 31. DVT vs t for [0 1 1] devices during early stages of degradation in forming gas anneal. Reprinted with permission from R. Blanchard et al., Proc IEEE-IPRM, 2000. Ó 2000 IEEE, New York.

stabilization treatment of 48 h at 225 °C in pure nitrogen eliminates hydrogen-induced degradation even in pure H2 atmosphere at 270 °C! The same thermal treatment was found to decrease the interface trap density at silicon–nitride InGaAs interface by a factor of 5, as demonstrated by metal-SiN–InGaAs (MIS) capacitance– voltage characteristics [80].

Fig. 32. DVT vs t for InP HEMTs during forming-gas anneal at 200 °C for 2 h (squares) and during a subsequent N2 recovery anneal at 200 °C for 15 h (circles). Measurements taken in situ at 200 °C. Reprinted with permission from R. Blanchard et al., Proc IEEE-IPRM, 2000. Ó 2000 IEEE, New York.

7. Fluorine donor compensation Degradation of InAlAs/InGaAs heterostructures due to fluorine atoms indiffusion is an intriguing and critical failure mechanisms. Fluorine was found to induce a decrease in both carrier concentration, ns , and mobility by several authors. Hayafuji et al. [81] observed F indiffusion after annealing an InAlAs/InGaAs/ InP heterostructures and n-InAlAs over insulating InAlAs (i-InAlAs) thick layers in air at temperature between 300

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and 450 °C, and observed a strong correlation between carrier concentration decrease and fluorine concentration. Annealing at 450 °C in ultra-high vacuum resulted to be very effective to recover the degradation. Experimental observations have been carried out using single heterostructures, superlattice structures comprising several n-type InAlAs layers with semi-insulating InAlAs layers between them, and actual HEMT devices. After annealing or bias/temperature accelerated testing, it has been systematically observed that the F concentration, as measured by secondary ion mass spectroscopy (SIMS), is very low in the semi-insulating layers, but tends to peak within the Si-doped n-layers (see Fig. 33) [73]. The decrease in carrier concentration is closely correlated with the increase in F concentration (see Fig. 34) and a compensation mechanism based on the formation of F–Si bonds has been postulated [82]. As a consequence of the reduced carrier density, conductivity of the channel decreases, and parasitic resistances increase. Under bias stress, however, at electric field values as low as 74 V/cm [82] a one-sided increase of the drain parasitic resistance is observed, thus suggesting that F atoms migrate preferentially towards the anode under electric field. It is postulated that, due to their extremely high electronegativity, F atoms can easily capture electrons, and then migrate towards the anode, thanks to their relatively small atomic radius and high mobility in the InAlAs layer. The degradation cannot be recovered or reversed (leading to a parasitic resistance increase at the opposite electrode) by subsequently treating the samples with a reverse bias, i.e. a ‘‘trapping’’ mechanism is pre-

Fig. 33. SIMS concentration profiles of fluorine and silicon of a test structure aged in nitrogen and in air, respectively. Reprinted with permission from M. Damman et al., Proc IEEEIRPS, 1999. Ó 1999 IEEE, New York.

Fig. 34. Relationship between carrier concentration variation and fluorine concentration variation (T: as annealed in the nitrogen ambient (deterioration loss), E: as reannealed in the ultrahigh vacum (recover, gain)). Reprinted with permission from N. Hayafuji et al., Appl Phys Lett 1996;69:4075. Ó 1996 American Institute of Physics.

sent, possibly consisting in the formation of F–Si bonds in the anode area. All the above mentioned experiments were conducted on unpassivated samples. Wakejima et al. [83] compared the behavior of InAlAs/InGaAs modulation doped structures passivated by SiN with that of unpassivated ones. SiN was deposited by plasma-enhanced chemical vapor deposition (PE-CVD) using SiH4 and NH3 at a substrate temperature of 200 °C (power 0.33 W/cm2 , film thickness 140 nm, deposited at a rate of 20 nm/min). Under SiN-passivated conditions, no significant changes in the two-dimensional electron gas concentration ns and mobility were observed up to the thermal stress time of 50 h at 280 °C, i.e. only 4% decrease in ns and negligible changes in mobility were found. On the other hand, the unencapsulated sample exhibited appreciable decrease in ns (by 38%) and in mobility (by 7%). The authors attributed this result to the capability of SiN passivation films deposited on the ungated surface regions of preventing indiffusion of F atoms that have stuck to the semiconductor surface from the atmosphere [83]. By adotping a molybdenum gate contact metal (which eliminates the gate sinking effect––and possibly reduces hydrogen effects), eliminating extrinsic fluorine containing processes, and implementing SiON passivation, researchers of the same group were able to demonstrate InAlAs/ InGaAs InP-based HEMTs with a projected lifetime of 106 h at 125 °C. Devices were tested at ambient temperatures from Ta ¼ 170 to 240 °C with VDS ¼ 0:8–1:0 V, and Id ¼ 9:6–12mA (i.e. 100 mA/mm). By adopting a

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20% decrease in drain current as failure criterion, an activation energy of 1.7 eV was obtained. Degradation was attributed to intrinsic fluorine contamination from air. In one of the experiments described in [83] an unpassivated i-InAlAs/n-InAlAs/i-InAlAs/i-InGaAs, sample was deliberately contaminated with fluorine atoms and underwent severe decrease in carrier concentration after annealing at 300 °C for 1 h. The same sample was encapsulated with SiN, and subsequently annealed at 280 °C, showing an 80% recovery in Ns . SIMS profiles of the passivated sample at various times during the annealing actually show a decrease of the F concentration in the n-InAlAs layer, suggesting an outdiffusion of F atoms towards the surface; also in this case the decrease (increase) in Ns is correlated with the integrated F concentration, thus suggesting that the recovery in Ns by the SiN passivated postannealing is indeed related to the release of F atoms. This would imply a capability of the SiN surface film to act as a sink for F contamination, but the authors in [83] did not succeed in detecting the increased F concentration in the SiN film, because it is difficult to distinguish those outdiffused F atoms from the rather high background concentration ( 1017 cm
3 ) of F-atoms existing in an as-deposited plasma-CVD film. Dammann et al. [73] have studied the reliability of 0:15 lm InAlAs/InGaAs HEMTs with pseudomorphic channel (In0:68 Ga0:32 As, 8 nm), adopting Ti–Pt–Au gates and 50 nm PE-CVD SiN passivation. Devices were tested using storage in air and in nitrogen (250 °C, 1000 h) and rapid thermal annealing in forming gas (10% hydrogen, 90% nitrogen at 270 °C, 160 min). Life tests at ambient temperatures between 200 and 245 °C with VGS ¼
0:13 V, VDS ¼ 1 V, corresponding to Id  275 mA/mm was also carried out in air and nitrogen. After the fabrication process the devices were baked at 225 °C for 48 h in nitrogen, in order to stabilize the gate sinking process and to decrease the interface trap density related special test structures were used for studying the effect of fluorine atoms by means of SIMS profiling. In the reference, untreated, sample no fluorine was detected at the position of the silicon peak. On the contrary, both samples annealed in air and nitrogen show accumulation of F in the Si-doped InAlAs layer; the peak concentration of F is approximately twice as high for the storage test in air as compared to nitrogen, simply due to the higher fluorine concentration in air. Similar results were found for metamorphic devices (see Fig. 35). The drain resistance was found to degrade faster than the source one, thus corroborating the hypothesis that the fluorine diffusion is accelerated by the electrical field. A failure criterion of 10% degradation in transconductance was used to calculate an activation energy of 1.8 eV and a projected life time of 106 h at 125 °C ambient temperature. Degradation was attributed also in this case to compensation

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Fig. 35. Comparison between degradation of trasconductance observed in InP-based and metamorphic HEMTs during biased life test at TCH ¼ 253 °C. Degradation is attributed to donor compensation due to Fluorine indiffusion. Reprinted with permission from M. Damman et al., Proc IEEE-IRPS, 1999. Ó 1999 IEEE, New York.

of Si donors due to fluorine indiffusion. Hwang et al. [84] reported Ea ¼ 1:6 eV and a projected life time of 106 h at 150 °C channel temperature. Suemitsu and co-authors [85,86] compared the reliability of 0:1lm InP-based HEMTs adopting Si-planar doping within three alternative carrier supply materials: (a) the usual In0:52 Al0:48 As; (b) an InP layer; (c) an In0:75 Al0:25 P layer (this composition leads to a strained layer, but eliminates the conduction band discontinuity to InAlAs). The effect of different gate recesses with various lateral depths was also studied. Storage at 195 °C, as well as bias tests in nitrogen at 150, 175 and 195 °C with VDS ¼ 1:0 and 1.5 V were used to identify failure mechanisms. The source resistance of conventional (InAlAs) devices was stable after 476 h of stress at 195 °C, VDS ¼ 1:0 V, VGS ¼ 0 V; an increase of a factor of 2 in RS was observed after bias-temperature stress at 195 °C, VDS ¼ 1:5 V, VGS ¼ 0 V. In devices having InP or InAlP as donor layer, RS remained unchanged in all testing conditions. The activation energy estimated from the 20% increase in RS in conventional devices was 1.1 eV. TLM structures were also submitted to accelerated testing, consisting in storage at 195 °C (700 h) and biased tests with an electric field of 75 V/cm. SIMS profiles reveal that accumulation of F takes place in samples adopting the InAlAs carrier supply layer, and that the accumulation is more pronounced in devices submitted to biased tests as compared to unbiased thermal storage ones, Fig. 36. Increase in RS increases with the length of the gate recess, thus suggesting that degradation mostly occurs in the gate recess region. On the other hand, increase in drain resistance was observed during biased tests for all carrier supply materials, and was attributed to hotelectron degradation [85].

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Fig. 36. (a) Impurity profiles obtained by SIMS. Samples were stored at 195 °C for 700 h. Voltage bias (electric field : 75V/cm) was applied to one sample during the storage as shown in (b). The biased sample has a larger density of fluorine (F) than the unbiased ones. Reprinted with permission from T. Suemitsu et al., Proc IEEE-IEDM, 2000. Ó 2000 IEEE, New York.

Despite the large number of experimental works describing the effects of fluorine on HEMTs and various types of test structures, a conclusive analysis of the physical mechanisms leading to device degradation still does not exist. The most relevant features of the degradation of electronic properties of InAlAs induced by fluorine atoms can be summarized as follows [87]: (a) due to F incorporation, the free electron concentration of Si-doped n-InAlAs decreases, and the electron mobility also decreases [81,83]; (b) p-type InAlAs is not affected by fluorine; (c) degradation is not observed in AlAs, GaAs, InAs, AlGaAs, and InGaAs; (d) the amount of the decrease in the carrier concentration is in good agreement with the F concentration, thus suggesting that one F atom captures one electron; (e) F tends to accumulate in layers doped with Si, while seems to diffuse rapidly in semi-insulating InAlAs layers, where it has a very low concentration. This would suggest some ‘‘trapping’’ mechanism, like formation of F–Si defect complexes, which is also suggested by Fourier transform infared spectroscopy measurements; (f) F indiffusion seems to take place from the surface; (g) SiN passivation inhibits F indiffusion and seems to promote F outdiffusion during high temperature annealing of passivated samples; (h) even moderate values of electric field (75 V/cm) strongly promote F indiffusion with subsequent donors compensation; the degradation is therefore enhanced in the anode region of biased samples. Degradation, how-

ever, can not be recovered or moved by reversing bias polarity. A systematic a priori study of basic properties of fluorine atoms in AlAs, GaAs and InAs using first-principle pseudopotential calculation method based on the local density functional formalism has been carried out by Taguchi et al. [87]. The authors found that the
1 charge state of F atoms is the most stable in a wide range of Fermi levels in all the binary semiconductors listed above; the stability of the sites is also similar: the sites near the group-III atom are rather stable, while the sites near the As atoms have rather high energies. In these compounds, F atoms do not form strong bonds with the lattice atoms even in the most stable states. The Fþ1 state is not stable at all, thus explaining why p-InAlAs layers do not suffer from compensation effects by fluorine atoms. Taguchi et al. [87] also calculated the barrier heights for diffusion of F in AlAs, GaAs and InAs, which resulted to be similar, and close to the experimentally obtained diffusion barrier height in In0:52 Al0:48 As (1.12 eV, [82]). The comparison strongly suggests that the selective degradation of InAlAs is not determined by the diffusion properties of F. The authors in [87] suggest that surface effects which determine the incorporation of F atoms into the hosts have to be investigated in detail, in order to understand the selective nature of the degradation. The tendency of F atoms to accumulate in n-InAlAs layers, and the low concentration in semi-insulating layers, on the other hand, is due to the unstable nature of F in the latter layers. If F diffuses keeping the
1 charge state, a potential barrier exists, due to the dif-

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ference in the position of Fermi level between the n- and the semi-insulating layers and/or to the electrostatic interaction between F
atoms and the positively charged ionized Si donor atoms in the n-type layer. On the other hand, neutral F0 atoms are very unstable: the energy difference between F
and F0 at the bottom of the conduction band is nearly the same in all semiconductors ( 2 eV). F and Si atoms have been also found by Taguchi et al. [87] to form stable defect complexes in the binary semiconductor hosts, suggesting a similar behavior also in InAlAs. However, if all F atoms couple with Si atoms, the mobility should not decrease, because F–Si complexes are neutral and thus less effective carrier-scattering centers. Moreover, the enhancement of degradation observed when an electric field is present would be difficult to explain. In fact, the energies of the F–Si defect complex and of the F
are equal or rather small (considering the annealing temperature of the experiments), so that F–Si complexes and F
atoms should co-exist in the n-InAlAs layers. The isolated F
atoms and the ionized Si donors reduce the mobility; the F
isolated atoms reduce the free-electron concentration since they capture an electron; the F–Si complexes also reduce the net free charge, since they can not behave as donors anymore. Therefore, the amount of decrease in the electron concentration equals the F concentration, and the F–Si and F
coexistence explains all the reported experimental characteristics. Due to the relative abundance of F in air, and to its intrinsic presence in materials and processes adopted for device fabrication, n-InAlAs poisoning by F is a dangerous failure mechanism, which requires substitution of the donor layer [85], and/or careful control of process, surface treatments and passivation. A series of physical effects related to F degradation still has to be investigated: mechanisms of incorporation of F in InAlAs, role of passivation, drift of F atoms due to electric field, electrical behavior of F atoms and F–Si complexes within HEMT structures, just to list some of them.

8. Reliability of metamorphic devices Since metamorphic devices are grown on buffers which contain a high density of dislocations, questions concerning their long-term stability may arise. As a consequence, a series of tests have been carried out by various laboratories, aiming at identifying possible specific failure mechanisms of metamorphic HEMT’s [5,78, 88–90]. All studies demonstrated that the metamorphic buffer has no specific negative influence on device reliability. Dammann et al. [5] studied 0:25 lm devices by means of biased life tests in air and nitrogen; using a 20% decrease in drain current as failure criterion they found a life time

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of 8 106 h at Tch ¼ 125 °C and an activation energy of 1.8 eV in nitrogen atmosphere. The median life was smaller in air (250 h, with Ea ¼ 0:7 eV), and the enhanced degradation, which consists in a shift of threshold voltage towards positive values, and a decrease of transconductance, was attributed to fluorine-induced donor compensation in the InAlAs. Identical failure modes were found by Meneghesso et al. [90] during biastemperature stress at 200° ; in their experiments, however, a dramatic degradation of the characteristics of Schottky contacts was observed, suggesting the contribution of metal interdiffusion and gate sinking effects. Finally, Mertens and del Alamo [91] studied the electrical degradation of 0:12 lm InAlAs/InGaAs metamorphic HEMTs stressed at room temperature at various drain voltages. Failed device develop a fairly large kink in the I–V characteristics, an increase in drain resistance and off-state breakdown voltage (without any change in source resistance), and a decrease in drain-gate capacitance. Degradation seems to be related to the electric field value in the gate-drain region, and is attributed to a reduction in the sheet carrier concentration on the drain side of the device, together with a degradation of drain ohmic contact. Failure mechanisms possibly involve hot-hole or hot-electron trapping at the surface, recombination-induced surface chemical reactions, resulting in surface potential modification and/or recombinationinduced defect growth in the heterostructure. The authors conclude, in agreement with results quoted above, that the electrical degradation of the devices is not connected with the metamorphic nature of the substrate.

9. Conclusions An impressive series of studies concerning reliability of InP-based and metamorphic InAlAs/InGaAs HEMTs has been carried out in the last 10 years, and a deeper understanding of the failure mechanisms of these devices has been achieved, in particular for what concerns hydrogen and fluorine effects, hot-electron degradation, dispersion effects. Low-noise devices have achieved very good values of reliability; improvements in device stability can enhance the voltage/current and high temperature capabilities needed for millimeter-wave power applications. Several open questions remain, concerning, for instance, surface stability and passivation, reduction/ elimination of fluorine doping compensation, and of hot-carrier-induced degradation. We expect, however, that the increasing need for efficient technologies at high frequencies (76, 94 and 140 GHz), together with substrate cost reduction (increased InP wafer diameters, use of metamorphic substrates on GaAs) and increased devices reliability will open the way for many applications of InAlAs/InGaAs HEMTs in future systems.

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Acknowledgements The authors greatly acknowledge T. Suemitsu and T. Enoki (NTT Photonics Laboratories) for fruitful collaborations, D. Buttari and A. Chini (University of Padova) for their technical support. This work was partially supported by NTT Photonic Laboratories, by ASI, by MURST and by CNR (Consiglio Nazionale delle Ricerche) P.F. MADESS II, Italy and USARDSGUK under the contracts N. 68171-01-M-5822 and N. 62558-02-M-5600.

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