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Frontside micromachining using purous-silicon sacrificial-layer technologies
A
ELSEVIER
Sensors and Actuators A 60 ( 19979 228-234
PHYSICAL
Frontside micromachining using porous-silicon sacrificial-layer technologies Th. Bischoff a, G. MiJller ~'*, W. Welser a, F. Koch t, Daimter-Benz AG, Forschungund Technik, Postfach 800465, D-81663 Munich, Germany h Physics Department El6, Technical University~fMunich, James.Franck.Strafle, D-85748 Garching, Geonany
Abstract Several electro- and photo-electrochemical processes are pointed out which allow silicon microstructures to be formed ~,ilhin ion-implanted silicon wafers. It is shown how different lateral and vertical doping profiles can be used to anodize selectively parts of the ion-implanted silicon wafers, creating isolated regions of porous silicon. After removal of the porous silicon in diluted KOH, micromachined structures emerge at the front surface of the silicon wafers which entirely consist of low-stress bulk crystalline silicon. Keyword~: Frontside micromachining; Porous silicon; Sacrificial-layer technology
1. Introduction
Porous silicon is created when silicon is treated electrochemically in HF solutions under anodic bias [ I ]. Under these circumstances silicon is not removed in a layer-by-layer fashion as in KOH. Rather, a sponge-like structure is formed which exhibits pore diameters ranging from a few nanometres up to several micrometres. In nanoporous material, which is formed by anodizing weakly doped p-type material, internal surface areas up to 104 m" cm- ~ of anodized material can be obtained. As is well known, porous material of this type exhibits an efficient photoluminescence when illuminated with UV light and electroluminescence under conditions of current injection, These luminescence properties have attracted a great deal of interest in recent years and several books and review articles have been devoted to this subject 12-4]. A different use of porous-silicon layers can be made in silicon micromachining [5-10]. In this context, porous-silicon layers are formed in predetermined parts of the silicon wafers and are removed afterwards using dilute chemical etches which are not able to attack the remaining bulk silicon to ~ny significant extent. With respect to the usually employed bulk- and surface-micromaehining techniques, the attraction of using porous silicon as a sacrificial layer is as follows: * Corresponding author. Tel.: -,-49 89 607 27847. Fax: + 49 89 607 25157 0924-4247/97/$17.00 © 1997ElsevierScience SA All rights reserved Pll S0924-4247 ( 97 ) 0 i 383-6
• the wealth of possible geotaetries is not limited by the crystallography of the silicon subslrates; • the etching of the silicon substrates is contined to the frontside of the wafers, i.e., protection waters for the rearside of the micromachined wafers are not required; • the vertical extent of the micromachined structures can be varied over a wide range extending from near-surface up to bulk silicon microstructures; • the micromachined structures consist entirely oflow-stress bulk crystalline silicon; • the use of HF as an etching agent guarantees enhanced compatibility with microelectronic fabrication processes. So far, two different approaches have been taken to arrive at porous-silicon sacrificial-layer technologies: in the first, metallic and dielectric passivation layers were used to deilne regions of chemical attack on the wafer surface 191. In the second, differently tloped overlayers of epitaxial silicon were used to create selectively porous-silicon sacrificial layers [7,8]. In the present work we extend this latter approach, using exclusively ion implantation and thermal drive-in procedures to create the necessary lateral and vertical doping profiles within the silicon wafers. The results given below demonstrate that in this way micromachined silicon structures with vertical dimensions typical of bulk- and surface-micromachined silicon devices can be obtained. In addition, the demonstrator structures displayed below are to highlight the application potential of this technique and the simplicity of the sample preparation.
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2. Elementary considerations about etching and passivation in HF electrolytes When silicon wafers are brought into contact with an aqueous solution of HF, charge carriers are exchanged with the ions in the electrolyte. In this situation a band-bending profile develops at the semiconductor/electrolyte interface. Due to the fact that the Fermi level in the acid electrolyte coincides inore or less exactly with the position of the Fermi level in intrinsic silicon, the bands bend in opposite directions when n- or p-type silicon wafers are immersed in HF. This situation is shown in Fig. I(a) and (b). Considering the fact that porous-silicon formation is initiated when F - ions are discharged by electronic holes at the semiconductor/electrolyte interface, a scheme can be devised that allows the chemical attack to become laterally confined to predetermined regions on the wafer surfaces. Fig. I~ a) shows that silicon dissolution takes place when a p-type wafer is biased anodieally. Fig. I (b), on the other hand, shows that under the same biasing conditions n-type Si stays ine, t. A ptype wafer therefore can be protected against etching by ntype doping of selected areas on the wafer surface. Fig. 1(c) and (d), finally, shows that cathodic polarization tends to passivate p-type material, whereas n-type regions merely start to discharge hydrogen ions, thereby giving rise to the evolution of H.~ gas. Fig. 2 shows a situation when p- and n-type silicon wafers are immersed into HF and illuminated with above-bandgap light in the absence of an applied potential. This latter picture
Table I Silicon etching in HF under dark conditions Bias potenlial of Si wafer
P-type Si
N-type Si
No applied bias Anodically biased Cathodically biased
no
reaction polous silicon form,a!ion no reaction
no reaclion rio reaction H., evolution
Table 2 Siliconetchingin HF undervisible-lightilluminalion Bias potentialof Si wafer
P-typeSi
N-typoSi
No applied bias Anodically biased
weak H., evolution porous silicon formation H, evolution
porous silicon form~ion porous silicon form<.~ion
Cathodically biased
H, evolution
shows that a p-type silicon electrode stays chemically inert because there, the photogenerated holes are being swept into the bulk of the semiconductor material. The photogenerated electrons, on the other hand, are swept towards the semiconductor/electrolyte interface, discharging H* ions there and evolving 1-12gas. In n-type silicon the converse is true: the photogenerated electrons are swept into the bulk and the holes initiate porous-silicon formation at the semiconductor/electrolyte interface. The results of these considerations can be summarized as shown in Tables I and 2.
3. Experimental details t90 j
The etching apparatus used in our experiments is shown in Fig. 3. It co,,sists of a double-tank cell separated by the silicon water to be structured. For the electrochemical processing the two volumes of the HF solution were individually contacted by t'>t .~,Tids.The upper surface of the wafer faced the cathodically biased grid while the rear surface faced the anodically biased grid in the other tank. The electrical currents through this double-cell arrangement were controlled by a potentiostat. In order to allow the wafers to be illuminated,
(c)
0<3
Fig. I. Surface band bending in p- and n-type Si at the silicon/HF interface: (a) p-typo St, anodic bias; (b) n-type St, anodic bias; (c) p-type Si cathodic bias; (d) n-type Si, cathodic bias.
h
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Pt grid Fig. 2. Surface band bending and carrier collection in illuminated n- and ptype silicon at the sihcon/HF interface.
S~sample
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Fig. 3. Double-lank electrochemical celt used in the etching experiments.
230
7h. Bisch¢~Jy'etal. / Sensors and Actuators A 60 (1997) 22I~-234
each half cell was equipped with a window consisting of a 4 inch sapphire water. For the lateral and vertical definition of the electrochemical attack, n- and p-type regions were formed inside the silicon wafers by mean.,', of masked ion implantations. In order to avoid channelling effects, all implantations were carried out through a lherrnat oxide layer of 50 nm thickness. Implantation energies were fixed at 160 keV and areal doses at5 x IO~5 cm z. N-type regions were formed by means of phosphorus ,~nd p-type ones by means of boron implantations. Shallow doped layers (t=0.3--0.5 i~m) were formed by performing short activation anneals. Thicker layers were obtained by thermal drive-in procedures which yielded n- and p-type wells with thicknesses up to 8 ixm. In case very shallow ntype layers with almost rectangular depth profiles were desired, ,arsenic implantations were performed. For the processing of the implanted wafers, metallic contacts were not deposited onto those implanted regions that were exposed to the HF electrolytes. In case potentials had to be applied to the implanted regions, the electrical contacting was made by AI spots evaporated onto the peripheral regions of the silicon wafers. These latter regions were prote :ted against the HF by means of speciall~ designed mechanical supports. After forming porous silicon in selected areas of the silicon wafers, it was removed by immersing the wafers into diluted KOH ( 1% KOH in H20) at room temperature. In general, such a treatment was sufficient for removing the sponge-like porous silicon. The remaining bulk silicon parts, on the other hand, were not attacked to any significant extent by this treatment. If compatibility with microelectronic production processes is desired, other hydroxides such as TMAH can be used instead of KOH.
4. Experimental results on sacrificial-layer processes 4. I. Electrochemical np process
In this set of experiments p-type wafers (p = 30-501~ cm) were used and processed in the way shown in Fig. 4. In order to protect parts of their front surfaces against electrochemical attack, shallow n-type layers were implanted. The contact to the rearside was improved by implanting heavily doped p + layers. For the anodization experiments the preprocessed wafers were immersed into the double-tank celt described above with the implanted n-type layers facing the cathoditally biased Pt grid. The biasing conditions so obtained are also indicated in Fig. 4. Using constant-current conditions, we lbund that etch grooves up to 20 i.tm deep can be obtained. Larger depths were impossible because the n-type passivation layers tended to corrode also, although at a much smaller rate. We found that during the anodization of the p-type material, the current distribution within the wafers tended to change and the poten-" tiai of the n-type regions to float away. Significantly larger etch depth could be obtained when the potential of the n-type
potential stabilization: Pt.counter electrode
sample under anodic bias: creation of porous siIicor~ n-type area~ in p-type areas stay inert /
/
L
ooJI
..........
Fig. 4. Struclure of the implored silicon wafers used in the electrochemical np processing experiments. The inset in the upper right-hand side sketches the band bending at the silicon/electrolyte interfaces; the blow-up on the left-hand side skelches the bias circuit used for the potential stabilization of Ihe n-type regions.
/i:iI I~fT?i~
i
Fig. 5, REM picture of a silicon sample micromachined using the electrochemical np process. Potential stabilization of the implanted n-type regions allowed etch grooves up to several hundred microns in depth to be obtained,
regions was stabilized using the constant-potential method sketched in the left-hand part of Fig. 4. Under these latter conditions etch depths approaching the wafer thickness could be obtained. An example ofa micromachined silicon structure which had been formed using this kind of potential stabilization is shown in Fig. 5, which demonstrates clearly that mask-defined structures can be obtained, the geometry of which is not limited by the crystallography of the underlying substrate. A second observation is that the etching is isotropic. This isotropic process leads to an undercutting beneath the passivated n-type layer in the centre. The magnitude of this undercutting is comparable in size to the depth of the etch groove formed in the unpassivated areas of the p-type wafer. In case a complete rentoval of the p-type material underneath the passivated n-type regions is desired, the depth of the etch grooves had to be made sufficiently large and/or the passivatc~ areas needed to be perforated as indicated in Fig. 6. 4.2. Photovoltaic p ~p process
A particularly simple method of forming shallow recesses within p-type wafers is high-dose boron implantation into those areas which are to be removed. The actual depth of the recesses is determined by the implantation dose, the depth of the thermal drive-in anneal and the background doping of the substrate p-type wafer. Alter immersing the implanted wafers into an HF electrolyte, a band profile as shown in Fig. 7 will be formed. This band profile tends to sweep out the photogenerated holes towards the p+ areas (x-direction in
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Tit Bi.whoff et al. / Sensors and Act',roots A 60 (1997) 228-234
first approach:
redesi~: seertfrom above ~
I illumination
~
1
n.implantation
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-~s~
)
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I
porous silicon
\
....
~:c~-Si
(b)
!i:.ii
illumLaacio~in HF
>
remaimng silicon Fig. 6. hdluencc of perforation on the undecculzing bchaviour underneath ntype passivation layers.
remo',~toFpamusSt trtdilutedKOH Fig. 7. (a) Band bending and carrier collection in an illuminated p" p wafer after immersion into HF: t b) l~',ssible device application.
Fig. 7(a) ). Due to the thin potential barrier at the p' -St/ electrolyte interface, the photogenerated holes recombine very easily with the F ions in the electrolyte (y-direction in Fig. 7(a)), thereby allowing the p' regions to become porous. The photogenerated electn)ns, on the other hand, are swept towards the lower-doped p regions and tinally become attracted by the downward-bending bands at the p-St/electrolyte interface (y-direction in Fig. 7(a)). Electron-hole recombination at this interface causes the p-type regions of the wafer surface to become passivatcd. Etched recesses with depths up to 6 ~m could be obtained with this technique. 4.3. Photovoltaic npn process
The idea behind this process is illustrated in Fig. 8 [61. The implanted wafers (Fig. 8(a)) are immersed in HF and illuminated without applying any external potentials. In this
illumination
p doped layer
n+ /
implantation
n substrate
situation the photogenerated electron-hole pairs become separated by the pn-junction tields in the bulk of the silicon substrates (x-direction in Fig. 8(c)). Carrier diffusion towards the wafer surface (y-direction in Fig. 8(c)) subsequently generates local electrochemical cells with the p-type regions self-biasing anodically (Fig. 8(b)). In this way, p-type regions become porous while n-type regions simply discharge H" ions and thereby evolve gaseous Hr. Using this process, 3if) nm thick cantilever structures were formed above 4 ~m deep grooves. To this end, a transistorlike npn structure was formed inside a lightly doped n-type wafer. The 'base' layer was formed by a masked ion implantation tbllowed by a drive-in anneal. The 'emitter' n-layer was formed inside the p-well by carrying out a shallow arsenic implantation and a short activation anneal. With respect to their vertical dimensions, the structures shown in Fig. 9 are comparable to surface-micromachined polysilicon structures
(a)
1 (~)
(~
(b)
" Y I<
x
.l_y_.
(e) Fig. 8. Surface micromachining using the pholovoltaic npn process: (a) silicon wafer with implanted layers; (b) illumination-induced formation of an electrochemical cell at the wafer surface: ( c ) carrier cnllection within an illuminated pn junction with the n- and p-type surfaces being immersed in HF.
Th. Bischt~ et at. I Sensors and Actuaum¢ A 60 (1997) ",!28-234
232
p implantation X
metal pads ,. ......
".
"-'-~-~-~--~-%.St
i-
I-~
-
'
~, m tal contact
~
implantation
n sub'=Irate
(a)
light
Fig. 9, Monocrystallinesiliconcantileversformedat the surfaceof a silicon wafer.The cantileverswereseparatedfromthe supportingsiliconsubstmtes using the photovoltaicnpn process. The thicknessof the cantileverscorresponds to the thicknessof the n+ 'emitter' layer ( t,:,=0.3 Ixm): the depthof the etch groove is determinedby the drive-indepthof the implanted'base' layer (d~=4 ttm).
I I I ] . Two important differences, however, have to be noted: first, our cantilever beams entirely consist of bulk monocrystalline silicon with low intrinsic stress. This can best be seen from the small cantilever beam in the lower part of Fig. 9. The other difference to be noted is that the porous-silicon sacrilicial-layer technology is a planar process in that all structures are formed inside the wafer and not on top of the wafer surface as in standard silicon micromachining techniques.
4.4. Photo-electrochemical np process Due to the limited vertical extent of the implanted npn structures, the photo-electrochemical process described above is only able to generate near-surface structures. A photo-electrochemical process capable of generating structures with much larger vertical extent is illustrated in Fig. 10. This Figure displays the silicon wafer with its implantation profiles and the photogeneration and carrier-collection process within the reverse-biased np structure and the silicon/ electrolyte interface, respectively. In such reverse-biased np structures the self-bias created by the illumination is compensated by an externally applied voltage. The photocurrents generated within the bulk silicon are forced to flow through the biasing circuit (x-direction of Fig. 10(b) ). These currents therefore cannot interfere with the carrier-collection processes at the n/electrolyte and p/electrolyte surfaces. Due to the vanishing self-bias, the two different types of interface on one and the same wafer behave as independent n- and ptype wafers immersed in the HF. As a consequence, etching proceeds as indicated in Fig. 2: p-type surfaces discharge H + ions while n-type ones become porous. Microstrueture demonstrators obtained in this way are shown in Fig. ! 1. In these examples 2 p.m thick cantilever beams were formed above
l light
f=l 4)00
[light
-~siF, -
o l ooo
®
t
~-I -
ilight
llight
[i
x
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/
- l-Y--
(b)
Fig. I0. Surfacemicromachiningusing the photo.electrochemicalnp process: (a) siliconwaferwith implantationprofiles;(b) photogenerationand carriercollectionwithina reverse-biasedand illuminatednp structureafter immersionintoHF.
90 p.m deep grooves. During the processing the samples had been illuminated for 2 h in 25% HF applying a reverse bias of 1.5 V.
5. Conclusions Ion-implanted silicon wafers have been subjected to a number of electro- and photo-electrochemical processes in HF. The results of our work demonstrate that ion implantation and thermal drive-in procedures can be successfully used to delineate areas of chemical attack at and underneath a silicon wafer surface. In these areas porous silicon is formed, which can subsequently be removed without damaging the remaining crystalline silicon. Using this sacrificial-layer technology, a number of microstructures have been delineated at the wafer surface and released from the supporting silicon substrate material. The silicon microstructures so formed have vertical
Th, Bischaff et al. /Sensors and Actuawrs A 601 I997) 228~234
233
14] S. Finkbeiner and J. Weber, interp;etation of the tem~ralure dependence of the strongly visible photoluminesceneeof p~rous silicon. Thin Solid Film~,.255 (1995) ~4-257. [5] A Halimaoui, Porous silicon: materi~] processing, properties and applications,in JC. VialandJ. Derrien I eds.). Poro~ Silicon Science an,l 7echnoh~gy: WinterSchool. Les Hooches. France. 1994, Springer, Berlin, 1994. 161 T+ Yoshida. T. Kudo and K ikeda, Photo-induced preferential anodization for microraachining,Sensors Mater, 4/5 (1993) 229238. 171 R. Mlcak, HL. Tuller, P. Greiff,Ji Sohn and L. Nites, Photoa,ssistecl electrochemicalmicromachiningof siliconin HF electrolytes,Sensors and Actuators A. 40 (1994) 49-55. [8 ] P.TJ_ Gennissenel al., Poroussilicon micromachiningtechniquesfor :~cclerometer fabrication, Proc. ESSDERC '95, The Hague, Netherlands. 1995. pp. 593-596. 191 P, Steiner,A. RichterandW. Lang,Usingporoussiliconas a szcrificial layer,,/. Micromech. Microeng,. 3 (1993) 32-36. [ 101 V. Lehmann,The physicsof macroporoussiliconformation,ThinSolid Films. 255 (1995) I-4. [ I I [ RT. Howe, Polysiliconintegrated microsystems:technologiesand applications, Tech_ Digest. 8th lnt. Conf Solid-State Semvors and Fig. I I. Surface-micromachinedsiliconstructuresobtainedby n-eeansof the photo-electrochemicalnp process: (a) cantileverbeams; (b) rectangular cantilever structures. The thicknessof lhe cantileversamountsto about 2 pan; the depthof the etch grooveunderneathto about 90 ~m.
extensions in the range 0.3--4 Ixm, i.e., dimensions typical of surface-micromachined silicon structures. The vertical dimensions of the etch grooves which separate the surfaccmicromachined silicon structures from the supporting silicon wafers could be controlled within the range from 4 l~m up to several hundreds of micrometres. The porous-silicon sacrificial-layer technology therefore holds the potential of becoming a versatile tool which allows surface- and bulkmicromachined structures to be created within one and the same silicon wafer.
Acknowledgements The authors gratefully acknowledge interest and support by Drs B. Thomas and S Paasche. Thanks are also due f,o the Technology Group of the Daimler-Benz Research Group at Ottobrunn.
References II] J.C. Vial and J. Demen (eds.), Porotls Silicon Science and Technology: Winter School Les Houehes. France. 1994. Springer, Berlin, 1994, [2] J, Zeman,M. Zigone,G Martinez,G.L.J,A.Rikken,P. Bordetand J. Chenevas,On the originof the poroussiliconluminescence.ThinSolid Fibns, 255 (1995) 35-38. [3] W. Lang. P. Steiner and F. Koslowski,Ol~todectronicpropenies of porous silicon. The electroluminescentdevices, in J.C. Vial and J. Derrien (eds.), Porous Silicon Science and Technology: Winter School. Les Hmwhes, France, 1994, Springer,Berlin, 1994.
Actuan~rs (Transdl.cers "95/Eun~sensorsIX), Stockholm, Sweden. 2529 June. 1995,paper 3-A0.
Biographies Thomas B i s c h o f f w a s born in 1969. He graduated in physics from the Technical University of Munich in 1996, In 1995/96 he was employed at the Microsensors Department of the Daimler Benz Central Research Unit in Munich. During this time he was working on his MSc. thesis dealing with micromachining technologies based on porous-silicon sacrificial layers. Currently his employment is with Siemens AG in Munich. Gerhard Miiller was born in i 948. He graduated in physics from the University of Heidelberg in 1974 and obtained a Ph.D, degree in 1976. Subsequently he was employed at the Max-Planck-lnstitute for Nuclear Physics in Heidelberg, where he performed work on ion implantation and nuclear solid-state physiscs, In 1979 he changed to the University of Dundee, UK, where he started research on hydrogenated amorphous silicon. In t981 he moved to Messerschmitt-Boelkow-Blohm GmbH, Munich, where he performed development work on thin-film solar-cell modules. Since 1986 he has been active in the field of silicon micromachining and sensors. His special interests include silicon-compatible thin films and fabrication processes. Since 1994 he has worked for DaimlerBenz Central Research. Wolfgang Welser was born in 1958 in Eichst~itt, Germany. He studied technical physics at the Technical University of Munich and graduated there in 1986, Thereafter he was employed at Messerschmitt-Boelkow-Blohm GmbH in Munich, where he worked on semiconductor radiation detectors. Since 1990 he has been strongly involved in the design of surface- and bulk-micromachined accelerometers, auto-
234
Th. Bischoff et al. /Sensors and Actuators A 60 t 1997) 228-234
motive sensors and infrared devices. His current employment is with Daimler-Benz Central Research, Munich. Frederik K o c h was born in 1937. He graduated in physics from the University of New York in 1958 and obtained a Ph.D. degree in physics from the University of Berkeley, California, in 1962. After several university positions in the United States and the Soviet Union, he became a full professor at the University of Maryland in I970. Since 1972 he has
held the chair for experimental solid-state physics in theTechnical University of Munich. His research interests are in electronic properties of metals and semiconductors, optical and transport properties of semiconductors, solid surfaces and heterostruetures. He is an author and co-author of more than 250 scientific papers, He has received several awards for outstanding work in the field of solid-state sciences and he is a member of major German and American research organizations.
ELSEVIER
Sensors and Actuators A 60 ( 19979 228-234
PHYSICAL
Frontside micromachining using porous-silicon sacrificial-layer technologies Th. Bischoff a, G. MiJller ~'*, W. Welser a, F. Koch t, Daimter-Benz AG, Forschungund Technik, Postfach 800465, D-81663 Munich, Germany h Physics Department El6, Technical University~fMunich, James.Franck.Strafle, D-85748 Garching, Geonany
Abstract Several electro- and photo-electrochemical processes are pointed out which allow silicon microstructures to be formed ~,ilhin ion-implanted silicon wafers. It is shown how different lateral and vertical doping profiles can be used to anodize selectively parts of the ion-implanted silicon wafers, creating isolated regions of porous silicon. After removal of the porous silicon in diluted KOH, micromachined structures emerge at the front surface of the silicon wafers which entirely consist of low-stress bulk crystalline silicon. Keyword~: Frontside micromachining; Porous silicon; Sacrificial-layer technology
1. Introduction
Porous silicon is created when silicon is treated electrochemically in HF solutions under anodic bias [ I ]. Under these circumstances silicon is not removed in a layer-by-layer fashion as in KOH. Rather, a sponge-like structure is formed which exhibits pore diameters ranging from a few nanometres up to several micrometres. In nanoporous material, which is formed by anodizing weakly doped p-type material, internal surface areas up to 104 m" cm- ~ of anodized material can be obtained. As is well known, porous material of this type exhibits an efficient photoluminescence when illuminated with UV light and electroluminescence under conditions of current injection, These luminescence properties have attracted a great deal of interest in recent years and several books and review articles have been devoted to this subject 12-4]. A different use of porous-silicon layers can be made in silicon micromachining [5-10]. In this context, porous-silicon layers are formed in predetermined parts of the silicon wafers and are removed afterwards using dilute chemical etches which are not able to attack the remaining bulk silicon to ~ny significant extent. With respect to the usually employed bulk- and surface-micromaehining techniques, the attraction of using porous silicon as a sacrificial layer is as follows: * Corresponding author. Tel.: -,-49 89 607 27847. Fax: + 49 89 607 25157 0924-4247/97/$17.00 © 1997ElsevierScience SA All rights reserved Pll S0924-4247 ( 97 ) 0 i 383-6
• the wealth of possible geotaetries is not limited by the crystallography of the silicon subslrates; • the etching of the silicon substrates is contined to the frontside of the wafers, i.e., protection waters for the rearside of the micromachined wafers are not required; • the vertical extent of the micromachined structures can be varied over a wide range extending from near-surface up to bulk silicon microstructures; • the micromachined structures consist entirely oflow-stress bulk crystalline silicon; • the use of HF as an etching agent guarantees enhanced compatibility with microelectronic fabrication processes. So far, two different approaches have been taken to arrive at porous-silicon sacrificial-layer technologies: in the first, metallic and dielectric passivation layers were used to deilne regions of chemical attack on the wafer surface 191. In the second, differently tloped overlayers of epitaxial silicon were used to create selectively porous-silicon sacrificial layers [7,8]. In the present work we extend this latter approach, using exclusively ion implantation and thermal drive-in procedures to create the necessary lateral and vertical doping profiles within the silicon wafers. The results given below demonstrate that in this way micromachined silicon structures with vertical dimensions typical of bulk- and surface-micromachined silicon devices can be obtained. In addition, the demonstrator structures displayed below are to highlight the application potential of this technique and the simplicity of the sample preparation.
229
Th, BischoSf et al. / Sensors and Actuators A 60 (1997) 228-234
2. Elementary considerations about etching and passivation in HF electrolytes When silicon wafers are brought into contact with an aqueous solution of HF, charge carriers are exchanged with the ions in the electrolyte. In this situation a band-bending profile develops at the semiconductor/electrolyte interface. Due to the fact that the Fermi level in the acid electrolyte coincides inore or less exactly with the position of the Fermi level in intrinsic silicon, the bands bend in opposite directions when n- or p-type silicon wafers are immersed in HF. This situation is shown in Fig. I(a) and (b). Considering the fact that porous-silicon formation is initiated when F - ions are discharged by electronic holes at the semiconductor/electrolyte interface, a scheme can be devised that allows the chemical attack to become laterally confined to predetermined regions on the wafer surfaces. Fig. I~ a) shows that silicon dissolution takes place when a p-type wafer is biased anodieally. Fig. I (b), on the other hand, shows that under the same biasing conditions n-type Si stays ine, t. A ptype wafer therefore can be protected against etching by ntype doping of selected areas on the wafer surface. Fig. 1(c) and (d), finally, shows that cathodic polarization tends to passivate p-type material, whereas n-type regions merely start to discharge hydrogen ions, thereby giving rise to the evolution of H.~ gas. Fig. 2 shows a situation when p- and n-type silicon wafers are immersed into HF and illuminated with above-bandgap light in the absence of an applied potential. This latter picture
Table I Silicon etching in HF under dark conditions Bias potenlial of Si wafer
P-type Si
N-type Si
No applied bias Anodically biased Cathodically biased
no
reaction polous silicon form,a!ion no reaction
no reaclion rio reaction H., evolution
Table 2 Siliconetchingin HF undervisible-lightilluminalion Bias potentialof Si wafer
P-typeSi
N-typoSi
No applied bias Anodically biased
weak H., evolution porous silicon formation H, evolution
porous silicon form~ion porous silicon form<.~ion
Cathodically biased
H, evolution
shows that a p-type silicon electrode stays chemically inert because there, the photogenerated holes are being swept into the bulk of the semiconductor material. The photogenerated electrons, on the other hand, are swept towards the semiconductor/electrolyte interface, discharging H* ions there and evolving 1-12gas. In n-type silicon the converse is true: the photogenerated electrons are swept into the bulk and the holes initiate porous-silicon formation at the semiconductor/electrolyte interface. The results of these considerations can be summarized as shown in Tables I and 2.
3. Experimental details t90 j
The etching apparatus used in our experiments is shown in Fig. 3. It co,,sists of a double-tank cell separated by the silicon water to be structured. For the electrochemical processing the two volumes of the HF solution were individually contacted by t'>t .~,Tids.The upper surface of the wafer faced the cathodically biased grid while the rear surface faced the anodically biased grid in the other tank. The electrical currents through this double-cell arrangement were controlled by a potentiostat. In order to allow the wafers to be illuminated,
(c)
0<3
Fig. I. Surface band bending in p- and n-type Si at the silicon/HF interface: (a) p-typo St, anodic bias; (b) n-type St, anodic bias; (c) p-type Si cathodic bias; (d) n-type Si, cathodic bias.
h
= . . . . . . . . . . . . . . . . .
~ illumination
=>H2
height o1" rect~lyt.e
/ ' 7 .
.
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.
.
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.
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.
il .
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f illumination
o o 0
Pt grid Fig. 2. Surface band bending and carrier collection in illuminated n- and ptype silicon at the sihcon/HF interface.
S~sample
sapphirewafer
Fig. 3. Double-lank electrochemical celt used in the etching experiments.
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each half cell was equipped with a window consisting of a 4 inch sapphire water. For the lateral and vertical definition of the electrochemical attack, n- and p-type regions were formed inside the silicon wafers by mean.,', of masked ion implantations. In order to avoid channelling effects, all implantations were carried out through a lherrnat oxide layer of 50 nm thickness. Implantation energies were fixed at 160 keV and areal doses at5 x IO~5 cm z. N-type regions were formed by means of phosphorus ,~nd p-type ones by means of boron implantations. Shallow doped layers (t=0.3--0.5 i~m) were formed by performing short activation anneals. Thicker layers were obtained by thermal drive-in procedures which yielded n- and p-type wells with thicknesses up to 8 ixm. In case very shallow ntype layers with almost rectangular depth profiles were desired, ,arsenic implantations were performed. For the processing of the implanted wafers, metallic contacts were not deposited onto those implanted regions that were exposed to the HF electrolytes. In case potentials had to be applied to the implanted regions, the electrical contacting was made by AI spots evaporated onto the peripheral regions of the silicon wafers. These latter regions were prote :ted against the HF by means of speciall~ designed mechanical supports. After forming porous silicon in selected areas of the silicon wafers, it was removed by immersing the wafers into diluted KOH ( 1% KOH in H20) at room temperature. In general, such a treatment was sufficient for removing the sponge-like porous silicon. The remaining bulk silicon parts, on the other hand, were not attacked to any significant extent by this treatment. If compatibility with microelectronic production processes is desired, other hydroxides such as TMAH can be used instead of KOH.
4. Experimental results on sacrificial-layer processes 4. I. Electrochemical np process
In this set of experiments p-type wafers (p = 30-501~ cm) were used and processed in the way shown in Fig. 4. In order to protect parts of their front surfaces against electrochemical attack, shallow n-type layers were implanted. The contact to the rearside was improved by implanting heavily doped p + layers. For the anodization experiments the preprocessed wafers were immersed into the double-tank celt described above with the implanted n-type layers facing the cathoditally biased Pt grid. The biasing conditions so obtained are also indicated in Fig. 4. Using constant-current conditions, we lbund that etch grooves up to 20 i.tm deep can be obtained. Larger depths were impossible because the n-type passivation layers tended to corrode also, although at a much smaller rate. We found that during the anodization of the p-type material, the current distribution within the wafers tended to change and the poten-" tiai of the n-type regions to float away. Significantly larger etch depth could be obtained when the potential of the n-type
potential stabilization: Pt.counter electrode
sample under anodic bias: creation of porous siIicor~ n-type area~ in p-type areas stay inert /
/
L
ooJI
..........
Fig. 4. Struclure of the implored silicon wafers used in the electrochemical np processing experiments. The inset in the upper right-hand side sketches the band bending at the silicon/electrolyte interfaces; the blow-up on the left-hand side skelches the bias circuit used for the potential stabilization of Ihe n-type regions.
/i:iI I~fT?i~
i
Fig. 5, REM picture of a silicon sample micromachined using the electrochemical np process. Potential stabilization of the implanted n-type regions allowed etch grooves up to several hundred microns in depth to be obtained,
regions was stabilized using the constant-potential method sketched in the left-hand part of Fig. 4. Under these latter conditions etch depths approaching the wafer thickness could be obtained. An example ofa micromachined silicon structure which had been formed using this kind of potential stabilization is shown in Fig. 5, which demonstrates clearly that mask-defined structures can be obtained, the geometry of which is not limited by the crystallography of the underlying substrate. A second observation is that the etching is isotropic. This isotropic process leads to an undercutting beneath the passivated n-type layer in the centre. The magnitude of this undercutting is comparable in size to the depth of the etch groove formed in the unpassivated areas of the p-type wafer. In case a complete rentoval of the p-type material underneath the passivated n-type regions is desired, the depth of the etch grooves had to be made sufficiently large and/or the passivatc~ areas needed to be perforated as indicated in Fig. 6. 4.2. Photovoltaic p ~p process
A particularly simple method of forming shallow recesses within p-type wafers is high-dose boron implantation into those areas which are to be removed. The actual depth of the recesses is determined by the implantation dose, the depth of the thermal drive-in anneal and the background doping of the substrate p-type wafer. Alter immersing the implanted wafers into an HF electrolyte, a band profile as shown in Fig. 7 will be formed. This band profile tends to sweep out the photogenerated holes towards the p+ areas (x-direction in
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first approach:
redesi~: seertfrom above ~
I illumination
~
1
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)
p-wa~r
I
porous silicon
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~:c~-Si
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remaimng silicon Fig. 6. hdluencc of perforation on the undecculzing bchaviour underneath ntype passivation layers.
remo',~toFpamusSt trtdilutedKOH Fig. 7. (a) Band bending and carrier collection in an illuminated p" p wafer after immersion into HF: t b) l~',ssible device application.
Fig. 7(a) ). Due to the thin potential barrier at the p' -St/ electrolyte interface, the photogenerated holes recombine very easily with the F ions in the electrolyte (y-direction in Fig. 7(a)), thereby allowing the p' regions to become porous. The photogenerated electn)ns, on the other hand, are swept towards the lower-doped p regions and tinally become attracted by the downward-bending bands at the p-St/electrolyte interface (y-direction in Fig. 7(a)). Electron-hole recombination at this interface causes the p-type regions of the wafer surface to become passivatcd. Etched recesses with depths up to 6 ~m could be obtained with this technique. 4.3. Photovoltaic npn process
The idea behind this process is illustrated in Fig. 8 [61. The implanted wafers (Fig. 8(a)) are immersed in HF and illuminated without applying any external potentials. In this
illumination
p doped layer
n+ /
implantation
n substrate
situation the photogenerated electron-hole pairs become separated by the pn-junction tields in the bulk of the silicon substrates (x-direction in Fig. 8(c)). Carrier diffusion towards the wafer surface (y-direction in Fig. 8(c)) subsequently generates local electrochemical cells with the p-type regions self-biasing anodically (Fig. 8(b)). In this way, p-type regions become porous while n-type regions simply discharge H" ions and thereby evolve gaseous Hr. Using this process, 3if) nm thick cantilever structures were formed above 4 ~m deep grooves. To this end, a transistorlike npn structure was formed inside a lightly doped n-type wafer. The 'base' layer was formed by a masked ion implantation tbllowed by a drive-in anneal. The 'emitter' n-layer was formed inside the p-well by carrying out a shallow arsenic implantation and a short activation anneal. With respect to their vertical dimensions, the structures shown in Fig. 9 are comparable to surface-micromachined polysilicon structures
(a)
1 (~)
(~
(b)
" Y I<
x
.l_y_.
(e) Fig. 8. Surface micromachining using the pholovoltaic npn process: (a) silicon wafer with implanted layers; (b) illumination-induced formation of an electrochemical cell at the wafer surface: ( c ) carrier cnllection within an illuminated pn junction with the n- and p-type surfaces being immersed in HF.
Th. Bischt~ et at. I Sensors and Actuaum¢ A 60 (1997) ",!28-234
232
p implantation X
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Fig. 9, Monocrystallinesiliconcantileversformedat the surfaceof a silicon wafer.The cantileverswereseparatedfromthe supportingsiliconsubstmtes using the photovoltaicnpn process. The thicknessof the cantileverscorresponds to the thicknessof the n+ 'emitter' layer ( t,:,=0.3 Ixm): the depthof the etch groove is determinedby the drive-indepthof the implanted'base' layer (d~=4 ttm).
I I I ] . Two important differences, however, have to be noted: first, our cantilever beams entirely consist of bulk monocrystalline silicon with low intrinsic stress. This can best be seen from the small cantilever beam in the lower part of Fig. 9. The other difference to be noted is that the porous-silicon sacrilicial-layer technology is a planar process in that all structures are formed inside the wafer and not on top of the wafer surface as in standard silicon micromachining techniques.
4.4. Photo-electrochemical np process Due to the limited vertical extent of the implanted npn structures, the photo-electrochemical process described above is only able to generate near-surface structures. A photo-electrochemical process capable of generating structures with much larger vertical extent is illustrated in Fig. 10. This Figure displays the silicon wafer with its implantation profiles and the photogeneration and carrier-collection process within the reverse-biased np structure and the silicon/ electrolyte interface, respectively. In such reverse-biased np structures the self-bias created by the illumination is compensated by an externally applied voltage. The photocurrents generated within the bulk silicon are forced to flow through the biasing circuit (x-direction of Fig. 10(b) ). These currents therefore cannot interfere with the carrier-collection processes at the n/electrolyte and p/electrolyte surfaces. Due to the vanishing self-bias, the two different types of interface on one and the same wafer behave as independent n- and ptype wafers immersed in the HF. As a consequence, etching proceeds as indicated in Fig. 2: p-type surfaces discharge H + ions while n-type ones become porous. Microstrueture demonstrators obtained in this way are shown in Fig. ! 1. In these examples 2 p.m thick cantilever beams were formed above
l light
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~-I -
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Fig. I0. Surfacemicromachiningusing the photo.electrochemicalnp process: (a) siliconwaferwith implantationprofiles;(b) photogenerationand carriercollectionwithina reverse-biasedand illuminatednp structureafter immersionintoHF.
90 p.m deep grooves. During the processing the samples had been illuminated for 2 h in 25% HF applying a reverse bias of 1.5 V.
5. Conclusions Ion-implanted silicon wafers have been subjected to a number of electro- and photo-electrochemical processes in HF. The results of our work demonstrate that ion implantation and thermal drive-in procedures can be successfully used to delineate areas of chemical attack at and underneath a silicon wafer surface. In these areas porous silicon is formed, which can subsequently be removed without damaging the remaining crystalline silicon. Using this sacrificial-layer technology, a number of microstructures have been delineated at the wafer surface and released from the supporting silicon substrate material. The silicon microstructures so formed have vertical
Th, Bischaff et al. /Sensors and Actuawrs A 601 I997) 228~234
233
14] S. Finkbeiner and J. Weber, interp;etation of the tem~ralure dependence of the strongly visible photoluminesceneeof p~rous silicon. Thin Solid Film~,.255 (1995) ~4-257. [5] A Halimaoui, Porous silicon: materi~] processing, properties and applications,in JC. VialandJ. Derrien I eds.). Poro~ Silicon Science an,l 7echnoh~gy: WinterSchool. Les Hooches. France. 1994, Springer, Berlin, 1994. 161 T+ Yoshida. T. Kudo and K ikeda, Photo-induced preferential anodization for microraachining,Sensors Mater, 4/5 (1993) 229238. 171 R. Mlcak, HL. Tuller, P. Greiff,Ji Sohn and L. Nites, Photoa,ssistecl electrochemicalmicromachiningof siliconin HF electrolytes,Sensors and Actuators A. 40 (1994) 49-55. [8 ] P.TJ_ Gennissenel al., Poroussilicon micromachiningtechniquesfor :~cclerometer fabrication, Proc. ESSDERC '95, The Hague, Netherlands. 1995. pp. 593-596. 191 P, Steiner,A. RichterandW. Lang,Usingporoussiliconas a szcrificial layer,,/. Micromech. Microeng,. 3 (1993) 32-36. [ 101 V. Lehmann,The physicsof macroporoussiliconformation,ThinSolid Films. 255 (1995) I-4. [ I I [ RT. Howe, Polysiliconintegrated microsystems:technologiesand applications, Tech_ Digest. 8th lnt. Conf Solid-State Semvors and Fig. I I. Surface-micromachinedsiliconstructuresobtainedby n-eeansof the photo-electrochemicalnp process: (a) cantileverbeams; (b) rectangular cantilever structures. The thicknessof lhe cantileversamountsto about 2 pan; the depthof the etch grooveunderneathto about 90 ~m.
extensions in the range 0.3--4 Ixm, i.e., dimensions typical of surface-micromachined silicon structures. The vertical dimensions of the etch grooves which separate the surfaccmicromachined silicon structures from the supporting silicon wafers could be controlled within the range from 4 l~m up to several hundreds of micrometres. The porous-silicon sacrificial-layer technology therefore holds the potential of becoming a versatile tool which allows surface- and bulkmicromachined structures to be created within one and the same silicon wafer.
Acknowledgements The authors gratefully acknowledge interest and support by Drs B. Thomas and S Paasche. Thanks are also due f,o the Technology Group of the Daimler-Benz Research Group at Ottobrunn.
References II] J.C. Vial and J. Demen (eds.), Porotls Silicon Science and Technology: Winter School Les Houehes. France. 1994. Springer, Berlin, 1994, [2] J, Zeman,M. Zigone,G Martinez,G.L.J,A.Rikken,P. Bordetand J. Chenevas,On the originof the poroussiliconluminescence.ThinSolid Fibns, 255 (1995) 35-38. [3] W. Lang. P. Steiner and F. Koslowski,Ol~todectronicpropenies of porous silicon. The electroluminescentdevices, in J.C. Vial and J. Derrien (eds.), Porous Silicon Science and Technology: Winter School. Les Hmwhes, France, 1994, Springer,Berlin, 1994.
Actuan~rs (Transdl.cers "95/Eun~sensorsIX), Stockholm, Sweden. 2529 June. 1995,paper 3-A0.
Biographies Thomas B i s c h o f f w a s born in 1969. He graduated in physics from the Technical University of Munich in 1996, In 1995/96 he was employed at the Microsensors Department of the Daimler Benz Central Research Unit in Munich. During this time he was working on his MSc. thesis dealing with micromachining technologies based on porous-silicon sacrificial layers. Currently his employment is with Siemens AG in Munich. Gerhard Miiller was born in i 948. He graduated in physics from the University of Heidelberg in 1974 and obtained a Ph.D, degree in 1976. Subsequently he was employed at the Max-Planck-lnstitute for Nuclear Physics in Heidelberg, where he performed work on ion implantation and nuclear solid-state physiscs, In 1979 he changed to the University of Dundee, UK, where he started research on hydrogenated amorphous silicon. In t981 he moved to Messerschmitt-Boelkow-Blohm GmbH, Munich, where he performed development work on thin-film solar-cell modules. Since 1986 he has been active in the field of silicon micromachining and sensors. His special interests include silicon-compatible thin films and fabrication processes. Since 1994 he has worked for DaimlerBenz Central Research. Wolfgang Welser was born in 1958 in Eichst~itt, Germany. He studied technical physics at the Technical University of Munich and graduated there in 1986, Thereafter he was employed at Messerschmitt-Boelkow-Blohm GmbH in Munich, where he worked on semiconductor radiation detectors. Since 1990 he has been strongly involved in the design of surface- and bulk-micromachined accelerometers, auto-
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motive sensors and infrared devices. His current employment is with Daimler-Benz Central Research, Munich. Frederik K o c h was born in 1937. He graduated in physics from the University of New York in 1958 and obtained a Ph.D. degree in physics from the University of Berkeley, California, in 1962. After several university positions in the United States and the Soviet Union, he became a full professor at the University of Maryland in I970. Since 1972 he has
held the chair for experimental solid-state physics in theTechnical University of Munich. His research interests are in electronic properties of metals and semiconductors, optical and transport properties of semiconductors, solid surfaces and heterostruetures. He is an author and co-author of more than 250 scientific papers, He has received several awards for outstanding work in the field of solid-state sciences and he is a member of major German and American research organizations.