Solid-State Elecrronics
Pergamon Press 1971. Vol. 14, pp. 239-245.
GATE NOISE
Printed in Great Britain
IN MOS FET’S AT MODERATELY HIGH FREQUENCIES
J. W. HASLE’TT and F. N. TROFIMENKOFF Electrical Engineering Department, The University of Calgary, Calgary, Alberta, Canada (Received 12 December 1969; in revisedform 6Aprill970) Abstract-A lumped model approach is used to evaluate the drain noise, gate noise and correlation between gate and drain noise for an n-channel enhancement MOS field-effect transistor. Effects ofthe substrate resistivity are examined in detail. It is found that as the substrate doping increases, the correlation coefficient increases over the value of 0.395 for an intrinsic substrate. This conclusion is in direct disagreement with previously published results. R&umt?-On approche le problkme B l’aide d’un modile agglomkrk pour &valuer le bruit de d&versement, le bruit du circuit B dkclenchement p&odique et la corr&lation entre les bruits du circuit B ddclenchement p&iodique et du dkversement pour un transistor &n-canaux B effet de champ MOS de tihaussement. On examine en detail les effets sur la risistivitk de la base. On trouve qu% mesure que le doping de la base accroit, le coefficient de corrklation augmente au-dessus de la valeur de 0,395 pour une base intrinstque. Cette conclusion est en d&accord direct avec les tisultats pr&&demment publit%. Zusammenfassung-Ein Model1 mit konzentrierten Elementen wird benutzt, urn das Drain- und Gaterauschen und deren Korrelation in einem n-Kanal-Anreicherungs-MOS-Feldeffekttransistor zu erkl9en. Der EinfluB der Substratleitftiiakeit wird im einzelnen untersucht. Daher ereibt sich mit zunehmender Substratdotierung eine Zu&me des KorrelationskoetTizienten iiber We
of fixed bulk charge on the thermal of MOS FET’s have been analyzed in detail by Sah et al. [l] and the effects of the substrate doping on the gate noise have been presented by Rao [2]. An alternative approach using circuit analysis techniques, first introduced by Sah[3], and recently used by Fu and Sah[4], yields identical results for the thermal noise. The technique is utilized to calculate the gate noise and correlation coefficient in the pre pinch-off mode. The FET with both drain and gate a.c. shortcircuited to the source can be split at a point x in the channel as shown in Figs. l(a) and l(b). Using the small signal equivalent circuit for the bulk charge model[5], it can be shown that the resistances RI and R, are given by THE
noise
EFFECTS
R,=1 go1
1
R,=
characteristics
g0r + gfnr + g,,
(2)
where g,, = output conductance for the transistor of channel length x g, = output conductance for the transistor of channel length (L-x) g,,, gmr = gate and substrate transconductances, respectively for the transistor of channel length (L-x). If the channel potential with respect to the source at the point x in the channel is denoted as V, then for the effective
transistor of channel length (L-x), the gate-source bias is V,,- V, the drainsource bias is V,- V, and the substrate-source bias is - V. It is then easy to show that 1 -=__ R,
(1) 239
P”Z x
Qn
J. W. HASLETT
240 1
l-4
R
L-x
and F. N. TROFIMENKOFF
On
(4)
Tronsisior of channel len.gth x
dv,(x)
Transistor of channel lenpth(L-x)
where
Q,=C,,~{V~II+~)L:s-(~I-~i+~R-~ji
pL,,= C,, = x= VT =
electron mobility in the channel per unit area co-ordinate defined in Fig. I threshold voltage, positive for an n-channel
oxide capacitance
Fig. I(b). The two-transistor
equivalent circuit of a single FET of channel length L.
FET 2 = device breadth L = channel length
the contribution current is
and
did:! =
(6)
to the short-circuited
drain noise
don’ (R, + R,.)"
where q = magnitude of the electronic charge N, = substrate impurity concentration E, = semiconductor permittivity & = Fermi potential in the p-type substrate. The inversion charge Q, is assumed to exist as a surface charge at the oxide-semiconductor interface, so that the thermal noise voltage de,(x) generated in an element of channel of length dx at .Imay be calculated directly from the Nyquist theorem, and is given by
Neglecting
the capacitances
C, and C, in Fig. I(b),
Fig. I(a). Schematic representation
of the MOS FE1
(8) This follows from the well-known the drain current
expression
for
(9) lntegration of (8) from V = 0 at the source to I/ = V,,%at the drain yields
where
GATE NOISE IN MOS FET’S
and Id is found by integrating and x = L so that
(9) between
x= 0
241
and C ad =-3&J
*
=
av;
PnGzZ,
d
(12)
L
The capacitance C1 is found substituting V for Vds in (18). Similarly, C, is found by replacing V,, V,, and V,, by (V&-V), V,,-V) and -V respectively in (17). This leads to
where r12
8 = V*(V,,-v,+
(18)
VB) -y
Cl = Equation (10) can then be shown to yield results which are identical to those presented by Sah et al. [Il. A straightforward calculation of the gate noise 7 can be performed by considering the effects of Cr and C, shown in Fig. 1. Assuming that capacitive currents to the gate are small compared with conductive current in the channel, it follows immediately that the noise voltage at dI is given by dv, = didRI
(13)
dv, = - di,R,.
(14)
0
co,-=; fi (V, V&7,)
(19)
(20)
where fl(V, V,s) = -(&/;‘lVdV+~}
(21)
and
and at sp
Then the current flowing in the gate lead due to capacitive coupling between the channel and gate is given by
dig = - [dv,(x)lj,[
Cl(i)-C(T)]
(15)
where C1 is the gate-drain capacitance for the transistor of channel length x, and C, is the gatesource capacitance for the transistor of channel length (L-x). The total gate capacitance C, is given by
“ds2
+JJr(V,,,-V,-tVB) 4&f% [
0
dV
v,, l-2&+5&
v
1’2 )
(22) c,=
c,,+C,d+C&=+ ss
(16) where
where C,,, C& and Cgb are the gate-source, gatedrain and gate-bulk capacitances respectively. It can then be shown that
(17)
v,,, = v*--v
(23)
v,,,= v,,- v
(24)
1‘= QnlC,,
(25)
J. W. HASLETT
242
and F. N. TROFIMENKOFF
l/2
- (V,,-V,+
VB--I’&).
(26)
In addition, it is easy to show that x -c-L L
upper limit Vaz must have Vgsz substituted for V,, and Vbsz substituted for V,, in the final results as well, where V,,, = - V. The gate noise is obtained from _3-
0 0
‘,
(27)
_
I:,” di:di, -
(31)
and utilizing (5), (13) and (17) to (28) yields L-x L
02 0
(28)
-2 _ 2kTAfo2C,.,.ZL~ b -
v,.i&%
where ol=
V(V/,iV,)-y
(29)
-$&[(l+&)liP-lj
o*=
v**vk-v~+v~)-;v~~
(30)
-$#J&?[(1+~)3il-(l+&)t12j.
The integrals in (21) and (22) are performed in a straightforward manner using (5). Those with
y= p[(&)2fi(V, (2&4
V",) - (&)%(V, Km V&)1. (33)
The integral in (32) can be performed numerically. Graphs of the normalized gate noise are shown in Fig. 2 as a function of drain bias for various gate voltages in excess of the threshold voltage V,. It should be noted that the terms VPI/24,, V,,/24,. and represent the normalized pinch-off V,,/24, potentials for the curves with (V,, - V/,)/2& = 4,6 and 8 respectively.
ooz(V9r-VT)/2+~
q6
Fig. 2. Normalized gate noise for values of drain voltage ranging from zero to pinch-off.
GATE
The correlation coefficient by considering the definition
NOISE
IN MOS
c is easily obtained
FET’S
243
For an intrinsic substrate, & + 0 and it can be shown that with the drain in saturation,
.*. l, ld
C=J'C,=
(37)
(34)
T--
[l~.id2]1’2
where c, represents the magnitude of c. Utilizing (8) and (15), it can be shown that
e,=;(v,-v)z
(38)
(40) Combining (lo), (32), (34) and (35), the correlation coefficient can be written in integral form as
and
f,(V, VW VP)=;
’ =‘[I7Y’d($-)
17
where VP = drain-source pinch-off potential. The drain noise integral given by (11) reduces to
($-rd($)r;)6)
The magnitude of c is given in Fig. 3 for bias conditions corresponding to those used in Fig. 2. Again, results were obtained using numerical techniques.
K=fV,”
(42)
so that the drain noise expression
045r
030-
0.25-
ICI 020-
0
05
Fig. 3. Magnitude
IO
I.5
(41)
2.0
2:5
3.0
3.5
'4.0
4.5
5.0
m 5.5
of the correlation coefficient for values of drain voltage ranging from zero to pinch-off.
given by (10)
J. W. HASLETT
244
reduces
and F. N. TROFIMENKOFF
to
where
The use of (37) to (41) in (33) yields
Fig. 5. Cross-correlation at pinch-off. normalized
The gate noise at pinch-off substitution into (34), giving
is then
64 kTAjiu’(C,,ZL)” bf = 135 S?XS
7
In addition,
(35) and (36) reduce
obtained
as a function of substrate doping to results obtained with (/Jo = 0.
by
(46)
to
yq-- = -;kTAfiwC,,,,.LZ do II”
(47)
and
j
5
J
“=4 2.
(48) Fig.
Equations (43), (46). (47) and (48) are identical to those presented by Shoji[6] and Halladay and van der Ziel[7] for an intrinsic substrate. The variations in i ‘/i 2, i:i,,/i:bi ,,“, and 1c.1with substrate doping are” g;:en in Figs. 4, 5 and 6 respectively. The results for the gate noise and
&--++-++a NO.
atom
Fig. 4. Gate noise as a function pinch-off, normalized to results
10
/cm'
of substrate doping at obtained with $fi = 0.
6.
Magnitude of the function of substrate
correlation coefficient doping at pinch-off.
as a
correlation term are similar in magnitude and form to those presented by Rao[2]. However. the magnitude of the correlation coefficient is in strong disagreement with his data. Rao states that 1~ decreases monotonically with increasing N,,. as a result of the variation of /T. Halladay and van der Ziel[7] have performed high frequency noise measurements on MOS FET’s and have found that 1~ increases over its value of 0,395 given by the simple model. The results presented by Rao were used to support their theory that a non-thermal noise source operates in the channel at high frequencies. Figure 6 illustrates that Ic/ does theoretically increase with N,,. since i,;l does not vary appreciably with substrate doping. While it is true that R,,s increases, the saturation drain voltage V,, and thus g,,,,$ decrease with doping. so that ‘? over a I,1 = 4kTR,,,&,,, does not vary appreciably wide range of substrate impurity concentrations. This is illustrated in Fig. 7. and supported by Klassen and Prins [ 81.
245
GATE NOISE IN MOS FET’S can be attributed high frequencies dominant.
I2 v, =b&-VT II
REFERENCES
t I”;” , o
1. C. T. Sah, S. Y. Wu, and F. H. Hielscher,
v;=4v
/v;=av
IN?
v;=12v
t-
-
4
r
I
1015
I
I
10’6 IO” N.. 0toms/cm3
I 1018
Trans.
ED-13,410-414 (1966). 2. P. S. Rao, Solid-St. Electron. 12,549-555 (1969). 3. C.T. Sah, Proc. IEEE S2,795-814 (1964). 4. H. S. Fu, and C. T. Sah, Solid-St. Electron. fEEE
cl.9
PP
to measurements at insufficiently to ensure that thermal noise is
I
10’9
Fig. 7. Drain noise as a function of substrate doping at pinch-off, normalized to results obtained with I$+= 0.
It has recently been shown[9] that the “excess noise” does not exist, and that the observations
605-618 II_ --- (1969) I____,_ 5. C. T. Sah, and H. C. Pao, Trans. IEEE 409 (1966). 6. M. Shoji, Trans. IEEE
ED-13,520-524
12,
ED-13, 393(1966).
7. H. E. Halladay, and A. van der Ziel,Solid-St. Electron. 12, 161-176(1969). 8. F. M. Klassen, and J. Prim, Philips Res. Rep. 22, 505-514(1967). 9. L. D. Yau, and C. T. Sah, Solid-St. Electron. 12, 903-905
(1969).