Guidelines to select underfills for flip chip on board assemblies and compliant interposers for chip scale package assemblies

Guidelines to select underfills for flip chip on board assemblies and compliant interposers for chip scale package assemblies

Microelectronics Reliability 40 (2000) 1173±1180 www.elsevier.com/locate/microrel Guidelines to select under®lls for ¯ip chip on board assemblies an...

1MB Sizes 0 Downloads 9 Views

Microelectronics Reliability 40 (2000) 1173±1180

www.elsevier.com/locate/microrel

Guidelines to select under®lls for ¯ip chip on board assemblies and compliant interposers for chip scale package assemblies J.H. Okura a,*, S. Shetty a, B. Ramakrishnan a, A. Dasgupta a, J.F.J.M. Caers b, T. Reinikainen c a

CALCE Electronic Products and Systems Consortium, University of Maryland, College Park, MD 20742, USA b Philips Centre for Manufacturing Technology, P.O. Box 218, 5600 MD Eindhoven, Netherlands c Nokia Research Center, P.O. Box 407, 00045 Nokia Group, Finland Received 13 July 1999

Abstract The e€ect of thermomechanical properties of under®ll and compliant interposer materials, such as coecient of thermal expansion (CTE) and sti€ness (Young's modulus) on reliability of ¯ip chip on board (FCOB) and chip scale packages (CSPs) under thermal cycling stresses is investigated in this study. Quasi-three-dimensional viscoplastic stress analysis using ®nite element modeling (FEM) is combined with an energy partitioning (EP) model for creep-fatigue damage accumulation to predict the fatigue durability for a given thermal cycle. Parametric FEM simulations are performed for ®ve di€erent CTEs and ®ve di€erent sti€nesses of the under®ll and compliant interposer materials. The creep work dissipation due to thermal cycling is estimated with quasi 3-D model, while 3-D model is used to estimate the hydrostatic stresses. To minimize the computational e€ort, the 3-D analysis is conducted only for the extreme values of the two parameters (CTE and sti€ness) and the results are interpolated for intermediate values. The results show that the sti€ness of the under®ll material as well as the CTE play important role in in¯uencing the fatigue life of FCOB assemblies. The fatigue durability increases as under®ll sti€ness and CTE increase. In the case of compliant interposers, the reverse is true and durability increases as interposer sti€ness decreases. Furthermore, the interposer CTE a€ects the fatigue durability more signi®cantly than under®ll CTE, with durability increasing as CTE decreases. The eventual goal is to de®ne the optimum design parameters of the FCOB under®ll and CSP interposer, in order to maximize the fatigue endurance of the solder joints under cyclic thermal loading environments. Ó 2000 Elsevier Science Ltd. All rights reserved.

1. Introduction Flip chip on board (FCOB) consists of the interconnection of an unpackaged integrated circuit directly to a low-cost FR4 printed circuit board using eutectic (63Sn/37Pb) solder bumps and an epoxy-based encapsulant under®ll (Fig. 1). Although the FCOB technology provides de®nite performance advantages over traditional surface mount technology components, it also presents special reliability concerns [18]. A high thermal

*

Corresponding author. Tel.: +1-301-405-5251; fax: +1-301314-9477. E-mail address: [email protected] (J.H. Okura).

expansion mismatch between the silicon die and the FR4 substrate increases chances of fatigue failures in solder interconnects under cyclic thermal loading environments (Fig. 2). Use of an appropriate under®ll is recognized to be crucial to the reliability of FCOB assemblies [5]. The under®ll participates in the load sharing in parallel with the solder joints, thus lowering the forces that have to be carried by the solder joints due to thermal expansion mismatches (Fig. 3). An alternative class of new technology that has gained tremendous popularity is chip scale packaging (CSP), especially in portable devices, e.g. laptop computers and cellular handsets. The advantages of CSP vs. direct chip attach are handling, assembling, rework, standardizing, protecting the die, and dealing with die

0026-2714/00/$ - see front matter Ó 2000 Elsevier Science Ltd. All rights reserved. PII: S 0 0 2 6 - 2 7 1 4 ( 0 0 ) 0 0 0 4 4 - 5

1174

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

Fig. 1. FCOB con®guration.

Fig. 2. Failure mechanisms in FCOB.

Fig. 3. The role of under®ll in FCOB assemblies.

shrink become easier. The de®nition of CSP given by IPC states that the package area is less than 1.5 times that of the chip area [9,17]. In the present, over 50 CSPs ®t this de®nition and they can be grouped in four further categories, according to the substrate type: leadframe, rigid substrate, wafer level, or ¯ex substrate [19]. Flex substrate is by far the most popular CSP technology and it has been estimated that nearly 60% of all CSPs will be based on ¯ex technology in year 2002. In the present,

Fig. 4. CSP con®guration.

wire bond ¯ex CSP is the most popular CSP package (Fig. 4). In this technology, the chip is attached with an adhesive to the substrate, which also functions as a redistribution layer for the area array solder interconnects. The main advantages of this package are its simplicity and low cost potential [19]. The low cost is achieved by the possibility of doing the routing on a single metal layer ¯ex substrate. Since in the ¯ex CSP technology the die is very close to the PCB, the mechanical structure and properties of the adhesive layer and the interposer must be optimized to achieve sucient reliability of the solder joints. Use of appropriate adhesive and compliant interposer increases the durability of the solder joints. Fig. 5 shows the failure mechanism of this type of CSP. The fatigue life of solder joints in FCOB and CSP assemblies is thus strongly dependent on the mechanical properties of the under®ll and compliant interposer materials. The objective of this study is to parametrically examine the e€ect of the under®ll/compliant interposer CTE and sti€ness on fatigue life of the solder joints, through modeling and simulation. Viscoplastic ®nite element simulations are performed for thermal cycling from ÿ55°C to 80°C. The stress analysis is combined with an energy partitioning (EP) creep-fatigue damage model [7] to predict the reliability of the FCOB and CSP assemblies for the given thermal pro®le. Related studies conducted by the authors show that the hydrostatic stresses induced in the solder due to under®ll curing must be considered in order to obtain good agreement between model prediction and experiment in the case of FCOB assembly. Ignoring the hydrostatic stresses can result in gross underprediction of the fatigue life improvement provided by the under®ll [8,10,14,15]. Similar results were reported by other investigators for a BGA architecture [16] where simulations with under®ll predicted only marginal improvement in fatigue life. This discrepancy is attributed to favorable hydrostatic stresses which possibly inhibits void nucleation under cyclic creep-fatigue damage. Furthermore, in the presence of under®ll, the maximum stresses in the solder does not increase signi®cantly with increasing crack size, indicating that a crack initiated in

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

1175

Fig. 5. Failure mechanisms in CSP.

the solder would propagate in a slow, stable manner and hence would delay the time to cause total electrical failure [3]. Thus, predictions from the EP damage model are not expected to provide good correlation with experiments in this case unless the hydrostatic stresses and the crack propagation are explicitly modeled. A more detailed study will be presented in a forthcoming paper [11]. This e€ect is approximately included in the design guidelines presented in this paper.

2. Analysis FEM viscoplastic stress analysis and EP creep-fatigue damage prediction have been performed for selected FCOB and CSP assemblies in this study. A similar approach has been reported in a previous paper by the authors [14] for comparing durability of FCOB solder interconnects with and without under®ll, under cyclic thermal loading condition. Although there was very good agreement between prediction and experimental results in the absence of under®ll, there was signi®cant discrepancy between predictions and experimental data for FCOB with under®ll. This discrepancy was attributed to favorable hydrostatic stresses which are possibly inhibiting void initiation and crack propagation. Accounting for the above factors in the model improves the durability prediction [11]. This study has assumed a constant cure stress for all ¯ip chip under®lls, due to lack of shrinkage data. 2.1. Stress analysis Nonlinear viscoplastic ®nite element analysis is conducted for 25 FCOB and CSP con®gurations for ®ve values of CTE and ®ve values of sti€ness of under®ll and compliant interposer (Table 1). Fatigue life predictions are normalized with respect to the predictions for nominal values of sti€ness and thermal expansion coef®cient for FCOB and CSP as indicated in Table 1. The solder material has temperature-dependent elastic,

Table 1 Matrix of mechanical properties of FCOB under®ll and CSP compliant interposer E modulus (GPa)

CTE (ppm/°C)

Under®ll

Under®ll

Compliant interposer

15.0 22.5 30.0a 37.5 45.0

18 27 36a 45 54

4.30 6.45 8.60a 10.75 12.90 a

Compliant interposer 2.25 3.38 4.5a 5.63 6.75

Nominal values.

plastic and creep properties taken from the literature [12,20]. The term plasticity in this paper refers to timeindependent inelastic strain. A partitioned constitutive law is used, to be consistent with the EP damage law. A power law is used to model the plasticity: r ˆ Kenpp ;

…1†

where K is the strength coecient, np , the plastic strain hardening exponent, r, the von Mises stress and ep , the equivalent plastic strain. Table 2 shows the temperaturedependent elastic and plastic properties (only K is assumed to be temperature dependent). The value of the plastic strain hardening exponent np is 0.129 and is assumed to be independent of temperature. The nonlinear

Table 2 Time-dependent elastic properties of solder material Temperature (°C)

K (MPa)

E (MPa)

Yield stress (MPa)

ÿ55 ÿ40 25 90 125

103.3 97.2 70.7 44.2 29.9

54 497 50 994 35 812 20 630 12 455

45.0 42.7 32.8 22.8 17.4

1176

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

Fig. 6. Nonlinear stress vs. plastic strain curve for solder material.

stress vs. plastic strain curve using the above constants is shown in Fig. 6. WeertmanÕs steady-state power-law creep is used to model the solder joint creep deformation as follows: e_cr ˆ Ar1=nc eÿDH =kT ;

…2†

where e_cr is the equivalent creep strain rate, r, the von Mises stress, A, the creep constant, nc , the creep hardening exponent, DH, the activation energy, k, the Boltzman constant, and T, the absolute temperature. For the eutectic solder joint material, we choose A ˆ 0:2557 (1/MPa)1=nc , 1=nc ˆ 6:3, DH =k ˆ 8165 K [20]. Only the solder joint material is assumed to undergo viscoplastic deformation while the rest of the materials (including under®ll and compliant interposer) are assumed to behave in a linear elastic manner. The under®ll and compliant interposer nonlinearities are ignored due to lack of adequate data. In addition, for simplicity of modeling, the adhesion, insulator and compliant interposer have the same material properties. The mechanical properties of the remaining materials in the FCOB and CSP assemblies are taken from the literature [6]. The ®nite element stress analysis was followed by damage analysis using the EP damage model [7]. A quasi-three-dimensional ®nite element model (FEM) has been developed [2] to analyze the FCOB and CSP con®gurations using the A B A Q U S general purpose commercial FEM code [1]. This model has a varying out-of-plane width to capture the length of each incremental strip illustrated in the plane view in Fig. 7 for FCOB. A similar modeling approach was used for the CSP package. The FCOB con®guration used for modeling purpose has a 10  10 mm2 die size while CSP has a 7:5  7:5 mm2 die size. In addition, the FCOB solder joint region has overlay elements in order to account for the under®ll material in front of the solder joint. Fig. 8 shows the FEM mesh for the FCOB and CSP con®gu-

Fig. 7. Schematic illustration of the FCOB con®guration.

rations under study. The outputs of the model are the cyclic energy densities, i.e., maximum elastic energy density Ue , plastic work Wp and creep work Wc , during each thermal cycle (multiple cycles in simulation). Fig. 9 shows the thermal cycling pro®le used for this study. 2.2. Damage model The EP model predicts cyclic creep-fatigue damage based on the deviatoric energy densities: Ue (elastic), Wp (plastic) and Wc (creep) for a typical load cycle. The cycles to failure for each mechanism is determined by using the fatigue constants for eutectic Pb/Sn solder and a power-law equation [7]: U ˆ Ue ‡ Wp ‡ Wc

 n 0 rH 0 0 ˆ Ue0 Nfeb ‡ Wp0 Nfpc ‡ Wc0 1 ÿ Nfcd ; rf

…3†

where the coecients Ue0 , Wp0 , Wc0 represent the intercepts of the elastic, plastic and creep energy density vs. life curves on a log±log plot while the exponents b0 , c0

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

1177

Fig. 8. Schematic illustration of the FEM mesh for FCOB and CSP con®gurations.

Fig. 10. Linear elastic von Mises stress contour plot for critical solder joint: (A) FCOB and (B) CSP. Fig. 9. Thermal cycling pro®le.

3. Results and discussion and d 0 are their corresponding slopes. The six fatigue constants used in this study are modi®ed from Ref. [7], based on subsequent experimental observation [13]. The values are Ue0 ˆ 0:698 N mm/mm3 , b0 ˆ ÿ0:18, Wp0 ˆ 165 N mm/mm3 , c0 ˆ ÿ0:6, Wc0 ˆ 94 N mm/mm3 , d 0 ˆ ÿ1. In addition, n is the hydrostatic stress exponent, rH represents the hydrostatic stress and rf represents the fatigue strength. The creep term in Eq. (3) assumes constant hydrostatic stress. For further detail, see Ref. [11]. The variables Nfe , Nfp and Nfc represent the cycles to failure due to elastic, plastic and creep damage, respectively. The total damage is computed by summing the inverse of Nfe , Nfp and Nfc (using a linear superposition principle for damage). In other words Dtotal ˆ De ‡ Dp ‡ Dc ˆ 1=Nfe ‡ 1=Nfp ‡ 1=Nfc :

…4†

The total number of cycles to failure is then computed from the inverse of the total damage. It is important to use EP when multiple damage mechanisms play important roles in thermal tests. The partitioned energies illustrate the contribution of each deformation mechanism to damage.

Two thermal cycles are simulated in the FEM analysis and the contour plot is monitored for FCOB assembly, in order to identify the maximum energy density sites at the end of each cycle, whereas for CSP assembly only one cycle is monitored since there is no signi®cant di€erence between the ®rst and second cycle in fatigue life. Fig. 10 shows the linear elastic von Mises stress contour plot: (A) the maximum stress site at the top right corner of the critical FCOB solder joint and (B) the maximum stress site at the top left corner of the critical CSP solder joint. Fig. 11(A1) shows the FCOB viscoplastic von Mises stress contour plot at the end of the second thermal cycle, where the maximum stress site shifts from its original position. Although some researchers [3,4,15] report either the maximum von Mises stress or maximum inelastic strain, this study also reports energy/cycle since these parameters represent damage in our model. For a Con±Manson model, the damage parameter is the inelastic strain range. Fig. 11(A2) shows the CSP viscoplastic von Mises stress contour plot at the end of the thermal cycle depicting the maximum stress site. Fig. 11(B1), (B2), (C1) and (C2) shows the contour plots for creep equivalent strain and

1178

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

Fig. 11. Viscoplastic FEM contour plot for critical solder joint for second thermal pro®le: (a) von Mises stress, (b) creep equivalent strain, and (c) creep energy density (A1, B1, C1 for FCOB and A2, B2, C2 for CSP).

creep energy density at the end of the thermal cycle, respectively, showing the maximum energy density sites. The energy densities at the critical region are averaged over a region of approximately one-tenth the area of the critical solder joint for the purpose of fatigue life predictions. Fig. 11(b) and (c) shows that the damage sites are similar for both the strain- and energy-based damage models. Fig. 12 shows the normalized fatigue life predictions as a function of CTE for di€erent sti€ness values of (A) FCOB under®ll and (B) CSP compliant interposer. As an approximation, fatigue damage is calculated based only on the creep damage since the damage due to deviatoric elastic and plastic energy densities are found to be negligible for this loading. Fig. 13 provides an illustration of the relationship between CTE and fatigue life

predictions as a function of sti€ness of (A) FCOB under®ll and (B) CSP compliant interposer. Fig. 14 shows a contour plot of critical solder joint as a function of sti€ness and CTE for FCOB assembly. Results indicate that the fatigue life is weakly dependent on CTE, however, it is strongly dependent on sti€ness. The life prediction changes approximately by a factor of 2, as the sti€ness changes by a factor of 3. The life prediction (approximately 150 cycles for the normalized con®guration) is extremely low compared to experimental results of 3500 cycles, because hydrostatic stress has been ignored. The e€ect of hydrostatic stress on the contour plot presented in Fig. 14 is shown in Fig. 15. A constant compressive hydrostatic stress of 100 MPa has been assumed for all con®gurations [11]. As seen in the ®gure, the normalized contour plot has the same behavior as in Fig. 14 except that the fatigue life predictions are now approximately the same as the experimental data. Fig. 16 shows the normalized fatigue life contour plot for CSP assembly as a function of sti€ness and CTE. Results indicate that the fatigue life is strongly dependent on both CTE and sti€ness. The life prediction changes approximately by a factor of 2, as the sti€ness and CTE change by a factor of 3. The life predictions for nominal values of sti€ness and CTE conducted by the authors are between 200 and 500 cycles.

4. Conclusions This paper provides design guidelines in order to select appropriate under®ll and compliant interposer materials to enhance the fatigue endurance of the solder joints in FCOB and CSP assemblies. In a forthcoming paper to be presented by the authors, a detailed discussion of the e€ect of process-induced stresses resulting from the under®ll curing process in FCOB assembly will be presented, as this and other related studies have shown that compressive hydrostatic stresses in FCOB solder joints with under®ll are significant, and can enhance the fatigue life. The results show that the fatigue life predictions in FCOB are strongly dependent on under®ll CTE, however, they are strongly dependent on under®ll sti€ness and CTE. In addition,

Fig. 12. Normalized fatigue life vs. CTE plot for di€erent sti€ness values: (A) FCOB and (B) CSP.

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

1179

Fig. 13. Normalized fatigue life vs. sti€ness plot for di€erent CTE values: (A) FCOB and (B) CSP.

Fig. 14. Normalized fatigue life for di€erent FCOB under®ll properties without hydrostatic stress.

Fig. 15. Normalized fatigue life for di€erent FCOB under®ll properties with hydrostatic stress (hydrostaticstress ˆ 100 MPa).

the fatigue durability increases as under®ll sti€ness and CTE increase. The fatigue life predictions in CSP are strongly dependent on both interposer CTE as well as interposer sti€ness. Furthermore, the fatigue durability increases as either interposer CTE or sti€ness decreases.

Fig. 16. Normalized fatigue life for di€erent CSP compliant interposer properties.

Acknowledgements This work is sponsored by the CALCE EPSC Consortium. The authors are especially grateful for support from Philips CFT, Eindhoven, Netherlands and Nokia, Finland. J.H. Okura is also sponsored by CNPq-Brazil.

1180

J.H. Okura et al. / Microelectronics Reliability 40 (2000) 1173±1180

References [1] [2]

ABAQUS

users manual, Ver 5.8, HKS. users manual, Ver 7.0, The McNeal-Schwen-

P3/PATRAN

dler. [3] Doi H, Kawano K, Yasukawa A. Reliability of under®llencapsulated ¯ip-chip packages. Appl Fract Mech Electron Packag AMD222/EEP20 ASME, 1997. p. 7±14. [4] Doi K, Hirano N, Okada T, Hiruta Y, Sudo T, Mukai M. Prediction of thermal fatigue for encapsulated ¯ip chip interconnection. Microcircuits Electron Packag 1996; 19(3):231±6. [5] Baggerman AFJ, Caers JFJM, Wondergem JJ, Wagemans AG. Low-cost ¯ip-chip on board. IEEE TransComponents Packag Manufact Technol, Part B 1996;19(4):736±46. [6] Darbha K, Okura JH, Dasgupta A, Caers JFJM. Thermomechanical durability analysis of ¯ip chip solder interconnects without under®ll. ASME Winter Annual Conference: Ninth Symposium on Mechanics of Surface Mount Assemblies, Dallas, TX, 1997. [7] Dasgupta A, Oyan C, Barker D, Pecht M. Solder creepfatigue analysis by an energy-partitioning approach. ASME J Electron Packag 1992;114:152±60. [8] Le Gall A C, Qu J, McDowell D. Some mechanics issues related to the thermomechanical reliability of ¯ip chip DCA with under®ll encapsulation. ASME Symp Appl Fract Mech Electron Packag AMD222/EEP20, 1997. p. 85±95. [9] IPC SM 785. Guidelines for accelerated testing of surface mount solder attachments. Proposed Standard of IPC Surface Mount Task Group, Institute for Interconnecting Packaging Electronic Circuits, Lincolnwood, IL, 1992.

[10] Wang J, Qian Z, Liu S. Process induced stresses of a ¯ipchip packaging by sequential processing modeling technique. ASME J Electron Packag 1998;120:309±13. [11] Darbha K, Okura JH, Shetty S, Dasgupta A, Reinikainen T, Zhu J, Caers JFJM. E€ect of curing-induced hydrostatic stresses on life of under®lled area-array solder interconnects, interPACKÕ 99. ASME International, Intersociety Electronic Conference, Hawai, June, 1999. [12] Skipor AF, Harren SV, Botsis J. On the constitutive response of 63/37 Sn/Pb eutectic solder. J Engng Mater Technol 1996;118:1±11. [13] Rothman T. Physics-of-failure methodology for accelerated thermal cycling of LCC solder joints. MS Thesis, University of Maryland, 1995. [14] Okura JH, Darbha K, Dasgupta A. E€ect of under®ll in ¯ip chip on board assemblies. ASME Winter Annual Conference, Anahein, CA, 1998. [15] Gektin V, Bar-Cohen A, Ames J. Con-Manson fatigue model of under®lled ¯ip-chips. IEEE Trans Components Packag Manufact Technol, Part A 1997;20(3):317±26. [16] Wong, T.E. 1998, Personal Communication. [17] Lau JH, Ricky Lee S-W. Chip scale package: design, materials processes and applications. New York: McGraw Hill, 1999. [18] Lau JH, Pao Y-H. Solder joint reliability of BGA, CSP, ¯ip chip and ®ne pitch SMT assemblies. New York: McGraw Hill, 1997. [19] Schueller RD, Bradley EA, Harvey PM. Meeting the cost/ performance requirements of ¯ex-based chip-scale packages, chip scale review. 1999. [20] Dasgupta A, Clark D, Darbha K, Haswell P, Okura J, Ray C, Shetty S. Creep constitutive properties literature survey. CALCE internal report, 1999.