Hardware

Hardware Boyce, A H and Watt, W 'The design and testing of logic circuits' Electronics Technology Vol 16 No 2 February 1982 pp 2 5 - 2 8 An untestable circuit can usually be made testable by allowing more access to internal nodes particularly where memory is involved. If memory can readily be set to specified states by input test patterns then these states can be used to test the remaining logic. Consideration of which faults the test program should cover is vital. This article groups types of testing that can be considered and illustrates one method of designing testable sequential circuits.

Buckroyd, A 'Designing microcomputers for testability' Electron. rech. Vol 16 No 3 (March 1982) pp 48-51 The need to consider designing for testability as a specific topic stems from a problem in communications between the drawing board and the factory floor. Designers often think solely in terms of satisfying a customer requirement (testing consists of providing the proper input and verifying the output) but ought to be aware of the process and component faults which can occur in the field. The purpose of this paper is to show time consequences of poor design and indicate the principles to be followed in designing for testability with the microcomputer in mind.

Cushman, R H 'As/lP//aC chips mature, support chips proliferate' EDN Vol 27 No 1 (6 January 1982) pp 155-202 This, the fifth annual EDN microcomputer support chip directory, reflects vigorous growth in A/D converters and D/A converters with continuing developments in serial ports, telecommunications chips and motor control devices.

Gilbert, R 'The General-Purpose Interface Bus'

IEEEMicro Vol 2 No 1 (February 1982) pp 41-51

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The IEEE-488 interface standard, the GPIB, offers a method of sending parallel code from one device to another. The standard has been revised twice and communications based on it are now quite reliable. Current problems with the GPIB tend to stem from manufacturers documentation specifically concerning implementation with instruments from different sources. This article considers these problems by reviewing the IEEE-488 standard, discussing the methods of its implementation and presenting specific applications to illustrate how the standard is applied to data collection.

Igla, N E and Forman, E R 'Improve memory usage by compressing programmable controller logic' Intech, Vol 28 No 11 (November 1981) pp 73 76 One of the challengers in using programmable controllers is to configure the logic to minimize the use of memory. This raises flexibility to expand capacity after installation while lowering the size and cost of the machine to do a job. The technique proposed in this article is claimed to reduce memory requirements by up to 30 per cent in representative circuits. The approach is modular and is aimed at easy implementation by engineers or technicians.

Loucks, W M, Snelgrove, M and Zaky, SG 'A Vector Processor Based on One-Bit Microprocessors' IEEE Micro Vol 2 No 1 (February 1982) pp 5 3 - 6 2 Operations such as searching and sorting are inherently parallel since they can be regarded as a sequence of basic operations - compare, shift, mark etc. - performed in parallel on a large number of operands. Of the associative processors that have been organized, the word-parallel, bit-serial type has received the most attention since it requires much simpler hardware than fully parallel types. But associative processors are hardware intensive and hence most suited to large systems. This article describes such a processor designed for relatively small applications based on an array of commercially available microprocessors and is

a word-parallel machine that stores and processes data in the form of vectors consisting of fixed numbers of element~.

Szejnwald, H and Wise, J 'A high-speed graphics display controller' Electron. Prod. Des. Vol 3 No 2 (February 1982) pp 43 -47 The NEC/~PD7220 graphics display controller forms a bridge between the video display memory and the local processor to free the processor to handle high level graphics tasks as well as communications with the terminal user and the host computer. Graphics figures can be drawn at 800 ns per pixel and this article describes the device and how it can be used as the basis of a colour terminal.

Software Ballieu, G, Lewi, J and Willems, Y D 'A microprogramming language at register transfer level.' Microproc. Microprog. Vol 8 Nos 3,4,5 (1981) pp 179- -188 The purpose of the study outlined in this article is the development of software tools to aid user microprogramruing and the use of microprogramming to improve the performance of computer systems. The main tool used ib the register transfer language REGTRAL Its design objectives (minimal prerequisite hardware knowledge, readable and structured microprograms) are discussed and its main features and implementation method are described. REGTRAL microprograms are storage independent because of time automatic storage allocation process. The authors emphasize time high-level extensions that are possible with REGTRAL.

Behr, B, Oiloi, W K and Gueth, R 'Education in firmware engineering and microprogramming' Microproc. Microprog. Vol 8 Nos 3, 4, 5 (1981) pp 153--166 Education in firmware engineering should include the specification and design of firmware as well as the practical aspects of microprogramming. Students under the author's supervision learn to specify the

microprocessors and microsystems