Hardware

Hardware

Hardware Barker, P G 'Networking small computers' Wireless World Vol 88 No 1556 (May 1982) pp 35-40 Transferring a program or data from one computer t...

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Hardware Barker, P G 'Networking small computers' Wireless World Vol 88 No 1556 (May 1982) pp 35-40 Transferring a program or data from one computer to another by telephone is not too great a problem. But if a number of remote computers are to work together regularly in a network, more complicated software is needed to organize information when it is received. This article describes such software designed for the PET microcomputer and outlines networking generally.

Borsotti, A, Fumagalli, A, Ciccotti, M and Papa, M 'Minds: a microprocessor integrated development system for applications in SPC exchanges' Microproc. Microprog. Vol 9 No 2 (February t982) pp 77-83 The introduction of microprocessors in the design of electronic switching systems is consistent with current trends towards distributed processing. But the use of microprocessors causes problems of high expenditure concerning software development. On large computers there are many software tools to lmprove reliability of software packages and programmer productivity. This paper discusses the requirements of an industrial design environment and attempts to show how the problems of microprocessor programming are solved by means of an integrated software development support for 8and 16-bit microprocessors. This deyelopment support software is based on a design methodology according to which the support and application software is developed on a host general purpose computer while software debugging and testing takes place on the target computer.

Chesnutis, G F 'Intelligent instruments' EDN Vol 27 No 5 (March 3 1982) pp 93-102 As microprocessors have matured, greater emphasis has been placed on the range of applications for which they are suitable, particularly in instrumentation. This EDN Special Report provides

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background material on microprocessors in instruments and then concentrates on their employment in high-end and bench system digital multimeters (DMMs). Implementation of selfcheck, waveform generation and computing power in DMMs is also examined.

Civera, P, Conte, G, Del Corso, D, Gregoretti, F, and Pasero, E 'The u* project: an experience with a multimicroprocessor system' IEEE Micro Vol 2 No 2 (May 1982) pp 38-50 Multimicroprocessor machines differ in interconnection structure [topology, speed), in organization of execution ISIMD, pipeline, MIMD), and in objective (general-purpose, special-purpose). The main aim of this paper is to analyse the effectiveness of various processor connection methods and topologies, to evaluate their adaptability to technological change and to give an account of the design and implementation of some experimental systems. The authors feel that their most significant result is a series of guidelines for the design of tightly coupled multiprocessor systems.

Gillings, B 'High-speed flash converters' Electron. Prod. Des. Vol 3 No 5 (May 1982) pp 41-47 As analogue circuits are combined with digital and specialized high-speed devices they improve the overall performance of discrete and hybrid design in areas such as A/D converters. Three commonly used types are described in this article - integration, successive approximation and parallel conversion. The third article provides an account of an error detecting and correcting code designed to improve the performance of data transfer of disc storage units. An error correction code byte processor takes advantage of the high level of integration possible with low performance FET programmable logic arrays. The code achieves compatibility with a code for cyclic redundancy check and the approach avoids leading zeros compensation with the use of reverse shifting. The Wilkinson article, number four in the special report, describes the

interfacing of the HM-6641 PROM and HM-6564 RAM to the National Semiconductor NSC800 and Intel 8086 microprocessors. The alliterative article by Willot describes a memory management system claimed to permit the Altos 8600 series of 16-bit computers to take advantage of a sophisticated multiuser operating system like Xenix. A two level memory addressing scheme enables the CPU to allot memory from a pool of 4kbyte pages. The final article describes some of the problems which arise in hybrid designs incorporating MOS and bipolar processors. High speed bipolar processors and lower speed MOS processors are driven by different clocks which can be asynchronous. This article provides an account of an emulator for debugging usable with such hybrids.

Russell, M J 'Functional chips in a channel interface' Comput. Des. Vol 21 No 3 pp 8 1 - 8 6

Madan, P and Frederick, J 'LSI tranceiver chips complete GPI B interface' Comput. Des. Vol 21 No 3 pp 9 1 - 1 0 2

Schoene, D and Terlet, R H 'Disk file error correction with a PLA' Comput. Des. Vol 21 No 3 pp 107-116 Wilkinson, J M 'CMOS memory elements for two popular processors' Comput. Des. Vol 21 No 3 pp 123-124

Willot, J 'Multiuser memory management micro style' Comput Des. Vol 21 No 3 pp 129-I 37

Denniston, B and Wortman, T 'Emulation in hybrid designs' Comput. Des. Vol 23 No I pp 139-145 As the scale of integration on chips increases, the facilities available move beyond simple logic processing towards attempts at solving higher level system integration problems. This special report on designing with advanced system ICs covers a sprinkling of such applications. In the first article, Michael Russell considers the programmable channel interface, one of several alternatives that the system designer can consider

microprocessors and microsystems