High-efficiency multicrystalline silicon solar cells by liquid phase-epitaxy

High-efficiency multicrystalline silicon solar cells by liquid phase-epitaxy

Solar Energy Materials and Solar Cells 52 (1998) 61—68 High-efficiency multicrystalline silicon solar cells by liquid phase-epitaxy G. Ballhorn, K.J...

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Solar Energy Materials and Solar Cells 52 (1998) 61—68

High-efficiency multicrystalline silicon solar cells by liquid phase-epitaxy G. Ballhorn, K.J. Weber*, S. Armand, M.J. Stocks, A.W. Blakers Engineering Department, The Australian National University, Canberra ACT 0200 Australia Received 20 February 1997; received in revised form 14 August 1997

Abstract Thin-film silicon cells produced on crystalline silicon substrates have the potential to achieve high cell efficiencies at low cost. We have used a modified liquid-phase epitaxy growth process to produce very smooth, high-quality silicon films on multicrystalline silicon substrates. Photoconductivity decay measurements indicate that the minority carrier lifetimes in these layers are at least 10 ls, sufficient to achieve cell efficiencies in excess of 16%. This efficiency potential is confirmed in small area cells, which have displayed efficiencies up to 15.4%. Further improvements up to 17% efficiency are possible in the short term, even without the introduction of any light-trapping schemes into the device structure. ( 1998 Elsevier Science B.V. All rights reserved. Keywords: Thin film silicon solar cells; Liquid phase-epitaxy

1. Introduction Crystalline silicon solar cells dominate today’s photovoltaic market due to their high efficiency and reliability, qualities which to date have not been matched by any other semiconductors apart from the very expensive III—V compounds. It is widely known that the thickness of these cells, typically 300 lm or more, is far greater than is necessary or even optimal for high conversion efficiencies. Silicon films several tens of microns thick can absorb most of the usable photons in the solar spectrum even in the

* Corresponding author. E-mail: [email protected]. 0927-0248/98/$19.00 ( 1998 Elsevier Science B.V. All rights reserved PII S 0 9 2 7 - 0 2 4 8 ( 9 7 ) 0 0 2 7 1 - 7

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absence of any structures which confine weakly absorbed light in the active layer. A 50 lm thick silicon layer will absorb over 80% of all usable photons in the air mass 1.5 global solar spectrum. Texturization of the front surface of the film can be used to further enhance the effective thickness of the active layer, by ensuring that sunlight is coupled into the cell at an angle to the surface normal. Much effort is currently being directed at the deposition of silicon on foreign substrates, since this approach allows, in principle, the incorporation of light trapping into the device. For example, if high-quality silicon could be deposited on a cheap and transparent material such as glass, the glass could then act as the superstrate of the final cell. A highly reflective layer could be positioned at the rear of the film, reflecting any light not absorbed in the first pass through the active layer back into the layer. However, attempts to deposit silicon on foreign substrates have so far resulted in very small grain sizes of the order of 1 lm, and efficient cells have not been achieved. In contrast, silicon films grown on a cheap, low-quality silicon substrate can have grain sizes of the order of millimetres. The quality of these films is therefore considerably higher than that of films grown on foreign substrates. The results of PC-1D modelling carried out by Blakers et al. [1] has shown that cells with no light trapping can achieve the same efficiencies as cells incorporating an excellent light-trapping scheme, if the minority carrier diffusion length of the former is approximately 2.5 times that of the latter. It was further shown that cells without light-trapping schemes can theoretically achieve efficiencies in excess of 18% if the diffusion length is 100 lm. Due to various imperfections, the efficiency of real cells will always be less than the theoretical value, so that a realistic target is an efficiency greater than 16%. This would be sufficiently high to make these cells commercially attractive. Therefore, the deposition of silicon on low-cost silicon substrates must be considered as a promising alternative to the use of foreign substrates, even if the benefits of light trapping need to be sacrificed. Recent studies by Wagner and Steiner [2,3] and Werner et al. [4] have demonstrated the feasibility of this approach. An open circuit voltage of 643 mV was reported for a solar cell on a multicrystalline epitaxial layer grown by LPE [4], a record at the time for a multicrystalline silicon solar cell. In this contribution, we report for the first time the achievement of efficiencies in excess of 15% in multicrystalline thin-film silicon cells without light-trapping schemes. Some of the layers were grown using a modified liquid-phase epitaxy (LPE) process, which results in a significantly improved surface morphology compared to films grown by the standard LPE method. The results further show that efficiencies near 17% are easily achievable.

2. Epitaxial layer growth All the layers used for cell fabrication were grown by LPE in a tipping boat system, as described elsewhere [5]. In was used as the solvent, with small amounts of Ga added to ensure the films were p-doped with an equilibrium hole concentration between 1016 and 1017 cm~3. The substrates were cast multicrystalline wafers (Eurosolare 0.2 ) cm and Wacker SILSO 0.015 ) cm). Prior to loading, the substrates were

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mechanically and chemically polished, RCA cleaned and dipped in 10% HF solution to remove any surface oxides. Following saturation of the melt with silicon, growth was initiated at 970°C and terminated between 800 and 600°C. Our layers were between 20 and 50 lm thick. The melt is re-used many times without any apparent degradation in electronic quality of the epitaxial layers. In the conventional LPE method, the growth temperature is gradually lowered at a constant rate of R°C/min from the initial to the final temperature. On singlecrystalline substrates, this technique results in smooth surfaces. However, on multicrystalline substrates, epitaxial growth is retarded at the grain boundaries, resulting in a much rougher surface which is difficult to process into solar cells [6]. Fig. 2a shows such a grain boundary. The higher energy of the grain boundary has resulted in reduced growth. Instead, the solute material diffusing towards the grain boundary is incorporated on either side of it. Once this surface roughness has been established, it is exacerbated during further growth by the well-known phenomenon of constitutional supercooling: silicon diffusing towards the epitaxial layer first encounters these raised walls and therefore has a greater chance of being incorporated into them, while the grain boundary is further starved of silicon. The intragrain regions of multicrystalline epitaxial layers are also frequently found to display faceted or undulated surfaces, particularly if the substrate was not sufficiently polished prior to growth. We have found that the use of periodic meltback results in a much improved surface morphology. In this approach, alternating cycles of heating and cooling are used. The temperature variations during a typical growth run are shown in Fig. 1. Note that no meltback of the substrate is used prior to the initiation of growth. The temperature intervals were chosen between *¹ "(40°C—100°C) and *¹ "(20°C—30°C), #00)%!5 while typical heating and cooling rates were R "0.7°C/min and R "2°C/min. #00)%!5 Due to a higher silicon solubility change in the melt per unit temperature interval at higher temperatures, the cooling and heating intervals were chosen shorter at the beginning of growth (*¹ "40°C, *¹ "20°C) and progressively lengthened as #00)%!5 the growth temperature decreased. Fig. 2b shows the same grain boundary as in Fig. 2a when grown using periodic meltback. The meltback cycles have preferentially dissolved away the raised walls and

Fig. 1. The temperature—time profile for epitaxial growth with periodic meltback.

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Fig. 2. Cross-sectional views of the same grain boundary in epitaxial layers grown (a) without and (b) with periodic meltback. (c) Illustration of the definition of the grain boundary groove depth D and epitaxial layer thickness ¼.

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resulted in a much smoother surface in this region. Further, the morphology of the intragrain regions was also improved. The appearance of faceted features or undulated and rough surfaces, usually observed on epitaxial layers grown by the standard technique, was suppressed. The improved morphology is again likely to be a result of the solutal transport in the melt: during meltback, the degree of undersaturation of the melt increases with distance away from the solid—liquid interface. Thus, protuberances will be dissolved preferentially. Our results have shown that the amount of meltback required to achieve flat surfaces can be quite small, as indicated by the above temperature intervals. Comparison of the ratio of grain boundary groove depth D to epitaxial layer thickness ¼ at identical grain boundaries grown with and without meltback shows that the average depth at the grooves is less in layers grown with periodic meltback. The evaluation of 18 grain boundaries gave D/¼"0.37 with meltback and D/¼"0.48 without meltback. This reduction of the grain-boundary groove depth can be attributed to the improved supply of silicon to the grain boundaries, due to the absence of the grain boundary walls. However, the improvement in surface roughness at the grain boundaries is much greater than the above numbers indicate due to the near complete removal of the grain boundary walls.

3. Minority carrier lifetime measurements by the photoconductivity decay method For the determination of the minority carrier lifetime, epitaxial layers were grown on heavily doped substrates coming from adjacent sections of the ingot and so displaying nearly identical grain boundaries. Growth was carried out using different cooling rates from 0.3 to 2.0°C/min. Following growth, the substrates was first completely removed by chemical etching, except for an annulus around the edge of the wafer which provides sufficient mechanical strength for handling. The surfaces were then passivated with a double-sided phosphorus diffusion, followed by growth of a 30 nm thick oxide. The minority carrier lifetimes were measured by the quasi-steady-state photoconductivity decay method [7]. The samples were illuminated with light from a flash of several ms duration and the change in sample conductivity was measured with an inductive coil. Since the rate of decay of the light signal is much slower than the minority carrier lifetime in the samples, the effective lifetime is given by *N *p q " " . %&& G qG (k #k ) % ) Here *N is the number of photogenerated electron—hole pairs, G is the rate of photogeneration of electron—hole pairs, *p is the change in sample conductivity, k and k are the electron and hole mobilities and q is the electronic charge. To % ) estimate the values of k and k , the mean doping in the epitaxial layers was first % ) determined from capacitance—voltage measurements on samples grown from the same melt to be 5]1016 cm~3. The mobilities were then assumed to be 0.75 times their

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values in single-crystal silicon of the same dopant concentration, based on the results of Lo¨lgen et al. [8]. The rate of generation of excess electron—hole pairs in the samples was estimated by modelling the current I flowing in a silicon cell with a bare front 5%45 surface using PC-1D [9], under the condition of collection of all minority carriers and AM1.5 illumination. In all cases, q was measured to be around 10 ls for our multicrystalline epitaxial %&& layers. The bulk minority carrier lifetime is always larger than this value. For the cases where both surfaces have identical recombination velocity S and a sample thickness ¼, q is related to q by "6-, %&& 1 1 2S " # . q q ¼ %&& "6-, Bulk lifetimes in excess of 10 ls imply minority carrier diffusion lengths larger than 100 lm, so that cell efficiencies in excess of 16% are a realistic target.

4. Fabrication of solar cells on multicrystalline epitaxial layers Solar cells with an area of 4 cm2 were fabricated on the epitaxial layers using standard photolithographic techniques. A sheet phosphorus diffusion of 100 )/h was made in the cell area and was driven in for 1 h at 1000°C. A 20 nm thick passivating oxide was grown over the front surface. The front contact grid was formed by evaporating 250 nm Cr and 250 nm Pd, followed by electroplating Ag. The samples had a full-area aluminium rear contact. Finally, a TiO antireflection coating was 2 evaporated on the front of the cells and the cells were encapsulated under low iron glass. Table 1 lists the electrical parameters of two of our cells before and after encapsulation, carried out using an externally calibrated reference cell. The evaporation of TiO 2 and encapsulation boost the short-circuit current J by more than 40%. The poor fill 4# factor of cell G08 was a result of a high series resistance in the front metal grid. Note

Table 1 The parameters of two solar cells fabricated on multicrystalline epitaxial layers, at 25°C Cell ID

Substrate

Epi thickness (lm)

Comments

J » (mV) Fill factor Efficiency 4# 0# (mA/cm2) (%)

G08

Eurosolare 0.2 ) cm

50

No AR coating

23.2

629

0.739

10.8

I4

Wacker 0.015 ) cm

25

TiO #encapsulation 2 No AR coating

33.8 20.8

639 630

0.708 0.793

15.4 10.4

TiO #encapsulation 2

30.0

639

0.790

15.2

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that the substrate of this cell would have contributed to J due to the low substrate 4# doping and a potentially high minority carrier lifetime. However, modelling results indicate that the current originating from the substrate for a lifetime of 2 ls is only about 0.5 mA/cm2. Despite the low fill factor, the cell efficiency has reached 15.4%. A better fill factor of 0.79 would result in efficiencies around 17%. The efficiency of cell I4 is limited by the relatively low short-circuit current. Increasing the epitaxial layer thickness to 50 lm is expected to increase efficiencies to at least 16%. Due to the high substrate doping, the contribution of the substrate to the photocurrent is negligible. Further improvements in cell performance can be obtained by texturing of the front surface of the cell. A suitable method of achieving this on multicrystalline silicon is to etch hemispheres into the surface using an isotropic etchant, as described by Stocks et al. [10]. Texturing should result in a further increase in J as a result of a further 4# reduction in front-surface reflection and an increase in the optical path length of the light.

5. Conclusions We have demonstrated that multicrystalline epitaxial films of high quality can be grown on multicrystalline substrates. The morphology of these films is significantly improved by the incorporation of meltback cycles into the growth process. The theoretically predicted potential for high cell efficiencies on this material has been experimentally confirmed. Small area, 2]2 cm2 cells display efficiencies above 15%, with substantial room for further improvement. The deposition of thin silicon films on cheap multicrystalline substrates therefore appears to be a viable approach for the achievement of low-cost silicon solar cells.

Acknowledgements The authors gratefully acknowledge the use of the facilities at the Electron Microscopy Unit at the ANU. This work was supported by the Australian Research Council.

References [1] A.W. Blakers, K.J. Weber, Sixth Workshop on the Role of Impurities and Defects in Device Processing, National Renewable Energy Laboratories, Colorado, 1996, p. 64. [2] G. Wagner, B. Steiner, Solid State Phenomena 37/38 (1994) 427. [3] B. Steiner, G. Wagner, J. Crystal Growth 146 (1994) 293. [4] J.H. Werner, J.K. Arch, R. Brendel, G. Langguth, M. Konuma, E. Bauser, G. Wagner, B. Steiner, W. Appel, Proc. 12th EC PV Solar Energy Conf. Amsterdam, 1994. [5] B.J. Baliga, J. Electrochem. Soc. 129 (1982) 665. [6] K.J. Weber, A.W. Blakers, J. Crystal Growth 154 (1995) 54.

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[7] R.A Sinton, A. Cuevas, Appl. Phys. Lett., to be published. [8] P. Lo¨lgen, F.J. Bisshop, W.C. Sinke, R.A. Steeman, L.A. Verhoef, P.P. Michiels, R.J.C. van Zolingen, Proc. 6th Photovoltaic Solar Energy Conf., New Delhi, 1992, p. 239. [9] P. Basore, PC1D version 4, University of New South Wales, 1996. [10] M. Stocks, A. Carr, A.W. Blakers, Proc. 1st World Conf. Photovoltaic Solar Energy Conversion, IEEE, Hawaii, 1994, p. 1551.