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Minority carrier lifetime and efficiency improvement of multicrystalline silicon solar cells by two-step process
Renewable Energy 77 (2015) 331e337
Contents lists available at ScienceDirect
Renewable Energy journal homepage: www.elsevier.com/locate/renene
Minority carrier lifetime and efficiency improvement of multicrystalline silicon solar cells by two-step process L. Derbali*, A. Zarroug, H. Ezzaouia ^le de Borj-C Photovoltaïc Laboratory, Research and Technology Center of Energy, Technopo edria, BP 95, Hammam-Lif 2050, Tunisia
a r t i c l e i n f o
a b s t r a c t
Article history: Received 23 November 2013 Accepted 4 December 2014 Available online
Impurities and defects are of significant interest in multicrystalline silicon, due to the detrimental effect they can have on carrier lifetimes and electrical properties. In view of that, it is important to incorporate certain processing steps to decrease the recombination activities. In this study, a novel experiment was applied as a beneficial approach to improve the electronic quality of low-resistivity mc-Si substrates via a two-step process. Initially, the first step involves gettering multicrystalline substrates using sacrificial porous silicon layer on both sides, which was introduced as a simple sequence for efficient extrinsic gettering schemes. The gettering experiment was performed at 600e900 C, and optimum results were obtained at 900 C. Then, the second step involves coating the front surface of gettered mc-Si at 900 C with vanadium oxide that serves as an excellent antireflection layer and leads to improve furthermore the electrical properties. Significant improvements were obtained after the deposition of vanadium oxide antireflection coating, in view of the fact that gettered mc-Si substrate at 900 C provides the highest minority carrier lifetime and the lowest effective surface recombination velocity. An overall increase of the electrical properties was obtained after the described two-step process. The conversion efficiency increases from 6% (reference) and reached 13.7%. © 2014 Elsevier Ltd. All rights reserved.
Keywords: Gettering Surface passivation Multicrystalline silicon Conversion efficiency Minority carrier lifetime Internal quantum efficiency
1. Introduction Multicrystalline silicon solar cells performance is mainly limited by minority carrier recombination at dislocations and intragrain defects such as certain impurities or precipitates. These impurities can be contained in the silicon feedstock used to grow multicrystalline silicon (mc-Si) ingots, since it comes chiefly from silicon rejects from the microelectronics industry. The presence of electric active grain boundaries in multicrystalline silicon is a serious limitation for the photovoltaic (PV) efficiency. Due to the high densities of defects and metallic impurities, additional steps are needed to improve the quality of mc-Si substrates [1]. The possibility of improving the electrical properties of silicon wafers, by extracting impurities from them, using thermal treatment under oxygen atmosphere, or phosphorus diffusion, is well known. Besides, the porous silicon (PS) layer may be used as an efficient sacrificial layer for gettering metallic impurities [2e5]. High-temperature annealing of the chemically etched porous silicon enhances the impurity
* Corresponding author. Tel.: þ216 22 459 049. E-mail address: [email protected] (L. Derbali). http://dx.doi.org/10.1016/j.renene.2014.12.014 0960-1481/© 2014 Elsevier Ltd. All rights reserved.
diffusion into the porous silicon network, thereby acting as an efficient external gettering site and impurities can be accommodated inside the cavities of the porous silicon network. The efficiency of a solar cell is mainly related to the reflectivity of the wafer surface, absorption of incident photons and their conversion into electrical current. A good anti-reflective coating (ARC) is vital for solar cell performance as it ensures a high photocurrent by minimising reflectance [6,7]. To increase the conversion efficiency, antireflection coating, light trapping and surface passivations must be taken into account. Vanadium oxide has been used as an antireflection coating and to passivate the front surface of mc-Si solar cells, grain boundaries (GBs) and porous silicon [8,9] and make the possibility of combining in one processing step an antireflection coating deposition along with efficient surface state passivation, as compared to a reference wafer. The aim of this work is to investigate the effect of two-step treatments, gettering mc-Si substrates prior to the deposition of vanadium oxide antireflection layer at the front surface, what led to an important improvement of the electrical properties and consequently the conversion efficiency.
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2. Experimental details The experiments were carried out on p-type boron doped multicrystalline silicon substrates with a bulk resistivity of 0.5e2.0 U cm and a thickness of about 400-mm. The surface area of used substrates is 3.6 cm2. Samples were selected from consecutive mc-Si wafers sharpened successively in the same ingot Therefore, differences between sister wafers after different processing can be interpreted as being due to variations in the process parameters, rather than due to material variations. In order to obtain a cleaned surface, required for homogeneous porous layer formation, Wafers were dipped for a few seconds in an acid mixture solution (HF: 16%, HNO3: 64%, CH3COOH: 20%). Multicrystalline silicon (mc-Si) samples have been divided into two sets, as described in Fig. 1. PS layers were formed on both sides by the stain-etching technique using HF/HNO3/H2O solution with a 1:3:5 volume composition. The PS formation is then followed by a photo-thermal heating process. The samples are placed in a closed quartz reactor, then, introduced into an infrared tubular furnace equipped with infrared lamps. Thermal annealing was performed at different temperatures, during 60 min under an O2 atmosphere. The aim of this thermal treatment was to concentrate the unwanted impurities in the inactive region (the formed porous silicon layer on both sides of the substrates). In order to eliminate the forming silicon oxide layer and to remove the PS structure, after annealing, we immerse these samples successively in an HF and a NaOH (1N)
solution. Thermal treatments are all ranging between 600 C and 900 C for 30 min. Thereafter, deposited antireflection layer was achieved using vanadium pentoxide (V2O5) powder, which was thermally evaporated under vacuum (at 105 Torr) by Joule effect. The Powder to be evaporated was put on conductive (tungsten) crucible and the distance crucible-sample was adjusted at 20 cm. Coated mc-Si substrates with vanadium oxide antireflection layer were subjected to a thermal treatment to activate furthermore the passivation process (Fig. 1). The effect of the gettering procedure was investigated by means of the effective minority carrier lifetime (teff), measured using WTC120 lifetime tester. The chemical composition of the deposited vanadium oxide thin films was analyzed by means of Fourier Transform Infrared Spectroscopy (FTIR). Surface and cross-section morphology were determined by a scanning electron microscope (SEM). To achieve the mc-Si solar cells, n-type front emitter junction was achieved by the use of POCl3 diffusion in a rapid thermal infrared tubular furnace. The back aluminum (Ag/Al) and the front Ag contact were screen printed and fired at 850 C and 620 C, respectively. 3. Results and discussion The minority carrier lifetime is considered as an important parameter that defines the quality of the crystalline silicon substrates. The measured teff takes into account the recombination
Fig. 1. Applied process sequences in sets (S1) and (S2).
L. Derbali et al. / Renewable Energy 77 (2015) 331e337
333
Table 1 Variation of the effective surface recombination velocity in the two sets (S1) and (S2). Thermal treatment ( C)
Fig. 2. Schematic representation of a substrate illustrating the different parameters that have a direct effect on Seff and teff.
mechanisms that occurs at both surfaces of the sample as well as within its bulk. Electrons and holes can recombine at the surfaces of a silicon wafer, and the speed at which they do is called the surface recombination velocity (S). Thus, recombinations occur in the bulk as well as on both surfaces of the samples and the measured lifetime is in fact an effective lifetime (teff) which depends on the bulk lifetime (tb) and on the recombination velocity S of the surfaces (ts), as illustrated in Fig. 2. The effective lifetime value is given by Eq. (1):
1 1 1 ¼ þ teff tbulk tsurf
(1)
Set (S1)
Set (S2)
6290.3 301.2 204.1 131.2 100.1
6290.3 211.7 149.7 109.8 82.1
The defects at the surface of substrates are mainly produced by the interruption to the periodicity of the crystal lattice, which engenders dangling bonds at the semiconductor surface. The reduction of the number of dangling bonds, and hence the recombination, at the surfaces of the substrates, was achieved by growing the vanadium oxide thin film onto the front surface of the mc-Si substrates (set (S2)) which ties up the majority of these dangling bonds, even those existing in the grain boundaries (GBs). This reduction of dangling bonds is known as surface passivation, which leads to an important decrease of the surface recombination velocity (Seff). We can approximate that the majority of the recombination activities occur on the mc-Si surfaces, once we consider high values of the bulk lifetime (tbulk) [3,10]. Accordingly, we can neglect the first term of the right side in Eq. (2). As a result, we can deduce an upper limit of the effective surface recombination, using the Eq. (3):
1 1 2Seff ¼ þ teff tbulk W
Seff
W 2teff
(2)
(3)
where Seff is the effective surface recombination velocity and W is the wafer thickness. Seff is deduced from the effective minority carrier lifetime values of the samples, considering their intrinsic lifetime values. Accordingly, the calculated Seff values mark an upper limit to the effective surface recombination velocity. As shown in Table 1, we notice the effect the gettering (set (S1)) and the two-step process (set (S2)) that provide an excellent surface passivation. Regarding the original mc-Si wafer (reference), a
(
The gettering-induced improvement in the processed wafers was monitored by measuring teff vs. annealing temperatures (set (S1)). Fig. 3 reveals that the measured lifetime, made on sister wafers before and after gettering, increases whenever the annealing temperature increases and reach optimal value at 900 C. An apparent enhancement of teff has been obtained in all sets. Regarding the gettered mc-Si substrates of the first set (set (1)), the results showed a significant improvement of the effective minority carrier lifetime values, which attain 194.74 ms at a gettering temperature of 900 C and found to be the optimal value. In fact, the thermal treatment in set S(1) activates the migration of a large amount of impurities toward the PS structure, which was in turn removed using a chemical etching (HF 16%: HNO3 64%: CH3COOH 20%) solution. Further improvement of the effective minority carrier lifetime was obtained for samples coated with vanadium oxide antireflection layer, (set (S2)), in which the highest value of 237.53 m sec is reached at a post-deposition annealing of 900 C. These enhancements are due to an important decrease of the grain and GBs carrier recombination activities, achieved via the combined effect of the described two-step process (i.e gettering and surface passivation using vanadium oxide antireflection coating).
Reference 600 C 700 C 800 C 900 C
Effective surface recombination velocity Seff (cm s1)
Fig. 3. Measured effective minority carrier lifetime teff (msec) in sets (S1) and (S2), under low level injection Dn ¼ 1014 cm3.
Fig. 4. FTIR spectra of deposited vanadium oxide thin films after a post-deposition annealing at various temperatures (set (S2)).
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Fig. 5. Cross-sectional view (right-hand side) and plan-view SEM images (left-hand side) of the deposited vanadium oxide thin films (set (S2)), after a post-deposition annealing at (a) 600 C, (b) 700 C, (c) 800 C and (d) 900 C.
L. Derbali et al. / Renewable Energy 77 (2015) 331e337
high Seff value of 6290.3 cm s1 was obtained. Gettered mc-Si substrates exhibit an important decrease of the Seff, and attains its lowest value at 900 C. Further decrease of the effective surface recombination velocity was achieved after coating the front surface, of gettered mc-Si substrates at 900 C, with vanadium oxide thin film (set (S2)). The post-deposition annealing at 900 C led to the optimum results, highest minority carrier lifetime and lowest effective surface recombination velocity. These values of Seff indicate a high surface quality, probably due to the saturation of dangling bonds at the interface (i.e vanadium oxide/substrate). Highest substrates quality was obtained in the set (S2), which is in a good correlation with the achieved effective minority carrier lifetime values. It is obvious that deposited vanadium oxide antireflection layer has a crucial role on the passivation process. Taking into account the detrimental effect of grain boundaries (GBs) in mcSi substrates, we suggest a possible passivation of GBs that occurs after coating the front surface. It may be due either to a gettering of the fast diffusing metallic impurities present in the (GBs) via vanadium related trapping sites during the thermal annealing and/or to saturation of dangling bonds in grain boundaries by diffused vanadium atoms and the amount of oxygen at the interface mc-Si/ vanadium oxide. It is shown that the combined effect, gettering and passivation with vanadium oxide antireflection coating, has a positive trend of improvement in the electronic properties of mc-Si substrates. This enhancement is less pronounced when comparing with obtained results in the first set (S1) (i.e gettered substrates). Accordingly, we will limit our discussion to the study of the film morphology, reflectivity and the conversion efficiency. Our focus will be limited to the set (S2), in which optimum results was achieved. Fig. 4 shows FTIR spectra of the deposited films onto the front surface of substrates of set (S2). Observed peaks at 800 cm1 and 975 cm1 can be assigned to V2O5 vibrational modes [10,8] while the peak observed at 910 cm1 can be assigned to the vibration of V]O [11]. The characteristic vibrational bands at 470 cm1 and 760 cm1 are attributed to the VeOeV vibration [12,8,3]. We notice that the oxygen content in the films increases with the annealing temperature, which justify the increase of the peaks intensity. The observed peak assigned to the vibration of SieOeSi increases after annealing the coated substrates from 700 C to 900 C. The absorption peak at 1090 cm1 can be attributed to SieOeSi vibrations
Fig. 6. Total reflectivity spectra of coated substrates with vanadium oxide antireflection layer after a post-deposition annealing at 600 C, 700 C, 800 C and 900 C compared to a reference wafer.
335
[13e15,3]. We can conclude that, after the post-deposition annealing, the amount of oxygen has grown obviously. Fig. 5 presents a SEM top view of the prepared samples respectively treated at (a) 600 C, (b) 700 C, (c) 800 C, (d) 900 C. It is clearly shown the uniform growth of the nanoparticles of vanadium oxide and its dependence with the annealing temperature. Obtained structures were found to possess very good absorption characteristics to sunlight due to the high tendency of incident light to be scattered between the grains. The right-hand side of Fig. 5 shows the plan-view SEM images at a post-deposition annealing temperature of 600, 700, 800 and 900 C. According to SEM images, we reveal that most film structure is composed of nanostructures of vanadium oxide grains. The grain size decreases by increasing annealing temperature without considerable changes on the film thickness, which was found to be 1 mm. The role of temperature on the grain growth requires to be understood and more systematic study is needed. The right-hand side of Fig. 5 shows the cross-sectional SEM image, revealing the granular nanostructure of the films and a dense interface structure also can be observed, indicating strong interface bonding. The SEM micrographs clearly exhibits the nanostructure produced as a result of the thermal treatment that leads to an increased absorption of the incident light as a result of the multiple reflections. The SEM data demonstrated that when substrate temperature increases, the average grain size exhibits a decreasing trend. To investigate the optical property of the deposited vanadium oxide films, the antireflection efficiency of the deposited films has been investigated with a UVeVis spectrophotometer equipped with an integrating sphere accessory. We notice an important decrease of the surface reflectance, as indicated in Fig. 6. The reflectance decreases to 7% after a post-deposition annealing of 900 C for wavelengths around 300e650 nm. It is clearly shown from the SEM figures that the surface microstructure resulted in an increased absorption of the incident light was caused by multiple reflections. The measurement of the internal quantum efficiency (IQE) of the treated mc-Si substrates of set (S2) is shown in Fig. 7, compared to a reference wafer. IQE points out the efficiency and ability of incident photons to generate collectable carriers, without taking into account the transmitted or reflected photons. All annealing temperatures exhibit an increased blue response, in short wavelengths (400e700 nm). These improvements are related to the significant decrease of the recombination activities near the front
Fig. 7. Internal quantum efficiency (IQE) spectra of the coated multicrystalline silicon substrates (S2).
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Fig. 8. Current-voltage characteristics in dark condition of the treated wafers of set (S2).
surface and an improvement of the carrier collection at the emitter region, illustrating a good passivation effect especially at 900 C annealing temperature, what proves evidently the obtained effective surface recombination velocity. The obvious increase of the internal quantum efficiency (IQE) in the long wavelength range 700e1000 nm is due to bulk passivation, especially after annealing the coated substrates at 900 C. This improvement can be explained by the important reduction of the carrier recombination activities in the bulk of the treated wafers. Coating the front surface with vanadium oxide leads to an efficient surface and bulk passivation and indicates an extended effect deep into the bulk of the substrate, which we suggest to be considered especially at grain boundaries which are the main source of recombination activities in mc-Si substrates. In Fig. 8, the dark IeV characteristics of samples treated by twostep process (S2) are shown. It appears that the diode quality is improved by increasing the treatment temperature. In the reverse bias, the leakage current due to the escape of holes through deep recombination centers is more pronounced after a post-deposition annealing at 900 C. We notice a significant decrease of the reverse current and an increase of the direct one. This further implies an increase of the shunt resistance (Rsh) and a decrease of the series resistance (Rs), as indicated in Table 2. This effect indicates the enhancement of the electronic properties of the silicon material subjected to the above treatment. The quality of the emitter has an important effect, in which a high concentration of phosphorus at the surface can takes place and forms a “dead layer”, electrically inactive [16,17]. Vanadium oxide allowed the decrease of the “dead layer” depth via the surface (emitter) oxidation and an inevitable role of vanadium on the improvement of the emitter surface passivation. In order to evaluate the series resistance (Rs), we used the illuminated ðI VÞ characteristics measured under AM1.5 illumination, depicted in Fig. 9. First of all, the series resistance (Rs) was estimated from the following equation [18]:
Fig. 9. The illuminated current versus voltage (IeV) characteristics (Set (S2)).
Rs ¼
Vm 2Vm Voc Im Im þ ðIsc Im Þlnð1 ðIm =Isc ÞÞ
Afterward, from the dark (IeV) characteristics (Fig. 8) the values of the shunt resistance (Rsh) were evaluated as follows [19]; for ðV Rs IÞ < 0: the dark (IeV) characteristic can be approximated to a linear curve ðI ¼ ðRsh þ Rs ÞVÞ. It is worth to note that the decrease of the reverse current depends on the variation of Rsh. The improvement of the electrical properties is not due only to the gettering process prior the deposition of the antireflection layer, but it is due to the combined effect with the deposited vanadium oxide thin film, which reinforce the oxidation process, especially after the subsequent annealing of the coated substrates (S2), resulting to an efficient surface and (GBs) passivation. Fig. 9 shows the IeV characteristics of all cells (of set (S2)) measured under light illumination (100 mW/cm2). Four parameters of solar cells were used to define illuminated solar cells: the short-circuit current (Isc), the open-circuit voltage (Voc), the fill factor FF and the efficiency h. Table 3 shows the values of the extracted parameters. We may note that all parameters are improved. An increase of about 15 mA/cm2 in the short-circuit current density (Jsc) is observed, in comparison to the reference cell. The open-circuit voltage (Voc) was improved from 0.51 V to about 0.57 V. Table 3 provides the photovoltaic characteristics of the obtained cells and shows a significant improvement of the conversion efficiency of mc-Si solar cells, which attain 13.7 (surface area 3.6 cm2).
4. Conclusion In this study, we investigated the effect of two-step process, gettering then coating the front surface with vanadium oxide ARC. The combined effect results in an important improvement of the electronic quality of mc-Si substrates. The deposition of vanadium
Table 3 Cell parameters extracted from the IeV illuminated curves (Set (S2)). Table 2 Series and shunt resistances Rs and Rsh of the processed solar cells (set (S2)).
Rs (U) Rsh (U)
Reference
600 C
700 C
800 C
900 C
6.1 288
3.8 1371
2.4 1485
1.7 1703
1.3 1871
T ( C)
Jsc (mA/cm2)
Voc (mV)
FF
h
Reference 600 C 700 C 800 C 900 C
19 23 26 29 34
518 534 554 566 579
68 68.8 69 69.7 70
6 8.4 9.9 11.4 13.7
L. Derbali et al. / Renewable Energy 77 (2015) 331e337
oxide thin film, as an antireflection layer, onto the front surface of gettered mc-Si substrates at 900 C, which is the optimum temperature in the gettering process, enhances the passivation effect and provides a significant neutralization of Si dangling bonds. The effective minority carrier lifetime and the internal quantum efficiency have been improved noticeably. The conversion efficiency increased from 6% and reached 13.7% after the two-step process. Acknowledgements This work was supported by Ministry of High Education and Scientific Research of Tunisia. References [1] Choi Sung Jin, Yu Gwon Jong, Kang Gi Hwan, Lee Jeong Chul, Kim Donghwan, Song Hee-eun. The electrical properties and hydrogen passivation effect in mono crystalline silicon solar cell with various pre-deposition times in doping process. Renew Energy 2013;54:96e100. [2] Abdurakhmanov BM, Bilyalov RR. Hydrogen passivation of defects in polycrystalline silicon solar cells. Renew Energy 1995;6:303e5. [3] Derbali Lotfi, Ezzaouia Hatem. Phosphorus diffusion gettering process of multicrystalline silicon using a sacrificial porous silicon layer. Nanoscale Res Lett 2012;7:424. [4] Dhungel Suresh Kumar, Yoo Jinsu, Kim Kyunghae, Ghosh Somnath, Jung Sungwook, Yi Junsin. Study of electrical properties of oxidized porous silicon for back surface passivation of silicon solar cells. Renew Energy 2008;33:282e5. [5] Derbali L, Dimassi W, Ezzaouia H. Improvement of the minority carrier mobility in low-quality multicrystalline silicon using a porous silicon based gettering under an O2 atmosphere. Energy Procedia 2011;10:243e8.
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[6] Karouta Fouad, Vora Kaushal, Tian Jie, Jagadish Chennupati. Structural, compositional and optical properties of PECVD silicon nitride layers. J Phys D Appl Phys 2013;45:445301. [7] Zhou Chunlan, Li Tao, Song Yang, Zhou Su, Wang Wenjing, Zhao Lei, et al. SiOx(C)/SiNx dual-layer anti-reflectance film coating for improved cell efficiency. Sol Energy 2011;85:3057e63. [8] Derbali L, Ezzaouia H. Vanadium-based antireflection coated on multicrystalline silicon acting as a passivating layer. Sol Energy 2012;86:1504e10. [9] Derbali L, Ezzaouia H. Electrical properties improvement of multicrystalline silicon solar cells using a combination of porous silicon and vanadium oxide treatment. Appl Surf Sci 2013;271:234e9. [10] Bootz B, Finkenrath H, Franz G, Uhle N. Long-wave optical vibrations of V2O5. Solid State Commun 1973;13:1477. [11] Young TF, Liu JF, Wu CC, Fu GH, Chen CS. Study of Ag thin films deposited on porous silicon. Appl Surf Sci 1996;92:57. [12] Sanchez C, Livage J, Lucazeau G. Infrared and Raman study of amorphous V2O5. J Raman Spectrosc 1982;12:68e72. [13] Fidalgo A, Ilharco LM. The defect structure of solegel-derived silica/polytetrahydrofuran hybrid films by FTIR. Non-Crystalline Solids 2001;283: 144e54. ^bel U, Baiker A. Oxidation of butane and buta[14] Wildberger MD, Mallat T, Go diene to furan over vanadiaesilica mixed oxides. Appl Catal A Gen 1998;168: 69e80. [15] Poullain G, Mercey B, Nouet G. Conductance of silicon grain boundaries in asgrown and annealed bicrystals. J Appl Phys 1987;61:1547. [16] Finetti M, Negrini P, Solmi S, Nobili D. Electrical properties and stability of supersaturated phosphorus-doped silicon layers. J Electrochem Soc 1981;128: 1313e7. [17] Solmi S, Parisini A, Angelucci R, Armigliato A. Dopant and carrier concentration in Si in equilibrium with monoclinic Si P precipitates. Phys Rev B 1996;53:7836e41. [18] Quanxi J, Anderson WA. A novel approach for evaluating the series resistance of solar cells. Sol Cells 1988;25:311e8. [19] Schroder DK. Semiconductor materiel and device characterisation. Arizona: Wiley-Interscience Publication; 1990. p. 147 [Chapter 4].
Contents lists available at ScienceDirect
Renewable Energy journal homepage: www.elsevier.com/locate/renene
Minority carrier lifetime and efficiency improvement of multicrystalline silicon solar cells by two-step process L. Derbali*, A. Zarroug, H. Ezzaouia ^le de Borj-C Photovoltaïc Laboratory, Research and Technology Center of Energy, Technopo edria, BP 95, Hammam-Lif 2050, Tunisia
a r t i c l e i n f o
a b s t r a c t
Article history: Received 23 November 2013 Accepted 4 December 2014 Available online
Impurities and defects are of significant interest in multicrystalline silicon, due to the detrimental effect they can have on carrier lifetimes and electrical properties. In view of that, it is important to incorporate certain processing steps to decrease the recombination activities. In this study, a novel experiment was applied as a beneficial approach to improve the electronic quality of low-resistivity mc-Si substrates via a two-step process. Initially, the first step involves gettering multicrystalline substrates using sacrificial porous silicon layer on both sides, which was introduced as a simple sequence for efficient extrinsic gettering schemes. The gettering experiment was performed at 600e900 C, and optimum results were obtained at 900 C. Then, the second step involves coating the front surface of gettered mc-Si at 900 C with vanadium oxide that serves as an excellent antireflection layer and leads to improve furthermore the electrical properties. Significant improvements were obtained after the deposition of vanadium oxide antireflection coating, in view of the fact that gettered mc-Si substrate at 900 C provides the highest minority carrier lifetime and the lowest effective surface recombination velocity. An overall increase of the electrical properties was obtained after the described two-step process. The conversion efficiency increases from 6% (reference) and reached 13.7%. © 2014 Elsevier Ltd. All rights reserved.
Keywords: Gettering Surface passivation Multicrystalline silicon Conversion efficiency Minority carrier lifetime Internal quantum efficiency
1. Introduction Multicrystalline silicon solar cells performance is mainly limited by minority carrier recombination at dislocations and intragrain defects such as certain impurities or precipitates. These impurities can be contained in the silicon feedstock used to grow multicrystalline silicon (mc-Si) ingots, since it comes chiefly from silicon rejects from the microelectronics industry. The presence of electric active grain boundaries in multicrystalline silicon is a serious limitation for the photovoltaic (PV) efficiency. Due to the high densities of defects and metallic impurities, additional steps are needed to improve the quality of mc-Si substrates [1]. The possibility of improving the electrical properties of silicon wafers, by extracting impurities from them, using thermal treatment under oxygen atmosphere, or phosphorus diffusion, is well known. Besides, the porous silicon (PS) layer may be used as an efficient sacrificial layer for gettering metallic impurities [2e5]. High-temperature annealing of the chemically etched porous silicon enhances the impurity
* Corresponding author. Tel.: þ216 22 459 049. E-mail address: [email protected] (L. Derbali). http://dx.doi.org/10.1016/j.renene.2014.12.014 0960-1481/© 2014 Elsevier Ltd. All rights reserved.
diffusion into the porous silicon network, thereby acting as an efficient external gettering site and impurities can be accommodated inside the cavities of the porous silicon network. The efficiency of a solar cell is mainly related to the reflectivity of the wafer surface, absorption of incident photons and their conversion into electrical current. A good anti-reflective coating (ARC) is vital for solar cell performance as it ensures a high photocurrent by minimising reflectance [6,7]. To increase the conversion efficiency, antireflection coating, light trapping and surface passivations must be taken into account. Vanadium oxide has been used as an antireflection coating and to passivate the front surface of mc-Si solar cells, grain boundaries (GBs) and porous silicon [8,9] and make the possibility of combining in one processing step an antireflection coating deposition along with efficient surface state passivation, as compared to a reference wafer. The aim of this work is to investigate the effect of two-step treatments, gettering mc-Si substrates prior to the deposition of vanadium oxide antireflection layer at the front surface, what led to an important improvement of the electrical properties and consequently the conversion efficiency.
332
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2. Experimental details The experiments were carried out on p-type boron doped multicrystalline silicon substrates with a bulk resistivity of 0.5e2.0 U cm and a thickness of about 400-mm. The surface area of used substrates is 3.6 cm2. Samples were selected from consecutive mc-Si wafers sharpened successively in the same ingot Therefore, differences between sister wafers after different processing can be interpreted as being due to variations in the process parameters, rather than due to material variations. In order to obtain a cleaned surface, required for homogeneous porous layer formation, Wafers were dipped for a few seconds in an acid mixture solution (HF: 16%, HNO3: 64%, CH3COOH: 20%). Multicrystalline silicon (mc-Si) samples have been divided into two sets, as described in Fig. 1. PS layers were formed on both sides by the stain-etching technique using HF/HNO3/H2O solution with a 1:3:5 volume composition. The PS formation is then followed by a photo-thermal heating process. The samples are placed in a closed quartz reactor, then, introduced into an infrared tubular furnace equipped with infrared lamps. Thermal annealing was performed at different temperatures, during 60 min under an O2 atmosphere. The aim of this thermal treatment was to concentrate the unwanted impurities in the inactive region (the formed porous silicon layer on both sides of the substrates). In order to eliminate the forming silicon oxide layer and to remove the PS structure, after annealing, we immerse these samples successively in an HF and a NaOH (1N)
solution. Thermal treatments are all ranging between 600 C and 900 C for 30 min. Thereafter, deposited antireflection layer was achieved using vanadium pentoxide (V2O5) powder, which was thermally evaporated under vacuum (at 105 Torr) by Joule effect. The Powder to be evaporated was put on conductive (tungsten) crucible and the distance crucible-sample was adjusted at 20 cm. Coated mc-Si substrates with vanadium oxide antireflection layer were subjected to a thermal treatment to activate furthermore the passivation process (Fig. 1). The effect of the gettering procedure was investigated by means of the effective minority carrier lifetime (teff), measured using WTC120 lifetime tester. The chemical composition of the deposited vanadium oxide thin films was analyzed by means of Fourier Transform Infrared Spectroscopy (FTIR). Surface and cross-section morphology were determined by a scanning electron microscope (SEM). To achieve the mc-Si solar cells, n-type front emitter junction was achieved by the use of POCl3 diffusion in a rapid thermal infrared tubular furnace. The back aluminum (Ag/Al) and the front Ag contact were screen printed and fired at 850 C and 620 C, respectively. 3. Results and discussion The minority carrier lifetime is considered as an important parameter that defines the quality of the crystalline silicon substrates. The measured teff takes into account the recombination
Fig. 1. Applied process sequences in sets (S1) and (S2).
L. Derbali et al. / Renewable Energy 77 (2015) 331e337
333
Table 1 Variation of the effective surface recombination velocity in the two sets (S1) and (S2). Thermal treatment ( C)
Fig. 2. Schematic representation of a substrate illustrating the different parameters that have a direct effect on Seff and teff.
mechanisms that occurs at both surfaces of the sample as well as within its bulk. Electrons and holes can recombine at the surfaces of a silicon wafer, and the speed at which they do is called the surface recombination velocity (S). Thus, recombinations occur in the bulk as well as on both surfaces of the samples and the measured lifetime is in fact an effective lifetime (teff) which depends on the bulk lifetime (tb) and on the recombination velocity S of the surfaces (ts), as illustrated in Fig. 2. The effective lifetime value is given by Eq. (1):
1 1 1 ¼ þ teff tbulk tsurf
(1)
Set (S1)
Set (S2)
6290.3 301.2 204.1 131.2 100.1
6290.3 211.7 149.7 109.8 82.1
The defects at the surface of substrates are mainly produced by the interruption to the periodicity of the crystal lattice, which engenders dangling bonds at the semiconductor surface. The reduction of the number of dangling bonds, and hence the recombination, at the surfaces of the substrates, was achieved by growing the vanadium oxide thin film onto the front surface of the mc-Si substrates (set (S2)) which ties up the majority of these dangling bonds, even those existing in the grain boundaries (GBs). This reduction of dangling bonds is known as surface passivation, which leads to an important decrease of the surface recombination velocity (Seff). We can approximate that the majority of the recombination activities occur on the mc-Si surfaces, once we consider high values of the bulk lifetime (tbulk) [3,10]. Accordingly, we can neglect the first term of the right side in Eq. (2). As a result, we can deduce an upper limit of the effective surface recombination, using the Eq. (3):
1 1 2Seff ¼ þ teff tbulk W
Seff
W 2teff
(2)
(3)
where Seff is the effective surface recombination velocity and W is the wafer thickness. Seff is deduced from the effective minority carrier lifetime values of the samples, considering their intrinsic lifetime values. Accordingly, the calculated Seff values mark an upper limit to the effective surface recombination velocity. As shown in Table 1, we notice the effect the gettering (set (S1)) and the two-step process (set (S2)) that provide an excellent surface passivation. Regarding the original mc-Si wafer (reference), a
(
The gettering-induced improvement in the processed wafers was monitored by measuring teff vs. annealing temperatures (set (S1)). Fig. 3 reveals that the measured lifetime, made on sister wafers before and after gettering, increases whenever the annealing temperature increases and reach optimal value at 900 C. An apparent enhancement of teff has been obtained in all sets. Regarding the gettered mc-Si substrates of the first set (set (1)), the results showed a significant improvement of the effective minority carrier lifetime values, which attain 194.74 ms at a gettering temperature of 900 C and found to be the optimal value. In fact, the thermal treatment in set S(1) activates the migration of a large amount of impurities toward the PS structure, which was in turn removed using a chemical etching (HF 16%: HNO3 64%: CH3COOH 20%) solution. Further improvement of the effective minority carrier lifetime was obtained for samples coated with vanadium oxide antireflection layer, (set (S2)), in which the highest value of 237.53 m sec is reached at a post-deposition annealing of 900 C. These enhancements are due to an important decrease of the grain and GBs carrier recombination activities, achieved via the combined effect of the described two-step process (i.e gettering and surface passivation using vanadium oxide antireflection coating).
Reference 600 C 700 C 800 C 900 C
Effective surface recombination velocity Seff (cm s1)
Fig. 3. Measured effective minority carrier lifetime teff (msec) in sets (S1) and (S2), under low level injection Dn ¼ 1014 cm3.
Fig. 4. FTIR spectra of deposited vanadium oxide thin films after a post-deposition annealing at various temperatures (set (S2)).
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Fig. 5. Cross-sectional view (right-hand side) and plan-view SEM images (left-hand side) of the deposited vanadium oxide thin films (set (S2)), after a post-deposition annealing at (a) 600 C, (b) 700 C, (c) 800 C and (d) 900 C.
L. Derbali et al. / Renewable Energy 77 (2015) 331e337
high Seff value of 6290.3 cm s1 was obtained. Gettered mc-Si substrates exhibit an important decrease of the Seff, and attains its lowest value at 900 C. Further decrease of the effective surface recombination velocity was achieved after coating the front surface, of gettered mc-Si substrates at 900 C, with vanadium oxide thin film (set (S2)). The post-deposition annealing at 900 C led to the optimum results, highest minority carrier lifetime and lowest effective surface recombination velocity. These values of Seff indicate a high surface quality, probably due to the saturation of dangling bonds at the interface (i.e vanadium oxide/substrate). Highest substrates quality was obtained in the set (S2), which is in a good correlation with the achieved effective minority carrier lifetime values. It is obvious that deposited vanadium oxide antireflection layer has a crucial role on the passivation process. Taking into account the detrimental effect of grain boundaries (GBs) in mcSi substrates, we suggest a possible passivation of GBs that occurs after coating the front surface. It may be due either to a gettering of the fast diffusing metallic impurities present in the (GBs) via vanadium related trapping sites during the thermal annealing and/or to saturation of dangling bonds in grain boundaries by diffused vanadium atoms and the amount of oxygen at the interface mc-Si/ vanadium oxide. It is shown that the combined effect, gettering and passivation with vanadium oxide antireflection coating, has a positive trend of improvement in the electronic properties of mc-Si substrates. This enhancement is less pronounced when comparing with obtained results in the first set (S1) (i.e gettered substrates). Accordingly, we will limit our discussion to the study of the film morphology, reflectivity and the conversion efficiency. Our focus will be limited to the set (S2), in which optimum results was achieved. Fig. 4 shows FTIR spectra of the deposited films onto the front surface of substrates of set (S2). Observed peaks at 800 cm1 and 975 cm1 can be assigned to V2O5 vibrational modes [10,8] while the peak observed at 910 cm1 can be assigned to the vibration of V]O [11]. The characteristic vibrational bands at 470 cm1 and 760 cm1 are attributed to the VeOeV vibration [12,8,3]. We notice that the oxygen content in the films increases with the annealing temperature, which justify the increase of the peaks intensity. The observed peak assigned to the vibration of SieOeSi increases after annealing the coated substrates from 700 C to 900 C. The absorption peak at 1090 cm1 can be attributed to SieOeSi vibrations
Fig. 6. Total reflectivity spectra of coated substrates with vanadium oxide antireflection layer after a post-deposition annealing at 600 C, 700 C, 800 C and 900 C compared to a reference wafer.
335
[13e15,3]. We can conclude that, after the post-deposition annealing, the amount of oxygen has grown obviously. Fig. 5 presents a SEM top view of the prepared samples respectively treated at (a) 600 C, (b) 700 C, (c) 800 C, (d) 900 C. It is clearly shown the uniform growth of the nanoparticles of vanadium oxide and its dependence with the annealing temperature. Obtained structures were found to possess very good absorption characteristics to sunlight due to the high tendency of incident light to be scattered between the grains. The right-hand side of Fig. 5 shows the plan-view SEM images at a post-deposition annealing temperature of 600, 700, 800 and 900 C. According to SEM images, we reveal that most film structure is composed of nanostructures of vanadium oxide grains. The grain size decreases by increasing annealing temperature without considerable changes on the film thickness, which was found to be 1 mm. The role of temperature on the grain growth requires to be understood and more systematic study is needed. The right-hand side of Fig. 5 shows the cross-sectional SEM image, revealing the granular nanostructure of the films and a dense interface structure also can be observed, indicating strong interface bonding. The SEM micrographs clearly exhibits the nanostructure produced as a result of the thermal treatment that leads to an increased absorption of the incident light as a result of the multiple reflections. The SEM data demonstrated that when substrate temperature increases, the average grain size exhibits a decreasing trend. To investigate the optical property of the deposited vanadium oxide films, the antireflection efficiency of the deposited films has been investigated with a UVeVis spectrophotometer equipped with an integrating sphere accessory. We notice an important decrease of the surface reflectance, as indicated in Fig. 6. The reflectance decreases to 7% after a post-deposition annealing of 900 C for wavelengths around 300e650 nm. It is clearly shown from the SEM figures that the surface microstructure resulted in an increased absorption of the incident light was caused by multiple reflections. The measurement of the internal quantum efficiency (IQE) of the treated mc-Si substrates of set (S2) is shown in Fig. 7, compared to a reference wafer. IQE points out the efficiency and ability of incident photons to generate collectable carriers, without taking into account the transmitted or reflected photons. All annealing temperatures exhibit an increased blue response, in short wavelengths (400e700 nm). These improvements are related to the significant decrease of the recombination activities near the front
Fig. 7. Internal quantum efficiency (IQE) spectra of the coated multicrystalline silicon substrates (S2).
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Fig. 8. Current-voltage characteristics in dark condition of the treated wafers of set (S2).
surface and an improvement of the carrier collection at the emitter region, illustrating a good passivation effect especially at 900 C annealing temperature, what proves evidently the obtained effective surface recombination velocity. The obvious increase of the internal quantum efficiency (IQE) in the long wavelength range 700e1000 nm is due to bulk passivation, especially after annealing the coated substrates at 900 C. This improvement can be explained by the important reduction of the carrier recombination activities in the bulk of the treated wafers. Coating the front surface with vanadium oxide leads to an efficient surface and bulk passivation and indicates an extended effect deep into the bulk of the substrate, which we suggest to be considered especially at grain boundaries which are the main source of recombination activities in mc-Si substrates. In Fig. 8, the dark IeV characteristics of samples treated by twostep process (S2) are shown. It appears that the diode quality is improved by increasing the treatment temperature. In the reverse bias, the leakage current due to the escape of holes through deep recombination centers is more pronounced after a post-deposition annealing at 900 C. We notice a significant decrease of the reverse current and an increase of the direct one. This further implies an increase of the shunt resistance (Rsh) and a decrease of the series resistance (Rs), as indicated in Table 2. This effect indicates the enhancement of the electronic properties of the silicon material subjected to the above treatment. The quality of the emitter has an important effect, in which a high concentration of phosphorus at the surface can takes place and forms a “dead layer”, electrically inactive [16,17]. Vanadium oxide allowed the decrease of the “dead layer” depth via the surface (emitter) oxidation and an inevitable role of vanadium on the improvement of the emitter surface passivation. In order to evaluate the series resistance (Rs), we used the illuminated ðI VÞ characteristics measured under AM1.5 illumination, depicted in Fig. 9. First of all, the series resistance (Rs) was estimated from the following equation [18]:
Fig. 9. The illuminated current versus voltage (IeV) characteristics (Set (S2)).
Rs ¼
Vm 2Vm Voc Im Im þ ðIsc Im Þlnð1 ðIm =Isc ÞÞ
Afterward, from the dark (IeV) characteristics (Fig. 8) the values of the shunt resistance (Rsh) were evaluated as follows [19]; for ðV Rs IÞ < 0: the dark (IeV) characteristic can be approximated to a linear curve ðI ¼ ðRsh þ Rs ÞVÞ. It is worth to note that the decrease of the reverse current depends on the variation of Rsh. The improvement of the electrical properties is not due only to the gettering process prior the deposition of the antireflection layer, but it is due to the combined effect with the deposited vanadium oxide thin film, which reinforce the oxidation process, especially after the subsequent annealing of the coated substrates (S2), resulting to an efficient surface and (GBs) passivation. Fig. 9 shows the IeV characteristics of all cells (of set (S2)) measured under light illumination (100 mW/cm2). Four parameters of solar cells were used to define illuminated solar cells: the short-circuit current (Isc), the open-circuit voltage (Voc), the fill factor FF and the efficiency h. Table 3 shows the values of the extracted parameters. We may note that all parameters are improved. An increase of about 15 mA/cm2 in the short-circuit current density (Jsc) is observed, in comparison to the reference cell. The open-circuit voltage (Voc) was improved from 0.51 V to about 0.57 V. Table 3 provides the photovoltaic characteristics of the obtained cells and shows a significant improvement of the conversion efficiency of mc-Si solar cells, which attain 13.7 (surface area 3.6 cm2).
4. Conclusion In this study, we investigated the effect of two-step process, gettering then coating the front surface with vanadium oxide ARC. The combined effect results in an important improvement of the electronic quality of mc-Si substrates. The deposition of vanadium
Table 3 Cell parameters extracted from the IeV illuminated curves (Set (S2)). Table 2 Series and shunt resistances Rs and Rsh of the processed solar cells (set (S2)).
Rs (U) Rsh (U)
Reference
600 C
700 C
800 C
900 C
6.1 288
3.8 1371
2.4 1485
1.7 1703
1.3 1871
T ( C)
Jsc (mA/cm2)
Voc (mV)
FF
h
Reference 600 C 700 C 800 C 900 C
19 23 26 29 34
518 534 554 566 579
68 68.8 69 69.7 70
6 8.4 9.9 11.4 13.7
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oxide thin film, as an antireflection layer, onto the front surface of gettered mc-Si substrates at 900 C, which is the optimum temperature in the gettering process, enhances the passivation effect and provides a significant neutralization of Si dangling bonds. The effective minority carrier lifetime and the internal quantum efficiency have been improved noticeably. The conversion efficiency increased from 6% and reached 13.7% after the two-step process. Acknowledgements This work was supported by Ministry of High Education and Scientific Research of Tunisia. References [1] Choi Sung Jin, Yu Gwon Jong, Kang Gi Hwan, Lee Jeong Chul, Kim Donghwan, Song Hee-eun. The electrical properties and hydrogen passivation effect in mono crystalline silicon solar cell with various pre-deposition times in doping process. Renew Energy 2013;54:96e100. [2] Abdurakhmanov BM, Bilyalov RR. Hydrogen passivation of defects in polycrystalline silicon solar cells. Renew Energy 1995;6:303e5. [3] Derbali Lotfi, Ezzaouia Hatem. Phosphorus diffusion gettering process of multicrystalline silicon using a sacrificial porous silicon layer. Nanoscale Res Lett 2012;7:424. [4] Dhungel Suresh Kumar, Yoo Jinsu, Kim Kyunghae, Ghosh Somnath, Jung Sungwook, Yi Junsin. Study of electrical properties of oxidized porous silicon for back surface passivation of silicon solar cells. Renew Energy 2008;33:282e5. [5] Derbali L, Dimassi W, Ezzaouia H. Improvement of the minority carrier mobility in low-quality multicrystalline silicon using a porous silicon based gettering under an O2 atmosphere. Energy Procedia 2011;10:243e8.
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