p-Si MIS structure

Accepted Manuscript High temperature and voltage dependent electrical and dielectric properties of TiN/ Al2O3/p-Si MIS structure Slah Hlali, Abdelaali Farji, Neila Hizem, Liviu Militaru, Adel Kalboussi, Abdelkader Souifi PII:

S0925-8388(17)31364-6

DOI:

10.1016/j.jallcom.2017.04.165

Reference:

JALCOM 41569

To appear in:

Journal of Alloys and Compounds

Received Date: 26 January 2017 Revised Date:

19 March 2017

Accepted Date: 14 April 2017

Please cite this article as: S. Hlali, A. Farji, N. Hizem, L. Militaru, A. Kalboussi, A. Souifi, High temperature and voltage dependent electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure, Journal of Alloys and Compounds (2017), doi: 10.1016/j.jallcom.2017.04.165. This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.

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Manuscript Reference: Ms. Ref. No.: JALCOM-D-17-01222

Title: Electrical and dielectric properties of TiN/Al2O3/p-Si MIS

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device at high temperatures Note: The corrected sentences/words in the text are signaled by the yellow color.

Answers to Reviewer

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Reviewer #1: In this paper, the authors have investigated the temperature dependences of the electrical and dielectric properties of TiN/Al2O3/p-Si (MIS) structure using the C-V and

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G/-V measurements. Overall, this paper could be published in this journal with the following corrections:

1: Some of the format and writing mistakes:

The bottom line 7 on page 5, off →of; at the end of Page 10 formula and serial number was not on the same line; The bottom line 6 on page 11 starts →states; suggest that the MIS and MOS

Author’s Answer:

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in the full paper should be unified.

You are quite right, All remarks of the review are corrected and I make all the changes

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requested (please see the manuscript).

2: The analysis of fig 10(b)in the page 14, It shows the contradiction between e" increases

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with increasing temperature in the line 1, and e" decreases with increasing temperature in the line 9.

Author’s Answer:

Yes, you are right there is a contradiction between the two lines (lines 1 and 9). I do not pay attention, it's just a fault of writing. The correct analysis is “ e" increases with increasing temperature in the line 1” and this confirmed by our experimental measurements also is similar to that found in Ref. [56]. [56] ARSLAN, Engin, ŞAFAK, Yasemin, TAŞÇIOĞLU, İlke, et al. Frequency and temperature dependence of the dielectric and AC electrical conductivity in (Ni/Au)/AlGaN/AlN/GaN heterostructures. Microelectronic Engineering, 2010, vol. 87, no 10, p. 1997-2001. 1

ACCEPTED MANUSCRIPT 3: The analysis of experimental data in the article is similar with references 26, expression and sentence patterns are also the same. Author’s Answer: We thank you for your attention and for your very special remarks. It is true that there is a

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relatively noticed similarity between our work and the work in the ref 26. But this does not prevent that, our paper is original and presents additional studies and improved properties of a new MIS structure. However, we took your interesting note into account and revised the

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entire paper.

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Manuscript with correction High Temperature and voltage dependent electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure at high temperatures

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Electrical and dielectric properties of TiN/Al2O3/p-Si MIS device Slah Hlali*(1), Abdelaali Farji(1), Neila Hizem(1), Liviu Militaru(2), Adel 1

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Kalboussi(1) and Abdelkader Souifi(2)

Laboratoire de Microélectronique et Instrumentation (LR13ES12), Faculté des Sciences de 2

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Monastir, Avenue de l’environnement, Université de Monastir, 5019 Monastir, Tunisie Institut des Nanotechnologies de Lyon - site INSA de Lyon, UMR CNRS 5270, Bât. Blaise Pascal, 7 avenue Jean Capelle, 69621 Villeurbanne Cedex, France *Corresponding author: [email protected]

Abstract

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The electrical and dielectric properties of TiN/Al2O3/p-Si (MIS) structure were studied in the temperature range of 380-450 K at 1MHz. These properties were calculated from experimental C − V and G / ω − V measurements. Experimental results show that the forward bias C − V plots exhibit a distinct peak at high temperatures, this Kind of behavior is mostly

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attributed to the series resistance (Rs ) and interface states ( N ss ) between Al2O3/p-Si. The temperature and bias voltage dependence of dielectric constant (ε ') , dielectric loss (ε ") ,

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dielectric loss tangent (tan δ ) and the ac electrical conductivity (σ ac ) are studied for TiN/Al2O3/p-Si (MIS) structure. Experimental results show that the values of ε ' and ε " decrease with increasing depend on the variation of both bias voltage and temperature. The C − V and G / ω − V characteristics prove that the R s and N ss of the diode are important

parameters that strongly influence the electric parameters in MIS device. The density of N ss , depending on the temperature, was determined from the C − V and G / ω − V data using the Hill-Coleman Method. The Arrhenius plot of the ac conductivity at 1 MHz is illustrated and the activation energy is found to be Ea = 0.012eV . Moreover, the electric modulus formalisms were employed to understand the relaxation mechanism of the TiN/Al2O3/p-Si structure. 3

ACCEPTED MANUSCRIPT Keywords: Temperature Dependence, Voltage Dependence, Interface States, Series Resistance, MOS structure, Electrical and dielectric properties, Conductivity.

1. Introduction The Metal-Insulator-Semiconductor (MIS) structures consist of a semiconductor substrate covered by an oxide layer (between 5 and 500 nm thick) on which a metal electrode gate is

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deposited. MIS structures have a considerable attention over the last years due to their wide range of applications in various micro and opto-electronic devices, as the light-emitting diode (LED) [6, 7], switching, gas sensors [3], and in solar cells [1, 2, 4, 5]. The creation of an insulator layer between the metal and semiconductor interface having great importance to the

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performance and reliability of these devices [8-10]. Therefore, there has been a growing interest in the study of the electrical properties of metal oxides, particularly high dielectric

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constant (high-k) gate dielectric materials such as Al2O3, HfO2, ZrO2 and TiO2, for their potential as substitute gate dielectrics to replace SiO2. Indeed, high-k materials offer higher capacitance and reduce leakage current [11-15]. Among them, Al2O3 is the most stable and robust oxide, It has been widely studied for many applications especially in opto and microelectronics. Al2O3 has shown some interesting properties like dielectric permittivity ( ≈ 9), large band gap (9 eV) [16], large band offset with Si which is essential in maintaining low

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leakage currents through devices, kinetic stability, thermodynamic stability on Si up to high temperatures, good interface with silicon, low bulk defect density and is amorphous under the conditions of interest [18].

It is clear by [17] that the combination TiN/Al2O3 is a promising and especially reliable

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candidate thanks to its chemical compatibility and thermal stability; in addition to that it has good adhesion properties on various substrates and low interface trap densities in

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TiN/Al2O3/p-Si devices.

A range of parameters such as the insulator layer effect, interface states ( N ss ) and series resistance (Rs ) include a great influence on the electrical characteristics of MIS devices [19]. The diode characteristics are modified by the existence of an interface layer between the metal top contact and semiconductor, generally increasing the barrier height of the structure. The peak value of the capacitance and its position depend on N ss and R s off of the device. The capacitance–voltage C − V and conductance–voltage G / ω − V characteristics of various metal–semiconductors (MS) or MIS diodes were investigated considering these effects by [19-25].

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ACCEPTED MANUSCRIPT The study of the C − V and G / ω − V characteristics just at room temperature and in the narrow applied bias voltage range of the diode with an interfacial layer does not give complete information about the conduction process and the nature of barrier formed at Metal/ Semiconductor (M/S) interface. Despite efforts, there is no work considering the temperature dependence of electrical, dielectric and electric modulus properties of this diode

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(TiN/Al2O3/p-Si) in the wide range of temperature and applied bias voltage. Therefore, in this work, using the C–V and G / ω − V measurements, we have investigated the temperature dependences of the electrical and dielectric properties of TiN/Al2O3/p-Si (MIS) structure. In addition, we investigated the effects of interface state density ( N ss ) and series

( Rs )

on the C–V and G / ω − V characteristics. The C–V and G / ω − V

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resistance

measurement carried out in the temperature range of 380–450 K at fixed frequency 1 MHz.

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Furthermore, the capacitance–temperature C − T and conductance–temperature G / ω − T measurements were studied for the dielectric and electric modulus properties at both 1 MHz and -1.5V over the temperature range of 380-450 K.

2. Experimental procedure

The TiN/Al2O3/p-Si MIS structure used in this study was fabricated in the Sherbrook University. It’s fabricated on <100> p-type substrate with carrier concentration of about 1016

in Fig. 1.

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cm-3. The schematic representation of the elaborated structure discussed in this paper is shown Capacitance-voltage C − V and conductance-voltage G / ω − V characteristics of TiN/Al2O3/pSi MOS device were measured in the temperature range of 380-450 K with a 10 mV ac signal

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level and 1 mV step voltage. The C − V and G / ω − V measurements were performed at 1MHz by using HP model 4280A 1MHz C Meter/C-V Plotter. As well, the C − T and

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G / ω − T measurements were studied for the dielectric and electric modulus properties. All

measurements were carried out in the temperature range of 380-450 K using a cryogenic station (cryostat and vacuum pump) turns with liquid azote, which enables us to make measurements in the temperature range of 77-800 K. The setup used for the electrical characterizations C − V and G / ω − V is shown in Fig. 2.

3. Results and discussion 3.1. Electrical properties

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ACCEPTED MANUSCRIPT In Fig. 3, we show the capacitance-voltage C − V measurements carried out in the temperature range of 380 K- 450 K at 1 MHz and the upper inset in Fig. 3 shows the C − T measurements carried out at fixed frequencies 1MHz and at -1.5 V. From Fig. 3, it is seen that the C − V curves are stretched along the total voltage axis principally in accumulation and depletion regimes. This considerable voltage-axis shift due to

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the presence of oxide charges. The observation of an apparent shift of the C − V curves along the axis of the total voltage in Fig. 3 may be due to the presence of oxide charges[26], Due also to the presence of the interfacial oxide layer, interface states and series resistance. which causes changes This means a marked change in the electrical characteristics of MOS

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structures and they do not obey the ideal C − V curves [27].

In each temperature, the values of capacitance give a peak in the accumulation regime, this peak shifting to positive bias region with increasing temperature. The existence of the

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capacitance peak in C − V the plot is shown by some experimental results on MOS diodes These results appear to be comparable to previously reported curves for similar MOS diodes [28-31]. This kind of behavior is mostly attributed to the series resistance and interface states between insulator layer and semiconductor. The series resistance and interface states between insulator layer and semiconductor lead to the observations behavior. In fact, the series

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resistance is a significant parameter, which causes changes in the electrical characteristics of MOS structures and the interface states generally leads to a bias shift of the capacitance– voltage C − V (Fig. 3) and conductance–voltage G / ω − V (Fig. 4) curves [27]. The temperature dispersion of the C − V characteristics seen in the accumulation and

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depletion region, as exposed in Fig. 3, is due to the formation of an inhomogeneous layer at the insulator/semiconductor interface.

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The insulator/semiconductor interface is particularly characterized by the formation of an inhomogeneous layer. In our work, we can state the existence of this phenomenon by the temperature dispersion of the C − V characteristics, as exposed in Fig. 3. The capacitance–voltage characteristics were found to be stretched along the voltage axis indicating the presence of both acceptor and donor like interface traps occupying a portion of the semiconductor band-gap [32-34]. The stretched of capacitance–voltage characteristics along the voltage axis indicate the presence of both acceptor and donor like interface traps [32-35]. While, the temperature changes in capacitance especially in the accumulation and depletion region is attributed to the

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ACCEPTED MANUSCRIPT leaky behavior of the Al2O3 thin film. because inhomogeneous layer acts in series capacitance with insulator capacitance. By increasing temperature, a decreasing in the accumulation capacitance is observed, thus decreasing relied extensively on the temperature and not of the conventional MIS capacitors. In accumulation, depletion and inversion regions, the temperature change of the C − V capacitive part of the temperature dependent interface traps [35].

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characteristics is attributed to a series combination of the depletion layer capacitance and the

Another interesting point is that At high frequency, the total diode capacitance, at high frequency, is affected not just by the depletion capacitance, nevertheless, also the bulk

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resistance which is frequency-dependent and associated with electron emission from slowly responding deep impurity levels.

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The temperature dependence of G / ω − V characteristics of the TiN/Al2O3/p-Si diodes is plotted In Fig. 4 and the inset in Fig. 4 shows the G / ω − T measurements carried out at a fixed frequency (1MHz) and at -1.5 V.

As shown in Fig. 4, At a temperature of 380 K and above, the conductance in the depletion region tends to be more stretched out demonstrating more interface states with a different temperature response. However, in the accumulation and inversion regime, insignificant

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change conductance observed at high frequency (1MHz), showing the thermal stability of the future TiN/Al2O3/p-Si diodes [64]. the negligible variation of the conductance curves at high frequency (1MHz) in the both accumulation and inversion regimes reflects the high thermal stability of TiN/Al2O3/p-Si diodes [64].

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As can be seen from Fig. 3 and Fig. 4, both curves have three distinct regimes of accumulation-depletion-inversion. The values of measured C − V and G / ω − V decrease in

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depletion regions with decreasing temperature due to localized Nss at Al2O3/Si interface. Such behavior of the capacitance and conductance is attributed to a particular distribution of interface states at Al2O3/p-Si interfaces and Rs of structure [43]. The existence of interface states is demonstrated also by the hysteresis phenomenon which is very clear in C − V and G / ω − V characteristics, especially in the depletion region, as shown in Fig. 5. This hysteresis noted to be indicative of slow trapping centers in the oxide and at the oxide/semiconductor interface [36-38]. Moreover, this phenomenon suggests that slow charging/de-charging of traps in the Al2O3 film or at the Al2O3/p-Si interface could be

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ACCEPTED MANUSCRIPT occurring. Furthermore, from the low hysteresis seen in C − V sweeps at high-temperature Al2O3 MIS capacitors fabricated on Si, we can suspect that this could be related to optimized film growth and/or proper surface grounding before oxide growth. −2 In Fig. 6 we carried out the reverse bias C − V characteristics of the TiN/Al2O3/p-Si MOS

device at various temperatures (380-450 K) and at 1MHz.

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−2 The C − V curves are linear in a wide reverse bias range, indicating that the interface states

and inversion layer charge cannot follow the ac signal in the depletion region, especially in the strong inversion and accumulation region.

The built-in voltage or diffusion potential, Vd , is determined by the extrapolation of C-2 curve

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−2 with the voltage axis. The extrapolation of C − V curves with the voltage axis determines the

value of diffusion potential ( Vd ). More than that, the slope of this line carries information

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about the doping levels on either side of the structure. Obviously,, also, this slope and −2 intercept voltage of the C − V curves are directly influenced by is a function of the interface

insulator layer and the density of interface states. For ideal rectifying contacts the reverse bias

C−2 − V should be a linear plot.

The relation between capacitance and applied bias voltage for the diodes can be expressed as

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[25, 26].

(1)

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2(Vd + V ) 1 = 2 C qε 0ε s A2 N A

Where ε S the dielectric constant of semiconductor (Si) is, ε 0 is the permittivity of free space

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equal to 8.854x10-12, q is the electronic charge, A is the area of the diode and Vd is the diffusion potential at zero bias, which is determined from the extrapolation of the linear

C−2 − V plot to the V-axis.

The Vd is the barrier seen by holes in the valance band of p-type semiconductor trying to move into the metal, is given by the following equation: Vd = V0 +

KT q

(2)

Such as V0 is the intercept of C-2 with the voltage axis.

N A is the carrier concentration obtained from the slope of the C−2 − V plot which is given by deriving the equation (1). 8

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(

)

(3)

d 1/ C 2 2 = dV qε s N A A 2

(

)

    

(4)

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 2  1 NA =  qε s A2  d 1 / C 2  dV

The value of the barrier height φb ( C − V ) can be determined by the following relation. KT + E F − ∆φb = Vd + E F − ∆φb q

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φb = V0 +

(5)

Where ∆φb is the image force barrier lowering and given by [33],

qEm

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∆φb =

(6)

4πε s ε 0

And E m is the maximum electric field given by

Em =

2qN AVD

ε sε 0

(7)

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While E F being the energy difference between the bulk Fermi level and conduction band edge, were obtained according to,

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EF =

KT  NV   ln q  N A 

(8)

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With NV is the effective density of states of holes in the valence band is obtained

from:

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 2πmh* KT  2 NV = 2   2  h 

(9)

m h* = 0 .16 m0 is the effective mass of holes and m 0 = 9 .1 × 10 −31 Kg is the rest mass of the

electron.

In Table 1 we present the values of VD , N A , E F , ∆φb and φb for TiN/Al2O3/p-Si diodes determined from C − V and G / ω − V measurements at various different temperatures ranging from 380 to 450 K. In Fig. 7 we present the variation of the barrier height φb values with temperature calculated from Eq. (5). From this figure, the values of φb found to change with the temperature as: 9

ACCEPTED MANUSCRIPT φb = φb (T = 0 ) + β T

(10)

Heir Here φb (T = 0 ) is the barrier height at absolute zero temperature found to be 3.040 eV and β is the temperature coefficient of the barrier height equal to -58x10-4 eV/K. This value of temperature coefficient of the barrier height was a little lower agreement with the temperature coefficient of Si band-gap (-4.73x10-4 eV/K) found by [33, 39] or

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(-6.44x10-4ev/K) found by [27].

Additionally, various a mixture of methods have been suggested which help to extract the series resistance Rs of the diodes., and Between them, the most important one and used in this work is the conductance method, developed by Nicollian and Brews [40-43]. By this method,

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the series resistance of MOS devices can be abstract from the measured capacitance (Cm ) and conductance (Gm ) in strong accumulation region at high frequency (1 MHz) [26, 27]. More

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than voltage dependence, we can obtain temperature dependence of the series resistance from the measurements of C − V and G / ω − V characteristics. At high frequency, to find out series resistance Rs , the MOS devices should be biased into strong accumulation and in that case the admittance Ym = 1 / Z m is specified as [26, 27, 43]:

Ym = Gm + jωCm

(11)

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 1 Series resistance is the real part of the impedance  Z m =  so: Ym   Gm 2 G + (ωCm )

[

2 m

]

(12)

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Rs =

With G m and C m represent the measured conductance and capacitance in a strong

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accumulation region. We can identify the capacitance of the insulator layer Cox by substituting Rs into the following equation

Cm =

Cox 1 + ω 2 Rs2Cox2

(

)

(13)

From this equation (13), Cox is given by

  G 2  ε ε A Cox = Cm 1 +  m   = ox 0 d ox   ωCm  

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(14)

ACCEPTED MANUSCRIPT Where ε ox is the permittivity of the interfacial insulator layer, ε 0 is the permittivity of free space and d ox is the insulating layer thickness. From the equation (14), the insulator layer thickness calculated for our MIS structure was found to be 17 nm . Using equation (12) the values of Rs is calculated as a function of bias in the temperature range from 380 to 450 K and shown in Fig. 8.

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From Fig. 8, it is clear that the series resistance depends on the changes in both temperature and voltage. The Rs increase with increasing temperature and gives a peak. This peak position of Rs is shifting toward inversion region with increasing temperature. Such behavior of Rs is

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attributed to the particular distribution of localized N ss at Al2O3/p-Si interface states and interfacial insulator layer at TiN/p-Si interface. This behavior was also observed also in different similar structures like Al/HfO2/p-Si (MOS) [26, 43], Au/SiO2/p-Si (MIS) [25],

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Al/SiO2/p-Si [27], Al/Si3N4/p-Si MIS diodes [44] and Au/SiO2/n-Si (MIS) [45]. The series resistance gives a peak in the voltage range of -0.2 V to 0.6 V in the depletion region depending on temperature, shifting towards positive bias. In the depletion region depending on temperature, from -0.2 V to 0.6 V, the series resistance presents a peak shifting towards positive bias. Nevertheless, the series resistance in the depletion region tends to be

response.

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more stretched out causing from the interface starts states with a different temperature

In addition, at 380 K and above, the series resistance appears to be constant in the accumulation region at high frequency,. This proves showing the thermal stability of the

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TiN/Al2O3/p-Si (MIS) structure. In the depletion region, the values of Rs increase while in the accumulation region Rs have remained almost constant since 1700 Ω at 380 K to 2200 Ω

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at 450 K.

Furthermore, according to the Hille-Coleman [46] and after that Konofaos [47] and Dakhel [48] the density of interface states is given by:

  2  (G / ω )max N ss =   2 2  qA  ((G / ω )max / Cox ) + (1 − (Cm / Cox )) 

(15)

Where, ω is the angular frequency, A is the area of the diode, C m and (Gm / ω )max are the measured capacitance and conductance which correspond to peak values, respectively, and Cox is the capacitance of insulator layer. The density of interface Nss can easily follow the ac

signal and yield an excess capacitance at low frequencies. If the C − V or G / ω − V

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ACCEPTED MANUSCRIPT measurements are carried out at a sufficiently high frequency like our case (1MHz), the contribution of interface state capacitance to the total capacitance may be neglected because it can hardly follow the ac signal. Fig. 9 present the variation of the interface states as a function of temperatures at 1MHz. As seen in Fig. 9 The values of Nss diminishing with growing temperature from 1.28x1012 at

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380K to 1.21x1012 at 450K, As seen in Fig. 9. This phenomenon is probably attributed to the molecular reorganization and the reordering of the oxide-semiconductor interface under the temperature influence, which leading to the occurrence of the more ordered interfacial layer then lowering the value of Nss [26].

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3.2. Dielectric properties and ac electrical conductivity

Both temperature and voltage dependence of dielectric constant (ε ') , dielectric loss (ε ") , loss

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factor (tan δ ) , ac electrical conductivity (σ ac ) and real and imaginary part of complex electric modulus (M * = M '+ jM ") are studied for TiN/Al2O3/p-Si MIS structure at high frequency 1MHz.

The complex permittivity formalism has been employed to describe the electrical and dielectric properties, and it can be defined by the following complex equation [29-49].

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ε * = ε '− jε "

(16)

Heir Where, ε ' and ε " are the real and the imaginary parts of complex permittivity, and j is the imaginary root of -1.

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The real part of the permittivity, ε ' , identifies the strength of alignment of dipoles in the dielectric, is a measure of the energy stored from the applied electric field in the material and

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identifies the strength of alignment of dipoles in the dielectric. and the imaginary part of the permittivity, ε " , is the energy dissipated in the dielectric, which is associated with the frictional dampening that prevents the displacement of bound charge from keeping in phase with the field change [50].

In the case of admittance measurements, the ε * formalism given by the following relation:

ε* =

Y* C G = −j jωC0 C0 ωC0

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(17)

ACCEPTED MANUSCRIPT Where C , G and Y * are the measured capacitance, conductance and admittance values, respectively, ω the angular frequency (ω = 2πf ) and C0 is the capacitance of an empty capacitor and expressed as:

ε0 A

(18)

dox

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C0 =

With d ox is the interfacial insulator layer thickness, A is the surface area of the sample and ε 0 is the permittivity of free space.

The dielectric constant ε ' (real part of the complex permittivity) at the various temperatures relation [51, 52]:

Cm C0

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ε '=

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was determined using the measured capacitance values at a bias voltage of -1.5 V from the

(19)

On the other side, the dielectric loss ε " (imaginary part of the complex permittivity), is calculated using the measured conductance values from the relation:

ε"=

Gm ωC0

(20)

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As well, the loss factor tangent or dissipation factor (tan δ ) is given by the ratio of the imaginary ε " and the real ε ' parts of the dielectric constant.

ε" ε'

(21)

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tan δ =

The variations of the ε ' , ε " and tan δ versus temperature and voltage at high frequency are

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shown in Fig. 10(a-c), respectively.

The change of the ε '− T , ε " − T and tan δ − T at high frequency (1MHz) are shown in Fig. 10 (a-c), respectively, in the temperature range of 380-450 K. From these figures, the dielectric constant ε ' decreases with increasing temperature. Whereas, both ε " and tan δ increases with increasing temperature. This behavior is similar to that found in Ref. [26, 56]. When the temperature increases, there's the creation of defect/disorders in the lattice leads to decreases of the mobility of the majority charge carriers (ions and electrons). At high frequency the interfacial dipoles have less time to orient themselves in the direction of the alternating field [57, 58].

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ACCEPTED MANUSCRIPT The upper inset in Fig. 10(a-c) shows the ε '−V , ε "−V and tan δ − V of the MIS capacitor at different temperature. As seen in the upper inset in Fig. 10 (a) and (b), the values of ε ' and ε " decrease with increasing both bias voltage and temperature. The temperature decreases shown especially in the accumulation region for ε ' , in the depletion region for ε " and there is almost constant in the inversion region due to the particular distribution of charges and their

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restructuring and reordering at interface states under temperature. Such variation was attributed to the variation in the capacitance and conductance values [53-55]. Additionally, the dielectric constant of the capacitor is mostly proportional to the number of dipoles so the decreasing of dielectric constant followed by decrease of dipoles. This reduction of the

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number of dipoles can be explained by the recombination of charge carriers, which neutralize some dipoles, locate within the material. Through a temperature progression, excited charge carriers can migrate into some defects in the forbidden band.

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In the inset in Fig. 10 (c), we present loss tangent (tan δ ) curves which give a peak at each temperature at about -0.5 V. The peak position shifts towards the forward bias voltage region and increase with increasing temperature. This behavior is probably due to the particular distribution of charges and their restructuring and reordering at interface states under the temperature effect. As well, it is clear that the values of tan δ increases with increasing

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temperature in all regions (accumulation + depletion + inversion). This augment in tan δ is provoked by reductions in the both conduction of residual and absorption current [55]. These results imply that during and after the sample processing, the distribution density of the interface state profile is not inherent but a sequence of formation of states at the interface.

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The complex conductivity (σ *) can be expressed by the following equation,

σ * = jε 0ωε * = jε 0ω (ε '− jε ") = ε 0ωε "+ jε 0ωε '

(22)

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The ac electrical conductivity (σ ac ) is the real part of (σ *) and is calculated from the dielectric loss values according to the relation:

σ ac = ωC tan δ (d / A) = ε 0ωε "

(23)

Fig. 11 (a) illustrates the temperature dependence of the ac electrical conductivity of TiN/Al2O3/p-Si diode are investigated, measured at 1 MHz. The (σ ac ) shows an increasing trend (from 3.4x10-6 to 3.7x10-6 is almost constant) with increasing temperature. Similar behavior was observed in the literature [26, 29, 59, 60]. This behavior may be confirming the thermal stability of the TiN/Al2O3/p-Si diodes and suggesting that the process of dielectric polarization on MIS device takes place through a mechanism similar to the conduction 14

ACCEPTED MANUSCRIPT process [26, 57]. At high frequency this behavior can be attributed to a gradual decrease in series resistance. The ac conductivity σ ac − V plots of the capacitor at different temperatures were obtained by using Eq. (23) and are given in the inset in Fig. 11(a). The σ ac is dependent on the temperature and applied bias voltage. It is clear from the inset that the values of σ ac increase with the

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increasing temperature and decrease with increasing bias voltage in the accumulation and depletion regions and are constant in the inversion region. This decrease in ac conductivity with bias voltage probably attributed to the charge created because of the breaking of lattice bounds.

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At high temperature, the increases in the electrical conductivity are attributed to the impurities or dislocations exist at the metal-semiconductor interface. [57, 60]. A linear relationship

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between the total conductivity and the inverse absolute temperature could be written as [27, 60]:

 Ea    KT 

σ = σ 0 exp −

(24)

Where σ 0 is the composite constant or the preexponential factor, K is the Boltzmann

Kelvin.

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constant, Ea is the activation energy of the conduction mechanism and T is the temperature in

As shown in Fig. 11(b), the Arrhenius plot of the ac conductivity at 1 MHz is illustrated. The

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activation energy is found to be Ea = 0.012eV from the slope of Ln(σ ac ) vs. q/ KT . At high temperature, the value of the activation energy for our sample value found to be in the

[27].

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middle of the work of Yücedağ (Ea = 0.008eV ) [60] and that of Tataroglu (Ea = 0.026 eV )

This small activation energy value demonstrates that the bulk-trap level raised between the valence and conduction band. Also, at high temperature, this low value of the activation energy suggests that the conduction mechanism may be due to the hopping of electrons. Many authors are interested and discuss the complex impedance (Z *) as well as the complex electric modulus (M *) formalism [21, 58]. To separate the bulk and the surface phenomena and to determine the bulk dc conductivity of the material is necessary to analysis the complex permittivity (ε *) data with the (Z *) formalism (Z * = 1 / Y * = 1 / jωC 0ε *) [57]. 15

ACCEPTED MANUSCRIPT From the physical point of view, the electrical modulus corresponds to the relaxation of the electric field in the material when the electric displacement remains constant. For that reason, the modulus represents the real dielectric relaxation process. The complex impedance or the complex permittivity (ε * = 1/ M *) data were transformed into the M * formalism using the following relation [21, 58, 61, 62].

M '=

Where

1 1 ε '+ jε " = = = M '+ jM " ε * ε '− jε " (ε '− jε ")(ε '+ jε ")

(25)

ε' ε" and M "= 2 2 ε ' +ε " ε ' +ε "2

(26)

2

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M * = jωC0 Z * =

With M ' and M " are the real and the imaginary parts of complex modulus, respectively, are

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calculated from ε ' and ε " data for each temperature as shown in Fig. 12(a) and (b), respectively.

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Fig. 12(a) and (b) represent the real part of M ' and the imaginary part of M " of the electric modulus M * versus temperature at -1.5 V for TiN/Al2O3/p-Si MIS diode. As we can see in Fig 12(a) and (b), M ′ and M ′′ decrease with increasing temperature. Similar results have been reported in the literature [26, 27, 60].

The variation of such modulus spectra confirms the existence of hopping mechanism and surface charge polarization in the electrical conduction of the materials [63].

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As shown in Fig. 12(b), the slightly decreases of M " with increasing temperature demonstrate an increase in the energy of charge carrier leading to increased relaxation times [26].

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4. Conclusions

In this study, the forward and reverse bias C − V and G / ω − V characteristics TiN/Al2O3/p-Si

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(MIS) devices were measured in the temperature range of 380-450 K at 1MHz. Experimental results show that the forward bias C − V plots exhibit a distinct peak at high temperatures, this kind of behavior is mostly attributed to the series resistance (Rs ) and interface states

(N ss )

between Al2O3/p-Si. The capacitance in accumulation region is observed to have

significantly different dependence on the temperature than that of the conventional metaloxide- Si capacitors since it decreases with increasing temperature. In contrary, the capacitance values in the depletion region increase with increases in temperature. This phenomenon is attributed to a series combination of the depletion layer capacitance and the capacitance dependent interface traps due to the temperature effect.

16

ACCEPTED MANUSCRIPT From 380 K and above, in the depletion region, the conductance tends to be more stretched out demonstrating more interface states with a different temperature response. On the other hand, small change in the accumulation and inversion region conductance at high frequency (1MHz) proving the thermal stability of the future TiN/Al2O3/p-Si (MIS) diode. The existence of interface states demonstrating by experimental hysteresis phenomenon in C-

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V and G-w characteristics especially in the depletion region. It is clear that the series resistance depends on the changes in both temperature and bias voltage gives a peak shifting towards positive bias. We have remark also, that the values of Nss decreases with increases temperature from 1.28x1012 at 380K to 1.21x1012 at 450K, this decreasing in Nss probably

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attributed to the molecular reorganization and the reordering of the oxide-semiconductor interface under temperature effect.

In addition, in this study, we can conclude that the values of the real part of dielectric constant dielectric loss (ε ") , loss tangent (tan δ ) and the ac conductivity (σ ac ) of TiN/Al2O3/p-Si

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(ε ') ,

(MIS) structure strongly depends on the temperature and bias voltage. We note that both ε " and tan δ increases, whereas the dielectric constant ε ' decreases with increasing temperature. These results confirm the creation of defect/disorders in the lattice leads to decreases of the mobility of the majority charge carriers (ions and electrons) and at high frequency the

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interfacial dipoles have less time to orient themselves in the direction of the alternating field. The performance of dielectric properties, especially depends on temperature, interfacial oxide layer, the density of space charges, and bias voltage. Also, the ε '−V , ε "−V and tan δ − V of the MIS capacitor at different temperature are

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investigated. The values of ε ' and ε " decrease with increasing both bias voltage and temperature. Such variation was attributed to the variation in the capacitance and conductance

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values. Loss tangent (tan δ ) curves give a peak at each temperature at about -0.5 V, This peak position shifts towards the forward bias voltage region and increase with increasing temperature. This behavior is probably due to the particular distribution of charges and their restructuring and reordering at interface states under the temperature effect. At high temperature, the increases in the electrical conductivity (σ ac ) are attributed to the impurities or dislocations exist at the metal-semiconductor interface. Thus, the Arrhenius plot of the ac conductivity at 1 MHz is illustrated and the activation energy is found to be Ea = 0.012eV from the slope of Ln(σ ac ) vs. q/ KT . This small activation energy value demonstrates that the bulk-trap level raised between the valence and conduction band. Also, at high temperature 17

ACCEPTED MANUSCRIPT this low value of the activation energy suggest that the conduction mechanism may be due to the hopping of electrons. The real part of M ' and the imaginary part of M " of the electric modulus M * versus temperature at -1.5 V for TiN/Al2O3/p-Si MIS diode decrease with increasing temperature demonstrate an increase in the energy of charge carrier leading to increased relaxation times.

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The Al2O3 MIS (p) temperature sensor can be compatible with CMOS processing. It shows promising potential for low power devices and cost. It is useful production for future semiconductor industry.

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Compliance with ethical standards

Conflict of interest The authors (Slah Hlali, Abdelaali Fargi, Neila Hizem, Liviu Militaru,

References

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Adel Kalboussi and Abdelkader Souifi) declare that they have no conflict of interest.

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dielectric behavior of barium zirconate titanate nanocrystalline powder obtained by mechanochemical synthesis. Journal of Materials Science: Materials in Electronics, 2013, vol. 24, no 10, p. 4033-4042. [64] LIN, Chien-Chih et HWU, Jenn-Gwo. Performance enhancement of metal-oxide-semiconductor

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tunneling temperature sensors with nanoscale oxides by employing ultrathin Al 2 O 3 high-k

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dielectrics. Nanoscale, 2013, vol. 5, no 17, p. 8090-8097.

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Table caption

Table 1: Temperature dependent values of various parameters determined from C − V

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measurements of TiN/Al2O3/p-Si MIS structure

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Figure captions

Fig. 1. A schematic representation of the elaborated structure TiN/Al2O3/p-Si

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Fig. 2. Setup diagram of the electrical measurements using an HP model 4280A 1MHz C Meter/C-V Plotter for C − V and G / ω − V .

Fig. 3. Temperature dependent plot of the C − V characteristics of the TiN/Al2O3/p-Si (MIS) device.

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Fig. 4. The temperature dependent plot of G / ω − V characteristics of the TiN/Al2O3/p-Si MOS device.

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Fig. 5. High-frequency C − V (a) and G / ω − V (b) hysteresis obtained by sweeping gate voltage forth and back between -3 and 2 V.

Fig. 6. The C −2 − V plots of MIS structure at a range of temperatures 380-450 K at a frequency of 1 MHz.

Fig. 7. Barrier height φb versus temperature plot for the TiN/Al2O3/p-Si (MIS) structure.

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Fig. 8: The variation of the series resistance of the TiN/Al2O3/p-Si (MIS) structure as a function of the bias voltage for different temperatures. Fig. 9. The variation of the interface states as a function of temperatures at 1MHz. Fig. 10. Temperature dependence of (a) the dielectric constant ε ' , (b) the dielectric loss ε " and

dependence.

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(c) the loss factor tan δ at high frequency for TiN/Al2O3/p-Si MIS device. Inset: Voltage

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Fig. 11. Temperature dependence of ac electrical conductivity (σ ac ) at high frequency (a). Inset: variation of the ac electrical conductivity (σ ac ) with applied voltage at different temperature. (b) Ln (σ ac ) vs. q / KT for TiN/Al2O3/p-Si at -1.5 V. Fig. 12. Temperature dependence of (a) real part (M’) and (b) imaginary part (M″) of the complex modulus for TiN/Al2O3/p-Si at -1.5 V.

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Table 1

2.15 3.59 3.71 4.14 4.31 4.36 5.01 5.52

EF (eV )

)

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0.832 0.803 0.784 0.715 0.676 0.617 0.537 0.418

(

N A × 1018 cm −3

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380 390 400 410 420 430 440 450

VD (eV )

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T (K)

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0.049 0.034 0.035 0.034 0.034 0.036 0.033 0.031

∆ φb (eV )

φb (eV )

0.095 0.107 0.108 0.109 0.108 0.106 0.106 0.102

0.786 0.730 0.711 0.640 0.602 0.547 0.464 0.347

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380 K

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C (pF)

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1 MHz

C (pF)

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450 K

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380 K 390 K 400 K 410 K 420 K 430 K 440 K 450 K

10

0

370

-3

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V (V)

Figure 3

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216 214 212

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Final Manuscript High Temperature and voltage dependent electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure Slah Hlali*(1), Abdelaali Farji(1), Neila Hizem(1), Liviu Militaru(2), Adel 1

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Kalboussi(1) and Abdelkader Souifi(2)

Laboratoire de Microélectronique et Instrumentation (LR13ES12), Faculté des Sciences de Monastir, Avenue de l’environnement, Université de Monastir, 5019 Monastir, Tunisie 2

Institut des Nanotechnologies de Lyon - site INSA de Lyon, UMR CNRS 5270, Bât. Blaise

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Pascal, 7 avenue Jean Capelle, 69621 Villeurbanne Cedex, France *Corresponding author: [email protected]

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Abstract

The electrical and dielectric properties of TiN/Al2O3/p-Si MIS structure were studied in the temperature range of 380-450 K at 1MHz. These properties were calculated from experimental C − V and G / ω − V measurements. Experimental results show that the forward bias C − V plots exhibit a distinct peak at high temperatures, this Kind of behavior is mostly

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attributed to the series resistance (Rs ) and interface states ( N ss ) between Al2O3/p-Si. The temperature and bias voltage dependence of dielectric constant (ε ') , dielectric loss (ε ") , dielectric loss tangent (tan δ ) and the ac electrical conductivity (σ ac ) are studied for TiN/Al2O3/p-Si MIS structure. Experimental results show that the values of ε ' and ε " depend

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on the variation of both bias voltage and temperature. The C − V and G / ω − V characteristics

AC C

prove that the R s and N ss of the diode are important parameters that strongly influence the electric parameters in MIS device. The density of N ss , depending on the temperature, was determined from the C − V and G / ω − V data using the Hill-Coleman Method. The Arrhenius plot of the ac conductivity at 1 MHz is illustrated and the activation energy is found to be Ea = 0.012eV . Moreover, the electric modulus formalisms were employed to understand the

relaxation mechanism of the TiN/Al2O3/p-Si structure. Keywords: Temperature Dependence, Voltage Dependence, Interface States, Series Resistance, MOS structure, Electrical and dielectric properties, Conductivity.

39

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3. Introduction The Metal-Insulator-Semiconductor MIS structures consist of a semiconductor substrate covered by an oxide layer (between 5 and 500 nm thick) on which a metal electrode gate is deposited. MIS structures have a considerable attention over the last years due to their wide range of applications in various micro and opto-electronic devices, as the light-emitting diode

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(LED) [6, 7], switching, gas sensors [3], and in solar cells [1, 2, 4, 5]. The creation of an insulator layer between the metal and semiconductor interface having great importance to the performance and reliability of these devices [8-10]. Therefore, there has been a growing interest in the study of the electrical properties of metal oxides, particularly high dielectric

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constant (high-k) gate dielectric materials such as Al2O3, HfO2, ZrO2 and TiO2, for their potential as substitute gate dielectrics to replace SiO2. Indeed, high-k materials offer higher

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capacitance and reduce leakage current [11-15]. Among them, Al2O3 is the most stable and robust oxide, It has been widely studied for many applications especially in opto and microelectronics. Al2O3 has shown some interesting properties like dielectric permittivity ( ≈ 9), large band gap (9 eV) [16], large band offset with Si which is essential in maintaining low leakage currents through devices, kinetic stability, thermodynamic stability on Si up to high temperatures, good interface with silicon, low bulk defect density and is amorphous under the

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conditions of interest [18].

It is clear by [17] that the combination TiN/Al2O3 is a promising and especially reliable candidate thanks to its chemical compatibility and thermal stability; in addition to that it has good adhesion properties on various substrates and low interface trap densities in

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TiN/Al2O3/p-Si devices.

A range of parameters such as the insulator layer effect, interface states ( N ss ) and series

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resistance (Rs ) include a great influence on the electrical characteristics of MIS devices [19]. The diode characteristics are modified by the existence of an interface layer between the metal top contact and semiconductor, generally increasing the barrier height of the structure. The peak value of the capacitance and its position depend on N ss and R s of the device. The capacitance–voltage C − V and conductance–voltage G / ω − V characteristics of various metal–semiconductors (MS) or MIS diodes were investigated considering these effects by [19-25]. The study of the C − V and G / ω − V characteristics just at room temperature and in the narrow applied bias voltage range of the diode with an interfacial layer does not give complete information about the conduction process and the nature of barrier formed at Metal/ 40

ACCEPTED MANUSCRIPT Semiconductor (M/S) interface. Despite efforts, there is no work considering the temperature dependence of electrical, dielectric and electric modulus properties of this diode (TiN/Al2O3/p-Si) in the wide range of temperature and applied bias voltage. Therefore, in this work, using the C–V and G / ω − V measurements, we have investigated the temperature dependences of the electrical and dielectric properties of TiN/Al2O3/p-Si MIS

resistance

( Rs )

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structure. In addition, we investigated the effects of interface state density ( N ss ) and series on the C–V and G / ω − V characteristics. The C–V and G / ω − V

measurement carried out in the temperature range of 380–450 K at fixed frequency 1 MHz. Furthermore, the capacitance–temperature C − T and conductance–temperature G / ω − T and -1.5V over the temperature range of 380-450 K.

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4. Experimental procedure

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measurements were studied for the dielectric and electric modulus properties at both 1 MHz

The TiN/Al2O3/p-Si MIS structure used in this study was fabricated in the Sherbrook University. It’s fabricated on <100> p-type substrate with carrier concentration of about 1016 cm-3. The schematic representation of the elaborated structure discussed in this paper is shown in Fig. 1.

Capacitance-voltage C − V and conductance-voltage G / ω − V characteristics of TiN/Al2O3/p-

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Si MOS device were measured in the temperature range of 380-450 K with a 10 mV ac signal level and 1 mV step voltage. The C − V and G / ω − V measurements were performed at 1MHz by using HP model 4280A 1MHz C Meter/C-V Plotter. As well, the C − T and G / ω − T measurements were studied for the dielectric and electric modulus properties. All

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measurements were carried out in the temperature range of 380-450 K using a cryogenic station (cryostat and vacuum pump) turns with liquid azote, which enables us to make

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measurements in the temperature range of 77-800 K. The setup used for the electrical characterizations C − V and G / ω − V is shown in Fig. 2.

3. Results and discussion 3.1. Electrical properties In Fig. 3, we show the capacitance-voltage C − V measurements carried out in the temperature range of 380 K- 450 K at 1 MHz and the upper inset in Fig. 3 shows the C − T measurements carried out at fixed frequencies 1MHz and at -1.5 V. The observation of an apparent shift of the C − V curves along the axis of the total voltage in Fig. 3 may be due to the presence of oxide charges [26], interfacial oxide layer, interface 41

ACCEPTED MANUSCRIPT states and series resistance. This means a marked change in the electrical characteristics of MOS structures and they do not obey the ideal C − V curves [27]. In each temperature, the values of capacitance give a peak in the accumulation regime, this peak shifting to positive bias region with increasing temperature. These results appear to be comparable to previously reported curves for similar MOS diodes [28-31]. The series

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resistance and interface states between insulator layer and semiconductor lead to the observations behavior. In fact, the series resistance is a significant parameter, which causes changes in the electrical characteristics of MOS structures and the interface states generally leads to a bias shift of the capacitance–voltage C − V (Fig. 3) and conductance–voltage

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G / ω − V (Fig. 4) curves [27].

The insulator/semiconductor interface is particularly characterized by the formation of an inhomogeneous layer. In our work, we can state the existence of this phenomenon by the

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temperature dispersion of the C − V characteristics, as exposed in Fig. 3.

The stretched of capacitance–voltage characteristics along the voltage axis indicate the presence of both acceptor and donor like interface traps [32-35]. While, the temperature changes in capacitance especially in the accumulation and depletion region is attributed to the leaky behavior of the Al2O3 thin film. By increasing temperature, a decreasing in the

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accumulation capacitance is observed, thus decreasing relied extensively on the temperature and not of the conventional MIS capacitors.

Another interesting point is that the total diode capacitance, at high frequency, is affected not just by the depletion capacitance, nevertheless, also the bulk resistance which is frequency-

levels.

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dependent and associated with electron emission from slowly responding deep impurity The temperature dependence of G / ω − V characteristics of the TiN/Al2O3/p-Si diodes is

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plotted In Fig. 4 and the inset in Fig. 4 shows the G / ω − T measurements carried out at a fixed frequency (1MHz) and at -1.5 V. At a temperature of 380 K and above, the conductance in the depletion region tends to be more stretched out demonstrating more interface states with a different temperature response. However, the negligible variation of the conductance curves at high frequency (1MHz) in the both accumulation and inversion regimes reflects the high thermal stability of TiN/Al2O3/p-Si diodes [64]. As can be seen from Fig. 3 and Fig. 4, both curves have three distinct regimes of accumulation-depletion-inversion. The values of measured C − V and G / ω − V decrease in 42

ACCEPTED MANUSCRIPT depletion regions with decreasing temperature due to localized Nss at Al2O3/Si interface. Such behavior of the capacitance and conductance is attributed to a particular distribution of interface states at Al2O3/p-Si interfaces and Rs of structure [43]. The existence of interface states is demonstrated also by the hysteresis phenomenon which is very clear in C − V and G / ω − V characteristics, especially in the depletion region, as shown

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in Fig. 5.

This hysteresis noted to be indicative of slow trapping centers in the oxide and at the oxide/semiconductor interface [36-38]. Moreover, this phenomenon suggests that slow charging/de-charging of traps in the Al2O3 film or at the Al2O3/p-Si interface could be

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occurring. Furthermore, from the low hysteresis seen in C − V sweeps at high-temperature Al2O3 MIS capacitors fabricated on Si, we can suspect that this could be related to optimized

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film growth and/or proper surface grounding before oxide growth.

−2 In Fig. 6 we carried out the reverse bias C − V characteristics of the TiN/Al2O3/p-Si MOS

device at various temperatures (380-450 K) and at 1MHz.

−2 The C − V curves are linear in a wide reverse bias range, indicating that the interface states

and inversion layer charge cannot follow the ac signal in the depletion region, especially in the strong inversion and accumulation region.

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−2 The extrapolation of C − V curves with the voltage axis determines the value of diffusion

potential ( Vd ). More than that, the slope of this line carries information about the doping levels on either side of the structure. Obviously, this slope and intercept voltage of the

interface states.

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C−2 − V curves are directly influenced by the interface insulator layer and the density of

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The relation between capacitance and applied bias voltage for the diodes can be expressed as [25, 26].

2(Vd + V ) 1 = 2 C qε 0ε s A2 N A

(1)

Where ε S the dielectric constant of semiconductor (Si) is, ε 0 is the permittivity of free space equal to 8.854x10-12, q is the electronic charge, A is the area of the diode and Vd is the diffusion potential at zero bias, which is determined from the extrapolation of the linear

C−2 − V plot to the V-axis. 43

ACCEPTED MANUSCRIPT The Vd is the barrier seen by holes in the valance band of p-type semiconductor trying to move into the metal, is given by the following equation: Vd = V0 +

KT q

(2)

Such as V0 is the intercept of C-2 with the voltage axis.

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N A is the carrier concentration obtained from the slope of the C−2 − V plot which is given by deriving the equation (1).

)

 2  1 NA =  qε s A2  d 1 / C 2  dV

)

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(

    

(3)

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(

d 1/ C 2 2 = dV qε s N A A 2

(4)

The value of the barrier height φb ( C − V ) can be determined by the following relation. KT + E F − ∆φb = Vd + E F − ∆φb q

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φb = V0 +

(5)

Where ∆φb is the image force barrier lowering and given by [33],

∆φb =

qEm

(6)

4πε s ε 0

Em =

2qN AVD

(7)

ε sε 0

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And E m is the maximum electric field given by

While E F being the energy difference between the bulk Fermi level and conduction band edge, were obtained according to,

EF =

KT  NV   ln q  N A 

(8)

With NV is the effective density of states of holes in the valence band is obtained 3

from:

 2πmh* KT  2 NV = 2   2  h  44

(9)

ACCEPTED MANUSCRIPT m h* = 0 .16 m0 is the effective mass of holes and m 0 = 9 .1 × 10 −31 Kg is the rest mass of the

electron. In Table 1 we present the values of VD , N A , E F , ∆φb and φb for TiN/Al2O3/p-Si diodes determined from C − V and G / ω − V measurements at different temperatures ranging from 380 to 450 K.

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In Fig. 7 we present the variation of the barrier height φb values with temperature calculated from Eq. (5). From this figure, the values of φb found to change with the temperature as:

φb = φb (T = 0 ) + β T

(10)

Here φb (T = 0 ) is the barrier height at absolute zero temperature found to be 3.040 eV and β

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is the temperature coefficient of the barrier height equal to -58x10-4 eV/K.

This value of temperature coefficient of the barrier height was a little lower agreement with (-6.44x10-4ev/K) found by [27].

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the temperature coefficient of Si band-gap (-4.73x10-4 eV/K) found by [33, 39] or

Additionally, a mixture of methods has been suggested which help to extract the series resistance Rs of the diodes. Among them, the most important one and used in this work is the conductance method, developed by Nicollian and Brews [40-43]. By this method, the series

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resistance of MOS devices can be abstract from the measured capacitance (Cm ) and conductance (Gm ) in strong accumulation region at high frequency (1 MHz) [26, 27]. More than voltage dependence, we can obtain temperature dependence of the series resistance from the measurements of C − V and G / ω − V characteristics. At high frequency, to find out series

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resistance Rs , the MOS devices should be biased into strong accumulation and in that case the

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admittance Ym = 1 / Z m is specified as [26, 27, 43]: Ym = Gm + jωCm

(11)

 1 Series resistance is the real part of the impedance  Z m =  so: Ym   Rs =

Gm 2 G + (ωCm )

[

2 m

]

(12)

With G m and C m represent the measured conductance and capacitance in a strong accumulation region. We can identify the capacitance of the insulator layer Cox by substituting Rs into the following equation

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ACCEPTED MANUSCRIPT Cm =

Cox 1 + ω 2 Rs2Cox2

(

)

(13)

From this equation (13), Cox is given by

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  G 2  ε ε A Cox = Cm 1 +  m   = ox 0 (14) d ox   ωCm   Where ε ox is the permittivity of the interfacial insulator layer, ε 0 is the permittivity of free space and d ox is the insulating layer thickness. From the equation (14), the insulator layer thickness calculated for our MIS structure was found to be 17 nm .

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Using equation (12) the values of Rs is calculated as a function of bias in the temperature range from 380 to 450 K and shown in Fig. 8.

From Fig. 8, it is clear that the series resistance depends on the changes in both temperature

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and voltage. The Rs increase with increasing temperature and gives a peak. This peak position of Rs is shifting toward inversion region with increasing temperature. Such behavior of Rs is attributed to the particular distribution of localized N ss at Al2O3/p-Si interface states and interfacial insulator layer at TiN/p-Si interface. This behavior was also observed in different similar structures like Al/HfO2/p-Si MOS [26, 43], Au/SiO2/p-Si MIS [25], Al/SiO2/p-Si [27],

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Al/Si3N4/p-Si MIS diodes [44] and Au/SiO2/n-Si MIS [45]. In the depletion region depending on temperature, from -0.2 V to 0.6 V, the series resistance presents a peak shifting towards positive bias. Nevertheless, the series resistance in the

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depletion region tends to be more stretched out causing from the interface states with a different temperature response.

In addition, at 380 K and above, the series resistance appears to be constant in the

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accumulation region at high frequency. This proves the thermal stability of the TiN/Al2O3/pSi MIS structure. In the depletion region, the values of Rs increase while in the accumulation region Rs have remained almost constant since 1700 Ω at 380 K to 2200 Ω at 450 K. Furthermore, according to the Hille-Coleman [46] and after that Konofaos [47] and Dakhel [48] the density of interface states is given by:

  2  (G / ω )max N ss =   2 2  qA  ((G / ω )max / Cox ) + (1 − (Cm / Cox )) 

(15)

Where, ω is the angular frequency, A is the area of the diode, C m and (Gm / ω )max are the measured capacitance and conductance which correspond to peak values, respectively, and 46

ACCEPTED MANUSCRIPT Cox is the capacitance of insulator layer. The density of interface Nss can easily follow the ac

signal and yield an excess capacitance at low frequencies. If the C − V or G / ω − V measurements are carried out at a sufficiently high frequency like our case (1MHz), the contribution of interface state capacitance to the total capacitance may be neglected because it can hardly follow the ac signal. Fig. 9 present the variation of the interface states as a function

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of temperatures at 1MHz. The values of Nss diminishing with growing temperature from 1.28x1012 at 380K to 1.21x1012 at 450K, As seen in Fig. 9. This phenomenon is probably attributed to the molecular reorganization and the reordering of the oxide-semiconductor interface under the temperature

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influence, which leading to the occurrence of the more ordered interfacial layer then lowering the value of Nss [26].

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3.2. Dielectric properties and ac electrical conductivity

Both temperature and voltage dependence of dielectric constant (ε ') , dielectric loss (ε ") , loss factor (tan δ ) , ac electrical conductivity (σ ac ) and real and imaginary part of complex electric modulus (M * = M '+ jM ") are studied for TiN/Al2O3/p-Si MIS structure at high frequency

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1MHz.

The complex permittivity formalism has been employed to describe the electrical and dielectric properties, and it can be defined by the following complex equation [29-49].

ε * = ε '− jε "

(16)

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Where, ε ' and ε " are the real and the imaginary parts of complex permittivity, and j is the imaginary root of -1.

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ε ' , identifies the strength of alignment of dipoles in the dielectric, is a measure of the energy

stored from the applied electric field in the material. ε " , is the energy dissipated in the dielectric, which is associated with the frictional dampening that prevents the displacement of bound charge from keeping in phase with the field change [50]. In the case of admittance measurements, the ε * formalism given by the following relation:

ε* =

Y* C G = −j jωC0 C0 ωC0

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(17)

ACCEPTED MANUSCRIPT Where C , G and Y * are the measured capacitance, conductance and admittance values, respectively, ω the angular frequency (ω = 2πf ) and C0 is the capacitance of an empty capacitor and expressed as:

ε0 A

(18)

dox

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C0 =

With d ox is the interfacial insulator layer thickness, A is the surface area of the sample and ε 0 is the permittivity of free space.

The dielectric constant ε ' (real part of the complex permittivity) at the various temperatures relation [51, 52]:

Cm C0

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ε '=

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was determined using the measured capacitance values at a bias voltage of -1.5 V from the

(19)

On the other side, the dielectric loss ε " (imaginary part of the complex permittivity), is calculated using the measured conductance values from the relation:

ε"=

Gm ωC0

(20)

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As well, the loss factor tangent or dissipation factor (tan δ ) is given by the ratio of the imaginary ε " and the real ε ' parts of the dielectric constant.

ε" ε'

(21)

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tan δ =

The variations of the ε ' , ε " and tan δ versus temperature and voltage at high frequency are

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shown in Fig. 10(a-c), respectively.

The change of the ε '− T , ε " − T and tan δ − T at high frequency (1MHz) are shown in Fig. 10 (a-c), respectively, in the temperature range of 380-450 K. From these figures, the dielectric constant ε ' decreases with increasing temperature. Whereas, both ε " and tan δ increases with increasing temperature. This behavior is similar to that found in Ref. [26, 56]. When the temperature increases, there's the creation of defect/disorders in the lattice leads to decreases of the mobility of the majority charge carriers (ions and electrons). At high frequency the interfacial dipoles have less time to orient themselves in the direction of the alternating field [57, 58].

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ACCEPTED MANUSCRIPT The upper inset in Fig. 10(a-c) shows the ε '−V , ε "−V and tan δ − V of the MIS capacitor at different temperature. As seen in the upper inset in Fig. 10 (a) and (b), the values of ε ' and ε " decrease with increasing bias voltage. The temperature decreases shown especially in the accumulation region for ε ' , in the depletion region for ε " and there is almost constant in the inversion region due to the particular distribution of charges and their restructuring and

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reordering at interface states under temperature. Such variation was attributed to the variation in the capacitance and conductance values [53-55]. Additionally, the dielectric constant of the capacitor is mostly proportional to the number of dipoles so the decreasing of dielectric constant followed by decrease of dipoles. This reduction of the number of dipoles can be

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explained by the recombination of charge carriers, which neutralize some dipoles, locate within the material. Through a temperature progression, excited charge carriers can migrate into some defects in the forbidden band.

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In the inset in Fig. 10 (c), we present loss tangent (tan δ ) curves which give a peak at each temperature at about -0.5 V. The peak position shifts towards the forward bias voltage region and increase with increasing temperature. This behavior is probably due to the particular distribution of charges and their restructuring and reordering at interface states under the temperature effect. As well, it is clear that the values of tan δ increases with increasing

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temperature in all regions (accumulation + depletion + inversion). This augment in tan δ is provoked by reductions in the both conduction of residual and absorption current [55]. These results imply that during and after the sample processing, the distribution density of the interface state profile is not inherent but a sequence of formation of states at the interface.

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The complex conductivity (σ *) can be expressed by the following equation,

σ * = jε 0ωε * = jε 0ω (ε '− jε ") = ε 0ωε "+ jε 0ωε '

(22)

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The ac electrical conductivity (σ ac ) is the real part of (σ *) and is calculated from the dielectric loss values according to the relation:

σ ac = ωC tan δ (d / A) = ε 0ωε "

(23)

Fig. 11 (a) illustrates the temperature dependence of the ac electrical conductivity of TiN/Al2O3/p-Si diode are investigated, measured at 1 MHz. The (σ ac ) shows an increasing trend (from 3.4x10-6 to 3.7x10-6 is almost constant) with increasing temperature. Similar behavior was observed in the literature [26, 29, 59, 60]. This behavior may be confirming the thermal stability of the TiN/Al2O3/p-Si diodes and suggesting that the process of dielectric polarization on MIS device takes place through a mechanism similar to the conduction 49

ACCEPTED MANUSCRIPT process [26, 57]. At high frequency this behavior can be attributed to a gradual decrease in series resistance. The ac conductivity σ ac − V plots of the capacitor at different temperatures were obtained by using Eq. (23) and are given in the inset in Fig. 11(a). The σ ac is dependent on the temperature and applied bias voltage. It is clear from the inset that the values of σ ac increase with the

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increasing temperature and decrease with increasing bias voltage in the accumulation and depletion regions and are constant in the inversion region. This decrease in ac conductivity with bias voltage probably attributed to the charge created because of the breaking of lattice bounds.

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At high temperature, the increases in the electrical conductivity are attributed to the impurities or dislocations exist at the metal-semiconductor interface. [57, 60]. A linear relationship

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between the total conductivity and the inverse absolute temperature could be written as [27, 60]:

 Ea    KT 

σ = σ 0 exp −

(24)

Where σ 0 is the composite constant or the preexponential factor, K is the Boltzmann

Kelvin.

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constant, Ea is the activation energy of the conduction mechanism and T is the temperature in

As shown in Fig. 11(b), the Arrhenius plot of the ac conductivity at 1 MHz is illustrated. The

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activation energy is found to be Ea = 0.012eV from the slope of Ln(σ ac ) vs. q/ KT . At high temperature, the value of the activation energy for our sample value found to be in the

[27].

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middle of the work of Yücedağ (Ea = 0.008eV ) [60] and that of Tataroglu (Ea = 0.026 eV )

This small activation energy value demonstrates that the bulk-trap level raised between the valence and conduction band. Also, at high temperature, this low value of the activation energy suggests that the conduction mechanism may be due to the hopping of electrons. Many authors are interested and discuss the complex impedance (Z *) as well as the complex electric modulus (M *) formalism [21, 58]. To separate the bulk and the surface phenomena and to determine the bulk dc conductivity of the material is necessary to analysis the complex permittivity (ε *) data with the (Z *) formalism (Z * = 1 / Y * = 1 / jωC 0ε *) [57]. 50

ACCEPTED MANUSCRIPT From the physical point of view, the electrical modulus corresponds to the relaxation of the electric field in the material when the electric displacement remains constant. For that reason, the modulus represents the real dielectric relaxation process. The complex impedance or the complex permittivity (ε * = 1/ M *) data were transformed into the M * formalism using the following relation [21, 58, 61, 62].

M '=

Where

1 1 ε '+ jε " = = = M '+ jM " ε * ε '− jε " (ε '− jε ")(ε '+ jε ")

(25)

ε' ε" and M "= 2 2 ε ' +ε " ε ' +ε "2

(26)

2

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M * = jωC0 Z * =

With M ' and M " are the real and the imaginary parts of complex modulus, respectively, are

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calculated from ε ' and ε " data for each temperature as shown in Fig. 12(a) and (b), respectively.

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Fig. 12(a) and (b) represent the real part of M ' and the imaginary part of M " of the electric modulus M * versus temperature at -1.5 V for TiN/Al2O3/p-Si MIS diode. As we can see in Fig 12(a) and (b), M ′ and M ′′ decrease with increasing temperature. Similar results have been reported in the literature [26, 27, 60].

The variation of such modulus spectra confirms the existence of hopping mechanism and surface charge polarization in the electrical conduction of the materials [63].

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As shown in Fig. 12(b), the slightly decreases of M " with increasing temperature demonstrate an increase in the energy of charge carrier leading to increased relaxation times [26].

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5. Conclusions

In this study, the forward and reverse bias C − V and G / ω − V characteristics TiN/Al2O3/p-Si

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MIS devices were measured in the temperature range of 380-450 K at 1MHz. Experimental results show that the forward bias C − V plots exhibit a distinct peak at high temperatures, this kind of behavior is mostly attributed to the series resistance (Rs ) and interface states

(N ss )

between Al2O3/p-Si. The capacitance in accumulation region is observed to have

significantly different dependence on the temperature than that of the conventional metaloxide- Si capacitors since it decreases with increasing temperature. In contrary, the capacitance values in the depletion region increase with increases in temperature. This phenomenon is attributed to a series combination of the depletion layer capacitance and the capacitance dependent interface traps due to the temperature effect.

51

ACCEPTED MANUSCRIPT From 380 K and above, in the depletion region, the conductance tends to be more stretched out demonstrating more interface states with a different temperature response. On the other hand, small change in the accumulation and inversion region conductance at high frequency (1MHz) proving the thermal stability of the future TiN/Al2O3/p-Si MIS diode. The existence of interface states demonstrating by experimental hysteresis phenomenon in C-

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V and G-w characteristics especially in the depletion region. It is clear that the series resistance depends on the changes in both temperature and bias voltage gives a peak shifting towards positive bias. We have remark also, that the values of Nss decreases with increases temperature from 1.28x1012 at 380K to 1.21x1012 at 450K, this decreasing in Nss probably

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attributed to the molecular reorganization and the reordering of the oxide-semiconductor interface under temperature effect.

In addition, in this study, we can conclude that the values of the real part of dielectric constant dielectric loss (ε ") , loss tangent (tan δ ) and the ac conductivity (σ ac ) of TiN/Al2O3/p-Si

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(ε ') ,

MIS structure strongly depends on the temperature and bias voltage. We note that both ε " and tan δ increases, whereas the dielectric constant ε ' decreases with increasing temperature.

These results confirm the creation of defect/disorders in the lattice leads to decreases of the mobility of the majority charge carriers (ions and electrons) and at high frequency the

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interfacial dipoles have less time to orient themselves in the direction of the alternating field. The performance of dielectric properties, especially depends on temperature, interfacial oxide layer, the density of space charges, and bias voltage. Also, the ε '−V , ε "−V and tan δ − V of the MIS capacitor at different temperature are

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investigated. The values of ε ' and ε " decrease with increasing bias voltage. Such variation was attributed to the variation in the capacitance and conductance values. Loss tangent curves give a peak at each temperature at about -0.5 V, This peak position shifts

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(tan δ )

towards the forward bias voltage region and increase with increasing temperature. This behavior is probably due to the particular distribution of charges and their restructuring and reordering at interface states under the temperature effect. At high temperature, the increases in the electrical conductivity (σ ac ) are attributed to the impurities or dislocations exist at the metal-semiconductor interface. Thus, the Arrhenius plot of the ac conductivity at 1 MHz is illustrated and the activation energy is found to be Ea = 0.012eV from the slope of Ln(σ ac ) vs. q/ KT . This small activation energy value demonstrates that the bulk-trap level raised between the valence and conduction band. Also, at high temperature this low value of the 52

ACCEPTED MANUSCRIPT activation energy suggest that the conduction mechanism may be due to the hopping of electrons. The real part of M ' and the imaginary part of M " of the electric modulus M * versus temperature at -1.5 V for TiN/Al2O3/p-Si MIS diode decrease with increasing temperature demonstrate an increase in the energy of charge carrier leading to increased relaxation times.

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The Al2O3 MIS (p) temperature sensor can be compatible with CMOS processing. It shows promising potential for low power devices and cost. It is useful production for future semiconductor industry.

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Compliance with ethical standards

Conflict of interest The authors (Slah Hlali, Abdelaali Fargi, Neila Hizem, Liviu Militaru,

References

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Adel Kalboussi and Abdelkader Souifi) declare that they have no conflict of interest.

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gamma irradiated Au/SnO 2/n-Si/Au (MOS) capacitor.Materials Science in Semiconductor

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[56] ARSLAN, Engin, ŞAFAK, Yasemin, TAŞÇIOĞLU, İlke, et al. Frequency and temperature dependence of the dielectric and AC electrical conductivity in (Ni/Au)/AlGaN/AlN/GaN heterostructures. Microelectronic Engineering, 2010, vol. 87, no 10, p. 1997-2001. [57] SATTAR, A. A. et RAHMAN, Samy A. Dielectric properties of rare earth substituted Cu–Zn

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ferrites. physica status solidi (a), 2003, vol. 200, no 2, p. 415-422. [58] PRABAKAR, K., NARAYANDASS, Sa K., et MANGALARAJ, D. Dielectric properties of Cd0. 6Zn0. 4Te thin films. physica status solidi (a), 2003, vol. 199, no 3, p. 507-514.

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[59] TATAROGLU, A., ALTINDAL, Ş., et BÜLBÜL, M. M. Temperature and frequency dependent electrical and dielectric properties of Al/SiO 2/p-Si (MOS) structure. Microelectronic engineering, 2005, vol. 81, no 1, p. 140-149. [60] YÜCEDAĞ, İ., KAYA, A., TECIMER, H., et al. Temperature and voltage dependences of dielectric properties and ac electrical conductivity in Au/PVC+ TCNQ/p-Si structures. Materials Science in Semiconductor Processing, 2014, vol. 28, p. 37-42. [61] MIGAHED, M. D., ISHRA, M., FAHMY, T., et al. Electric modulus and AC conductivity studies in conducting PPy composite films at low temperature.Journal of Physics and Chemistry of Solids, 2004, vol. 65, no 6, p. 1121-1125.

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ACCEPTED MANUSCRIPT [62] ŞAFAK-ASAR, Yasemin, ASAR, Tarık, ALTINDAL, Şemsettin, et al.Investigation of dielectric relaxation and ac electrical conductivity using impedance spectroscopy method in (AuZn)/TiO 2/pGaAs (110) schottky barrier diodes. Journal of Alloys and Compounds, 2015, vol. 628, p. 442-449. [63] SARANGI, S., BADAPANDA, T., BEHERA, B., et al. Frequency and temperature dependence dielectric behavior of barium zirconate titanate nanocrystalline powder obtained by mechanochemical synthesis. Journal of Materials Science: Materials in Electronics, 2013, vol. 24, no 10, p. 4033-4042.

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[64] LIN, Chien-Chih et HWU, Jenn-Gwo. Performance enhancement of metal-oxide-semiconductor tunneling temperature sensors with nanoscale oxides by employing ultrathin Al 2 O 3 high-k

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dielectrics. Nanoscale, 2013, vol. 5, no 17, p. 8090-8097.

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Table caption

Table 1: Temperature dependent values of various parameters determined from C − V

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measurements of TiN/Al2O3/p-Si MIS structure

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Figure captions

Fig. 1. A schematic representation of the elaborated structure TiN/Al2O3/p-Si

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Fig. 2. Setup diagram of the electrical measurements using an HP model 4280A 1MHz C Meter/C-V Plotter for C − V and G / ω − V .

Fig. 3. Temperature dependent plot of the C − V characteristics of the TiN/Al2O3/p-Si MIS device.

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Fig. 4. The temperature dependent plot of G / ω − V characteristics of the TiN/Al2O3/p-Si MOS device.

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Fig. 5. High-frequency C − V (a) and G / ω − V (b) hysteresis obtained by sweeping gate voltage forth and back between -3 and 2 V.

Fig. 6. The C −2 − V plots of MIS structure at a range of temperatures 380-450 K at a frequency of 1 MHz.

Fig. 7. Barrier height φb versus temperature plot for the TiN/Al2O3/p-Si MIS structure.

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Fig. 8: The variation of the series resistance of the TiN/Al2O3/p-Si MIS structure as a function of the bias voltage for different temperatures.

Fig. 9. The variation of the interface states as a function of temperatures at 1MHz. Fig. 10. Temperature dependence of (a) the dielectric constant ε ' , (b) the dielectric loss ε " and

dependence.

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(c) the loss factor tan δ at high frequency for TiN/Al2O3/p-Si MIS device. Inset: Voltage

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Fig. 11. Temperature dependence of ac electrical conductivity (σ ac ) at high frequency (a). Inset: variation of the ac electrical conductivity (σ ac ) with applied voltage at different temperature. (b) Ln (σ ac ) vs. q / KT for TiN/Al2O3/p-Si at -1.5 V. Fig. 12. Temperature dependence of (a) real part (M’) and (b) imaginary part (M″) of the complex modulus for TiN/Al2O3/p-Si at -1.5 V.

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Table 1

2.15 3.59 3.71 4.14 4.31 4.36 5.01 5.52

EF (eV )

)

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0.832 0.803 0.784 0.715 0.676 0.617 0.537 0.418

(

N A × 1018 cm −3

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380 390 400 410 420 430 440 450

VD (eV )

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T (K)

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0.049 0.034 0.035 0.034 0.034 0.036 0.033 0.031

∆ φb (eV )

φb (eV )

0.095 0.107 0.108 0.109 0.108 0.106 0.106 0.102

0.786 0.730 0.711 0.640 0.602 0.547 0.464 0.347

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-3

AC C

450 K

380 K

TE D

Rs (Ω)

5000

M AN U

SC

RI PT

ACCEPTED MANUSCRIPT

-2

-1

Bias voltage (V)

Figure 8

69

0

1

M AN U

SC

RI PT

ACCEPTED MANUSCRIPT

1,29E+012 1,28E+012

1,26E+012 1,25E+012

TE D

-1

Νss (eV cm

-2

)

1,27E+012

1,24E+012 1,23E+012 1,22E+012

EP

1,21E+012 1,20E+012

AC C

370

380

390

400

410

420

Temperature (K)

Figure 9

70

430

440

450

460

ACCEPTED MANUSCRIPT 13

10

(a)

380 K 390 K 400 K 410 K 420 K 430 K 440 K 450 K

∆T = 10 K

380 K 8

12 6

450 K

ε'

11

4

ε'

2

10 0 -2

-1

0

1

Bias Voltage (V)

8

7 380

390

400

410

420

430

450

M AN U

49

440

SC

T (K)

2

RI PT

-3

9

60

(b)

48

50

47

40

30

ε"

46 45

380 K

20

380 K 390 K 400 K 410 K 420 K 430 K 440 K 450 K

450

ε"

10

44

0

43

-10

-3

42

40 39 38

-1

0

1

2

Bias Voltage (V)

TE D

41

-2

380

390

400

410

420

430

440

450

EP

T (K)

7

8

AC C

(c)

380 390 400 410 420 430 440 450

450 K 6

4

tan δ

380 K

6

K K K K K K K K

2

0

tan δ

-2

-4 -3

-2

-1

0

1

2

Bias Voltage (V)

5

380

390

400

410

420

430

440

450

T (K)

Figure 10 71

ACCEPTED MANUSCRIPT

-6

4,1x10

-6

4,0x10

-6

3,9x10

-6

cm-1)

-6

8,0x10

-7

6,0x10

-7

4,0x10

-7

2,0x10

-7

450 K

3,8x10

-6

3,7x10

-6

3,6x10

-6

3,5x10

-6

3,4x10

-6

σac (Ω

380 K

0,0 -3

-2

-1

0

1

2

SC

Bias Voltage (V)

380

390

M AN U

σac (Ω

380 K 390 K 400 K 410 K 420 K 430 K 440 K 450 K

-1

1,0x10

-1

cm-1)

(a)

RI PT

4,2x10

400

410

420

430

440

450

T (K)

-12,51

(b) -12,52

y = -12,20 - 0,012x

-12,55 -12,56 -12,57

TE D

-12,54

EP

( )

-1 -1 Ln σ ac (Ω cm )

-12,53

experimental Linear Fit

-12,58 -12,59

AC C

25

26

27

28

q/KT (eV-1)

Figure 11

72

29

30

31

ACCEPTED MANUSCRIPT

0,0060

RI PT

(a)

0,0050

SC

M'

0,0055

370

380

390

M AN U

0,0045

400

410

420

430

440

450

460

430

440

450

460

T

0,0244

(b)

TE D

0,0242

M"

0,0240

0,0238

EP

0,0236

0,0234

AC C

0,0232

370

380

390

400

410

420

T (K)

Figure 12

73

ACCEPTED MANUSCRIPT

Highlights (for review)

C–V and G/w–V characteristics were investigated in the high temperatures.

•

The capacitance decreases with rise in temperature.

•

The capacitance decreases with increasing voltage.

•

The values of ɛ′ and ɛ″ was calculated as a function of temperature and voltage.

•

tan δ increases with rise in temperature, as decreases with increasing voltage

AC C

EP

TE D

M AN U

SC

RI PT

•