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Highly Scalable Real Time Epilepsy Diagnosis Architecture Via Phase Correlation
Available online at www.sciencedirect.com
ScienceDirect Procedia Technology 27 (2017) 55 – 56
.Biosensors 2016
Highly scalable real time epilepsy diagnosis architecture via phase correlation James Brian Romaine, Manuel Delgado-Restituto and Ángel Rodríguez-Vázquez Institute of Microelectronics of Sevilla and University of Sevilla, Avda. Americo Vespucio, Seville 41092, Spain Key words: Seizure detection, phase correlation, neural prosthesis, low-power low-area microelectronics;
1. Introduction Epilepsy is at current the world’s second most common neurological disorder affecting an estimated 50 million people. While up to 70% of epileptic suffers are treated successfully with epileptic medication some 30% continue to suffer untreated [1]. This gap could be filled by the implementation of implantable neural prostheses which are able to detect when a seizure is coming and eventually actuate in the brain to stop its progression. The change in brain activity during epileptic fits has been leading scientists to investigate neural features such as neural spiking [2], correlation [3] and the most tantalizing, phase synchronization, in order to predict seizures before they happen. As described in [4], a large decrease in synchronization between two neural signals can be seen for an unknown period during the pre-ictal stage. This decrease in synchronization is believed to be a significant biomarker which could hold the key to prediction and prevention of epileptic seizures via neural prosthesis. The discrete distance approximation (DDA) algorithm proposed in this work can drastically reduce the number of complex operations (multiplications and divisions), relying only on basic addition, comparison and shifting. In terms of logic, the DDA can reduce the amount of hardware needed to detect pre-ictal events by as much as 96.8% when compared to systems with similar functionality. Due to its highly efficient area and power consumption, the proposed approach could lead to a truly functional medical in-vivo application for real time monitoring and or prevention. 2. Algorithm and Hardware Design The DDA algorithm proposed herein relies on the detection of minimum to minimum transition periods in order to identify large changes in phase frequency content between two signals. The transition period is an integer count of the number of samples between consecutive minima at the clock sampling frequency. By denoting the transition period as TSn , where S is the signal to which the transition period belongs and n is the transition index, the phase synchronization index SI between two neural signals over a set of K clock cycles can be calculated as
2212-0173 © 2017 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/). Peer-review under responsibility of the organizing committee of Biosensors 2016 doi:10.1016/j.protcy.2017.04.026
56
James Brian Romaine et al. / Procedia Technology 27 (2017) 55 – 56
SI 1
1
K 1
K
n 0
¦
n
n
T1 T2 'Tmax
1
n § 'Tdiff ¦ ¨¨ K n 0 'Tmax ©
1
K 1
· ¸¸ ¹
n where 'Tmax is the maximum 'Tdiff possible which can be easily estimated based on the selected frequency band and the sampling frequency of the signals. The index suggests that if the majority of the transition periods in the two signals are similar in duration, then SI will be close to 1 (signals are highly synchronized). If the majority of
frequencies are very different SI will be close to 0 (signals are poorly synchronized). Fig. 1(left) shows the flow diagram for the hardware implementation of the DDA algorithm. The pre-processing stage comprises a filter for frequency band selection and input signals smoothing. The minimum detection unit uses a pair-wise comparator which compares the samples n and n-1of the neural signal, and a shift register which stores the last M outcomes of the comparator. A majority of ‘0s’ on the left hand side positions of the register and a majority of ’1s’ at the right hand side indicates that a minimum is present. Finally, a permanent up counter is used to calculate the number of samples between consecutive minimum. This counter is reset at every minimum detection. n The terms 'Tdiff are calculated using a simple subtractor and an accumulator is employed to calculate the
magnitude of errors over the K cycles. The detection block which uses a simple threshold method of detection. Fig. 1(right) illustrates the performance of the DDA algorithm, which has been implemented in a XILINX ARTIX 7 FPGA. Our system provides an 86% reduction in LUT´s, an almost 90% reduction in slices and an approximate 82% reduction in flip flops as compared with more complex methods such as the Hilbert transform and phase locking value evaluation [5].
Figure 1. Flow diagram for the hardware implementation of the DDA algorithm (left) and illustration of the performance obtained with a FPGA realization (for comparison, the results of employing the Hilbert transform (PLV) method are also shown)
3. Conclusion The proposed design has the potential to aid the life of those who suffer from epileptic and other disorders. The design uses a simple algorithm which in turn allows for low complexity hardware advertising sufficient data processing without jeopardizing its in-vivo applications possibilities. Acknowledgements This work has been funded by Mineco under grant TEC2012-33634, Junta de Andalucía under project TIC 2338, the Office of Naval Research (ONR -USA) under Project N00014-14-1-0355 and the FEDER Program. References 1. 2. 3. 4. 5.
A. Giuliano et al. “Epilepsy Care in the World WHO 2005. Epilepsy Atlas.” 2005. A. Katz et al. Electroencephalography and Clinical Neurophysiology, 79(2): 153–156, Aug. 1991. J. R. Williamson et al. Epilepsy & Behavior, 25(2): 230–238, Oct. 2012. F. Mormann et al. Epilepsy Research, 53(3): 173–185, Mar. 2003. A. Das et al., Annual IEEE India Conference(INDICON), Dec. 2012, pp. 280–285.
ScienceDirect Procedia Technology 27 (2017) 55 – 56
.Biosensors 2016
Highly scalable real time epilepsy diagnosis architecture via phase correlation James Brian Romaine, Manuel Delgado-Restituto and Ángel Rodríguez-Vázquez Institute of Microelectronics of Sevilla and University of Sevilla, Avda. Americo Vespucio, Seville 41092, Spain Key words: Seizure detection, phase correlation, neural prosthesis, low-power low-area microelectronics;
1. Introduction Epilepsy is at current the world’s second most common neurological disorder affecting an estimated 50 million people. While up to 70% of epileptic suffers are treated successfully with epileptic medication some 30% continue to suffer untreated [1]. This gap could be filled by the implementation of implantable neural prostheses which are able to detect when a seizure is coming and eventually actuate in the brain to stop its progression. The change in brain activity during epileptic fits has been leading scientists to investigate neural features such as neural spiking [2], correlation [3] and the most tantalizing, phase synchronization, in order to predict seizures before they happen. As described in [4], a large decrease in synchronization between two neural signals can be seen for an unknown period during the pre-ictal stage. This decrease in synchronization is believed to be a significant biomarker which could hold the key to prediction and prevention of epileptic seizures via neural prosthesis. The discrete distance approximation (DDA) algorithm proposed in this work can drastically reduce the number of complex operations (multiplications and divisions), relying only on basic addition, comparison and shifting. In terms of logic, the DDA can reduce the amount of hardware needed to detect pre-ictal events by as much as 96.8% when compared to systems with similar functionality. Due to its highly efficient area and power consumption, the proposed approach could lead to a truly functional medical in-vivo application for real time monitoring and or prevention. 2. Algorithm and Hardware Design The DDA algorithm proposed herein relies on the detection of minimum to minimum transition periods in order to identify large changes in phase frequency content between two signals. The transition period is an integer count of the number of samples between consecutive minima at the clock sampling frequency. By denoting the transition period as TSn , where S is the signal to which the transition period belongs and n is the transition index, the phase synchronization index SI between two neural signals over a set of K clock cycles can be calculated as
2212-0173 © 2017 The Authors. Published by Elsevier Ltd. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/). Peer-review under responsibility of the organizing committee of Biosensors 2016 doi:10.1016/j.protcy.2017.04.026
56
James Brian Romaine et al. / Procedia Technology 27 (2017) 55 – 56
SI 1
1
K 1
K
n 0
¦
n
n
T1 T2 'Tmax
1
n § 'Tdiff ¦ ¨¨ K n 0 'Tmax ©
1
K 1
· ¸¸ ¹
n where 'Tmax is the maximum 'Tdiff possible which can be easily estimated based on the selected frequency band and the sampling frequency of the signals. The index suggests that if the majority of the transition periods in the two signals are similar in duration, then SI will be close to 1 (signals are highly synchronized). If the majority of
frequencies are very different SI will be close to 0 (signals are poorly synchronized). Fig. 1(left) shows the flow diagram for the hardware implementation of the DDA algorithm. The pre-processing stage comprises a filter for frequency band selection and input signals smoothing. The minimum detection unit uses a pair-wise comparator which compares the samples n and n-1of the neural signal, and a shift register which stores the last M outcomes of the comparator. A majority of ‘0s’ on the left hand side positions of the register and a majority of ’1s’ at the right hand side indicates that a minimum is present. Finally, a permanent up counter is used to calculate the number of samples between consecutive minimum. This counter is reset at every minimum detection. n The terms 'Tdiff are calculated using a simple subtractor and an accumulator is employed to calculate the
magnitude of errors over the K cycles. The detection block which uses a simple threshold method of detection. Fig. 1(right) illustrates the performance of the DDA algorithm, which has been implemented in a XILINX ARTIX 7 FPGA. Our system provides an 86% reduction in LUT´s, an almost 90% reduction in slices and an approximate 82% reduction in flip flops as compared with more complex methods such as the Hilbert transform and phase locking value evaluation [5].
Figure 1. Flow diagram for the hardware implementation of the DDA algorithm (left) and illustration of the performance obtained with a FPGA realization (for comparison, the results of employing the Hilbert transform (PLV) method are also shown)
3. Conclusion The proposed design has the potential to aid the life of those who suffer from epileptic and other disorders. The design uses a simple algorithm which in turn allows for low complexity hardware advertising sufficient data processing without jeopardizing its in-vivo applications possibilities. Acknowledgements This work has been funded by Mineco under grant TEC2012-33634, Junta de Andalucía under project TIC 2338, the Office of Naval Research (ONR -USA) under Project N00014-14-1-0355 and the FEDER Program. References 1. 2. 3. 4. 5.
A. Giuliano et al. “Epilepsy Care in the World WHO 2005. Epilepsy Atlas.” 2005. A. Katz et al. Electroencephalography and Clinical Neurophysiology, 79(2): 153–156, Aug. 1991. J. R. Williamson et al. Epilepsy & Behavior, 25(2): 230–238, Oct. 2012. F. Mormann et al. Epilepsy Research, 53(3): 173–185, Mar. 2003. A. Das et al., Annual IEEE India Conference(INDICON), Dec. 2012, pp. 280–285.