Hot-wire chemical vapor deposition of epitaxial film crystal silicon for photovoltaics

Hot-wire chemical vapor deposition of epitaxial film crystal silicon for photovoltaics

Thin Solid Films 519 (2011) 4545–4550 Contents lists available at ScienceDirect Thin Solid Films j o u r n a l h o m e p a g e : w w w. e l s ev i e...

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Thin Solid Films 519 (2011) 4545–4550

Contents lists available at ScienceDirect

Thin Solid Films j o u r n a l h o m e p a g e : w w w. e l s ev i e r. c o m / l o c a t e / t s f

Hot-wire chemical vapor deposition of epitaxial film crystal silicon for photovoltaics☆ Howard M. Branz ⁎, Charles W. Teplin, Manuel J. Romero, Ina T. Martin, Qi Wang, Kirstin Alberi, David L. Young, Paul Stradins Silicon Materials and Devices Group, National Renewable Energy Laboratory, 1617 Cole Blvd., Golden, CO 80401, USA

a r t i c l e

i n f o

Available online 1 February 2011 Keywords: Solar cells Epitaxy Film crystal silicon Silicon Hot-wire deposition Modeling Photovoltaics Dislocations

a b s t r a c t We have demonstrated that hot-wire chemical vapor deposition (HWCVD) is an excellent technique to produce high-quality epitaxial silicon at high rates, at substrate temperatures from 620 to 800 °C. Fast, scalable, inexpensive epitaxy of high-quality crystalline Si (c-Si) in this temperature range is a key element in creating cost-competitive film Si PV devices on crystalline seed layers on inexpensive substrates such as display glass and metal foil. We have improved both the quality and rate of our HWCVD Si epitaxy in this display-glass-compatible T range. We understand factors critical to high-quality epitaxial growth and obtain dislocation densities down to 6 × 104 cm−2 by techniques that reduce the surface oxygen contamination at the moment growth is initiated. We have also developed and validated a model of the HWCVD silicon growth rate, based on fundamentals of reaction chemistry and ideal gas physics. This model enables us to predict growth rates and calculate the sticking coefficient of the Si radicals contributing to film formation between 300 and 800 °C. We obtain efficiencies up to 6.7% with a 2.5-micron absorber layer grown on heavily-doped ‘dead’ Si wafers although these cells still lack hydrogenation and light trapping. Open-circuit voltages up to 0.57 V are obtained on 2-μm cells. Efficient film crystal silicon photovoltaics will require dislocation spacing more than 6 times the cell thickness, or else effective H passivation of the dislocations. © 2011 Elsevier B.V. All rights reserved.

1. Introduction Crystalline silicon dominates the commercial photovoltaic (PV) market today because modules with efficiencies from 14 to 20% are produced at GW scale for below about $1.50 per Watt of noontime power generation capacity ($/W). Silicon is abundant, non-toxic and accepted in the photovoltaic marketplace. There is a highly developed industrial base in all forms of Si and an enormous, rapidly growing body of Si scientific literature. However, Si PV manufacturing costs must be reduced to below $1/W to realize unsubsidized PV deployment at TW scale. Even lower costs are needed to enable cost-effective solar generation of stored electricity or high-density transportation fuels in the future. Nearly one-half of today's module costs are in the wafer: costly steps include producing Si feedstock material from silane or trichlorosilane gas, growing the Si crystals from a melt above 1414 °C, and sawing the wafers. Also, kerf loss of about 50% and challenges handling thin wafers ☆ Employees of the Alliance for Sustainable Energy, LLC, under Contract No. DE-AC3608GO28308 with the U.S. Dept. of Energy, have authored this work. The United States Government retains and the publisher, by accepting the article for publication, acknowledges that the United States Government retains a non-exclusive, paid-up, irrevocable, worldwide license to publish or reproduce the published form of this work, or allow others to do so, for United States Government purposes. ⁎ Corresponding author. E-mail address: [email protected] (H.M. Branz). 0040-6090/$ – see front matter © 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2011.01.335

mean that far more Si is used than is actually needed for light absorption in the cell. It will be difficult to decrease Si photovoltaic costs dramatically without eliminating the wafer as we know it today. However, films of crystalline Si could reach the cost goals by using silane to grow silicon films directly on inexpensive substrates, rather than growing feedstock for wafer production. This approach would leverage the existing crystalline Si (c-Si) and amorphous Si (a-Si:H) industrial infrastructure from PV, displays and computer chips. Ideally, c-Si efficiencies could be obtained for the area cost of a-Si:H panels. Many groups are working to realize film crystalline silicon PV [1–7]. Fig. 1 shows a schematic of our target materials structure for a film crystal silicon photovoltaic device. To reach the required area costs of below $100/m2, the substrate material should cost less than about $25/ m2; the substrate would then contribute less than $0.17/W to the cost of a 15% solar cell. Both display glass and metal foil are candidates. However, the use of these inexpensive materials will limit processing temperatures to below 800 °C, or perhaps only 700 °C. The maximum practical epitaxial temperature will depend upon the time–temperature characteristics of the substrate (e.g., of glass softening or metal bowing), where the time of the deposition is proportional to the cell thickness and inverse to the growth rate. Layer deposition at the lowest temperature that provides good epitaxial Si quality reduces the energy inputs and simplifies the requirements for substrate heating. The seed layer, which provides a crystalline template for growth of photovoltaic-quality crystalline Si, must also be inexpensive. The seed layer will need to meet

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Fig. 1. Schematic of a film crystal silicon photovoltaic device.

all, or at least most, of the following requirements: 1) provide grain size much larger than the target Si layer thickness; 2) present surface orientations that promote good epitaxy, for example the (100) [8]; 3) incorporate a low density of intragrain defects; and 4) contain lowangle or other low-recombination grain boundaries. Several candidate seed layers are under development. Seeds for Si epitaxy could include laser crystallized Si [9,10], metal-induced crystallization layers [1,4], and layer-transfer Si [11]. Seeds for Si heteroepitaxy [12,13] could include oxide layers on crystal-textured metal foil [14,15], and textured oxide layers made by ion-beam assisted deposition [16]. This paper focuses on our efforts to develop hot-wire chemical vapor deposition (HWCVD) silicon as the low-cost epitaxial absorber layer (see Fig. 1) for film silicon PV. The main requirements of the epitaxy are high-quality crystalline structure when grown on the seed layer, high deposition rates (0.3 to 2 μm/min) to minimize capital costs, and growth temperatures below 800 °C for compatibility with candidate low-cost substrates. Electron-beam epitaxy [17–20], electron cyclotron resonance plasma enhanced CVD [21], reactive thermal CVD [22], molecular beam epitaxy [23], and atmospheric pressure plasmas [24,25] have also been used for epitaxy below 800 °C, but HWCVD [26–29] is especially promising because of the high-quality c-Si we have achieved, as well as the high growth rate and demonstrated ease of scaling [30]. Crystalline silicon has an indirect gap and must therefore be made thicker than most thin-film semiconductor absorbers to permit sufficient optical absorption and electron-hole pair generation in the device. Fig. 2a shows the available photons versus wavelength in the AM1.5 solar spectrum (gray) and also the portion of this photon flux absorbed during a single pass through the indicated Si layer thicknesses. We convert the flux into mA/cm2 of PV short-circuit current available per unit wavelength, with the idealized assumptions of a) zero reflection and b) 100% internal quantum efficiency in the device. Of course, any real device would incorporate a back reflector and light trapping to achieve an effective thickness of 2 to 20 times the actual Si thickness. We integrate the photon flux over the entire spectrum of Fig. 2a to calculate the available current density versus effective film thickness, as shown in Fig. 2b. Fig. 2b is consistent with the 42.7 mA/cm2 current density achieved in wafer Si solar cells [31]; the figure also indicates that about 35 mA/cm2 is available from a 5 μm film Si cell with modest 5× light trapping. CSG Solar AG achieved a noteworthy 29.3 mA/cm2 in a mini-module made from 1.85 μm of crystallized a-Si on glass [32], suggesting about 10× light trapping. Although the current density is high, voltage and efficiency of the CSG cell are limited by the 1-μm grain size of the recrystallized film. Our project aims to improve the material quality through the seed/epitaxy approach, while maintaining CSG's excellent light trapping and low materials and processing costs.

Fig. 2. (a) Ideal current density per unit wavelength of the fully-absorbed AM1.5 solar spectrum, compared to one-pass absorption in c-Si of the indicated thicknesses. (b) Ideal current density vs. effective thickness of the c-Si layer from spectral integration of the ideal current density per unit wavelength. Inset is a blow-up of the small thickness results.

Several groups have already demonstrated high PV conversion efficiency on rather thin Si active layers of high material quality fabricated by higher-cost approaches. For example, Kray et al. [33] fabricated a 20.1% cell on a Si wafer thinned down to 37 μm and Van Nieuwenhuijzen et al. [2] deposited 16.1% cells only 20 μm thick by thermal epitaxy at 1130 °C on an annealed porous Si wafer template. With optimized light management, even thinner c-Si layers can be used for cells with efficiency above 15%. 2. Low-temperature HWCVD epitaxy We use Si wafers as a model substrate for demonstrating, studying and optimizing epitaxial growth at temperatures compatible with inexpensive substrates. By HWCVD from pure silane above about 620 °C, we have apparently achieved unlimited epitaxial thicknesses on HF-dipped hydrogen-terminated (100) silicon wafers [34]. At 700 °C, for example, epitaxy continued to 40 μm of growth, before we terminated the experiment. We were also able to grow epitaxially on the more difficult Si (111) surface [34], suggesting that growth on any of the Si crystal orientations is possible. The epitaxial films can be doped either n- or p-type by adding phosphine or diborane gas, respectively [35]. Hall measurements show that all incorporated dopants are activated and that the majority carrier mobility in n-type layers is within 10 to 20% of the dopant-impurity and phonon-scattering limit for crystal Si [35]. We have investigated the phase and epitaxial quality of HWCVD layers on Si across substrate temperatures ranging from about 250 °C to 770 °C, as summarized Fig. 3 [28,29,36]. Below about 550 °C, we deposit an epitaxial Si layer that breaks down to a-Si:H cones [37] before 1 μm of epitaxial Si is deposited, probably because of a buildup of near-surface H [38] or roughness [23]. At substrate temperatures from about 550 to 620 °C, some surface H desorbs and likely leaves an inhomogeneous mixture of mono- and dihydride termination; in this T range, we deposit a random polycrystalline Si layer. At T N 620 °C

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larger than 50 μm. Details of the heteroepitaxy, Si films and solar cells will be reported elsewhere [15]. 3. HWCVD growth rates

Fig. 3. Dislocation density vs. deposition T for HWCVD epitaxy on a H-terminated (100) silicon wafer, with an Arrhenius fit line. All films were grown at 10 mTorr, with SiH4 flows and filament metal indicated in the legend. Approximate boundaries between the unlimited epitaxy, polycrystalline and limited-thickness epitaxial regimes are indicated. Adapted from Ref. [28].

monohydride begins to desorb; we believe that the initiation of good epitaxy everywhere on the wafer surface depends on the H-free surface sites that are created [29]. Unfortunately, these H-free sites can also bind adventitious oxygen in the moments before growth. The interface contamination leads to increased dislocation density in the films. Nearly all dislocations in the films appear to start at the wafer/ epitaxy interface and thread to the top surface. The connection between interface oxygen and dislocation nucleation is suggested both by secondary ion mass spectrometry of the interface oxygen, and by the 3.6 eV activation energy shown in Fig. 3, which roughly equals the measured oxygen desorption energy from the Si (100) surface [29,39]. By raising the growth T above 750 °C, the interface O desorbs before growth and we reduce the dislocation density to about 105 cm−2, despite a system base pressure of only slightly below 10−6 mTorr. These dislocation densities are measured by 2-dimensional electron beam induced current (EBIC) scans of finished devices [40,41]. More recently, we have developed both thermal and chemical growth initiation techniques that further reduce surface O contamination and thereby lower dislocation densities to about 6 × 104 cm−2 [39,42]. In addition to our epitaxial growth experiments on wafers, we have demonstrated sustained epitaxy on seed layers on inexpensive substrates. We deposited epitaxial Si by HWCVD at 670 °C [43] on seed layers made by Al-induced crystallization (AIC) of a-Si:H on display glass (by S. Gall of the Hahn–Meitner Institute, Berlin). An earlier HWCVD epitaxy at 370 °C on AIC silicon seeds resulted in 100nm epitaxial layers before breakdown to a-Si [27]. The AIC c-Si seed layers we used had about 70% (100) grain orientation [20] and a distribution of grain sizes of up to about 10 μm. Electron-beam scattered diffraction (EBSD) suggests that we epitaxially replicated the crystal orientation of the grains, and transmission electron microscopy of cross sections shows that grain boundaries simply propagate into the epitaxial layer [43]. However, EBIC measurements revealed high intragrain dislocation densities, as in epitaxial Si layers grown on AIC seeds by other groups [44,45]. The best model seed layer on display glass should be layertransferred Si; the thin seed is separated from a single crystal wafer and the entire surface is (100). Corning Inc provided us such SiOG® samples [46] for thickening and we obtained good single crystal epitaxy at 700 °C, without significant substrate deformation [47]. Preliminary device results [47] are summarized in Section 3. Finally, in collaboration with Oak Ridge National Laboratory and Ampulse Corp., we have deposited heteroepitaxial HWCVD Si on r-plane (1102) sapphire wafers, on (100) γ-Al2O3 seed layers on strontium titanate (STO) wafers, and on γ-Al2O3 on inexpensive rolling-assisted biaxially-textured (RABiTS) NiW foil. The buffered RABiTS foils were developed as inexpensive substrates for crystalline superconducting wires [48]. The γ-Al2O3 is (100) textured, and virtually all grains are

Typically, we deposit our undoped epitaxial films from a 20 sccm (cm3/min at standard T and pressure) flow (f) of pure silane gas at 10 mTorr pressure (P) [29,34]. However, we have investigated the flow-pressure (f-P) space up to f = 60 sccm and P = 95 mTorr. We usually grow with a W filament at about 2100 °C held 5 cm from the substrate. Growth chemistry under our typical conditions involves decomposition of the SiH4 into its constituents on the filament surface, followed by desorption of Si and H atoms that initiate growth radical formation reactions involving the SiH4 in the gas phase [49,50]. We found that epitaxy quality below 400 °C is improved by the use of a Ta filament at 1800 °C, but with a reduction of the growth rate [29,51]. There is no evident beneficial effect of the Ta filament on epitaxy above 620 °C. Growth near 10 mTorr is primarily from Si2H2 radicals formed when Si atoms coming from the filament react with SiH4 before reaching the substrate [50]. However, we also obtain epitaxial films at 2 mTorr where growth is directly from Si atoms which reach the surface without colliding with SiH4 molecules [52]. Thus, epitaxial layer formation appears to be substantially independent of the identity of the impinging growth species. High epitaxial deposition rates are essential if film crystal Si is to be deposited at low cost for photovoltaics. To understand the factors controlling deposition rate from radicals (R), we developed and tested a comprehensive model of R that accounts for gas–filament and gas– substrate interactions [52]. We validated the model by measuring growth rates that span epitaxial, polycrystalline and amorphous Si layer phases and by measuring the silane gas depletion fraction, D, with a residual gas analyzer (RGA) during selected layer growth. A correction for the well-understood thermal CVD component of the growth rate is needed. This model has helped us to reach an epitaxial deposition rate of 300 nm/min and to design methods to increase R further. Our model [52] begins by expressing the silane depletion, D, as a function of the dissociation probability of silane on the hot wire, the wire surface area, the gas T and P, the number of silicon atoms in the primary growth radical, and the easily-measured volumetric pumping speed of silane. We then show that R = sGfD, where s is the sticking coefficient and G is a geometric factor containing the wire length, the wire-substrate distance and the crystal Si density. Fig. 4 shows how well our model agrees with the dependence of growth rate on f, at 10 mTorr silane pressure with two W filaments. For excellent agreement, the roughly 10% of growth from silane by thermal CVD (proportional to the fraction of unreacted SiH4) must be added to R, as in Fig. 4. We emphasize that there are no fitting parameters used to calculate the model curves in Fig. 4; all inputs to the model are determined either from our own experiments or from measured literature values. At low flows the growth rate is proportional to f because the gas is highly depleted of silane by decomposition at the hot filament and by gas phase reactions. At high flows, however, the silane is undepleted and the growth rate is independent of f; here, the wire area, P and wire T determine R. Our preferred conditions for epitaxy (20 sccm and 10 mTorr) correspond to D ~ 0.5, ensuring simultaneously high gas utilization and high growth rate. The model allows us to simulate R over a wide range of f and P and comparisons to rates measured with a single filament and at high and low pressure are published elsewhere [52]. To increase R, one must increase f while maintaining high D, by increasing the filament area and/or P. By raising the SiH4 pressure and growing with two W wires, we have achieved epitaxial rates as high as 300 nm/min [53]. Although the model describes growth up to 20 mTorr very accurately, it overestimates the growth rate by as much as a factor of two near 80 mTorr. This is likely due to formation of

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Fig. 4. Deposition rate of epitaxial Si films vs silane flow rate at 10 mTorr from 2 W filaments, at a substrate T of 750 °C. Red curve is the modeled radical rate; blue dotted curve is the thermal CVD rate; purple dotted curve is the total growth rate modeled with all parameters determined from experiment. Schematic diagrams indicate the fully depleted and undepleted growth regimes, with black arrow size suggesting the magnitude of gas flows. Adapted from Ref. [51].

higher silane radicals with low sticking coefficients or even nanoparticles in the gas phase [52], though saturation of dissociation sites on the wire [54] may also reduce the rate. Finally, we confirm the linear dependence of R on fD which, once D is known, permits us to determine radical sticking coefficient on the growing surface [52]. We found the temperature dependence s(T) from R(T), with D obtained either by direct RGA measurement or by model calculation using the known silane dissociation probability [55] on the filament. Our measurements [52] of the substrate T dependence of growth rates at 10 mTorr show that s(T) for the growth radical, Si2H2, increases from about 0.6 to unity as the substrate T increases from 400 °C to about 600 °C. Most likely, high surface H coverage impedes attachment of radicals at the lower T.

20 μm, despite the silicon indirect gap. Therefore, excellent light trapping and a high-quality back reflector must be incorporated in addition to the anti-reflective coating. Finally, there must be a low-cost approach to reaching both surfaces of the cell with a low series resistance contact scheme [5] without greatly reducing the active cell area; the best approach will likely depend upon the substrate and seed layer used. We have grown HWCVD epitaxial solar cells with 1- to 10-μm absorber layers to 1) test the epitaxial quality; 2) better understand the Si materials required for good carrier collection; and 3) prototype film crystal Si devices on seed layers on inexpensive substrates. A Fig. 5 inset shows a schematic of model solar cells we fabricate by HWCVD epitaxy on ‘dead’ Si wafers. The substrate wafers are doped n++ to 1019 cm−3 with As; the wafers form a good back surface field, but contributes only about 1 mA/cm2 of short-circuit current (Jsc) due to a hole diffusion length that is limited to about 1 μm by Auger recombination. The nepitaxial absorber layer is lightly doped with P. We then deposit a HWCVD i/p heterojunction a-Si:H emitter followed by an indium-tinoxide transparent conductor top contact layer. Next, 5-mm2 cells are mesa isolated by photolithography, chemical etch of the protected ITO, and reactive ion etching of the a-Si:H and epitaxial absorber. Finally, we form a back contact by metal evaporation on the back of the n++ wafer. For devices on seeds on glass, we stop the mesa etch in the n+ back surface field layer and make a metal ‘back contact’ that rings the cell. More details of device fabrication are given elsewhere [40,47]. Fig. 5 shows the internal quantum efficiency versus wavelength (λ) of a 2.5 μm-thick epitaxial absorber device deposited at 760 °C onto a ‘dead’ n++ wafer. The solar cell is 6.7% efficient, with 0.55 V open-circuit voltage (Voc), nearly 18 mA/cm2 of Jsc and a fill factor above 0.68. The dashed curve shows the fraction of photons absorbed in a single pass through the absorber, for reference. It is clear that carrier collection from the bulk is very good; between 600 and 1000 nm, QE(λ) slightly exceeds the photon absorption fraction in the absorber because of the small amount of collection from the n++ wafer (vide supra). Devices on non-wafer substrates will also collect this small amount of current from photocarriers generated outside of the absorber layer, because all seed layer devices will incorporate a heavily-doped epitaxial back surface field layer. The good red collection is consistent with the relatively high Voc we obtained. However, the absolute QE suffers from the lack of a back reflector or light trapping in the test cell. Further, the weak blue response suggests excessive absorption in our heterojunction emitter layers; the same

4. Epitaxial film crystal silicon devices There are many technological challenges to address to make film crystal silicon solar cells with conversion efficiencies above 15%. First, the seed layer and the Si epitaxy upon it must be high quality so that photogenerated minority carriers can reach the collecting surfaces without recombining. Fortunately, thin cells are more tolerant of defects and impurities than are thicker wafer cells [40]; minority carriers simply have less probability of encountering a recombination center in their random walk to the collecting contact. For example, our measurements and modeling show that threading dislocations 20 μm apart do not significantly impact the performance of our 2-μm test cells with opencircuit voltage of 0.57 V, though this dislocation spacing would be unthinkable in conventional 200-μm wafer cells. We confirm a similar tolerance for impurities in our film c-Si devices. Second, since a high proportion of photocarriers are generated near surfaces, both top and bottom surfaces must be extremely well passivated. We normally deposit the absorber on a highly doped layer to create a back surface field that repels minority carriers, and fabricate a low-recombination silicon heterojunction emitter [56] at the front surface. Third, it is also important to reduce the density of highly-conducting defects that can shunt the thin absorber and limit the voltage [41]. Fourth, cost considerations will likely limit the absorber layer thickness to 2 to

Fig. 5. Internal quantum efficiency of a 6.7%-efficient film c-Si cell compared to the photon fraction absorbed in one pass through the 2.5-micron thick absorber layer. Between 600 and 1000 nm, QE(λ) slightly exceeds the photon absorption fraction in the absorber because of a small amount of collection from the n++ wafer, as discussed in text. Lower left inset is a schematic of the device structure. Right inset is an EBIC intensity map showing less than 105 cm-2 recombination-active defects in the device.

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amount of parasitic emitter absorption reduces current collection more dramatically in thin c-Si with no light trapping than in wafer cells. An imperfect epitaxial layer surface may also cause deleterious defect formation at the heterointerface which reduces the blue response. The right inset to Fig. 5 shows an EBIC map of this solar cell. Dark spots correspond to local strong recombination centers; electron microscopy shows that these are mainly threading dislocations. The device has slightly less than 105 cm−2 dislocations. We have also fabricated semitransparent solar cells from a 2.5-micron thick epitaxial HWCVD absorber layer grown on the Corning SiOG layer on display glass (see Section 2). The best voltage yet achieved is Voc of 0.46 V in a cell with efficiency of 4.8% [47]. By varying the HWCVD epitaxy temperature, we fabricated, measured, analyzed and modeled a series of 2-micron thick devices on ‘dead’ wafers with dislocation densities ranging from 105 to 2 × 106 cm−2 [40]. The best of these epitaxial cells had Voc of 0.57 V. The minority carrier diffusion length in our devices was closely equal to one-half the dislocation spacing [40]. In other words, the recombination lifetime (τ) is dominated by dislocations and the photogenerated carriers recombine at the first dislocation they encounter. Our results suggest several design guidelines for film crystal Si solar cells with recombination-active dislocations [40], including the following: Since diffusion lengths must be about 3 times the cell thickness to ensure that photocarriers reach the collecting contacts before recombining, the dislocation spacing must be about 6 times the cell thickness, d. We used no hydrogenation on these cells, though other film Si solar cells clearly benefit from both rapid thermal annealing to reduce intragrain defect density and hydrogen passivation [20,57]. Our recent work suggests we can improve some HWCVD epitaxial cells by hydrogenation treatments [47]; we have not yet determined whether hydrogenation permits significantly higher dislocation densities. Our analysis suggests that despite a base pressure slightly below 10−6 mTorr in our HWCVD reactor, bulk impurities in the epitaxial absorber do not limit our solar cell performance [40]. This analysis centers on the likelihood that a photogenerated minority carrier can reach the emitter surface. Because minority carriers take a random walk after photogeneration, the carrier diffusion length scales as τ1/2. If τ is inversely proportional to impurity (or other point defect) density, the maximum tolerable impurity density will scale as d−2 [40]. Considering the metal impurity concentrations known to degrade performance of wafer Si solar cells [58], we estimate that even such highly recombination-active impurities will not harm a 2micron cell until levels above 1017 cm−3 are reached. Therefore slow evaporation of W or Ta atoms from the hot filament during epitaxy is not a significant problem for the solar cells. The Voc of our best devices are 20–30 mV below the value predicted by PC1D modeling with carrier lifetime based only upon dislocation density [40]. Near-field scanning optical microscopy reveals that sparse shunt defects leave an inverted pyramidal pit at the epitaxial layer surface [41]. These shunts likely limit the voltage of cells that have dislocation densities below 105 cm−2. Transmission electron micrographs of these pyramidal defects reveal partial dislocations and stacking faults which originate in a region of low density at the wafer/ epitaxy interface [41]. We expect further improvements in interface cleanliness and epitaxy starting conditions to reduce these shunt defects and improve the cells. 5. Conclusions HWCVD is a promising technique for epitaxial Si deposition on seed layers on inexpensive substrates for photovoltaics. We deposit high-quality undoped, n- and p-type layers at up to 300 nm/min. Our comprehensive deposition rate model is very successful at describing our epitaxial growths and suggests that much higher epitaxial deposition rates are possible. With small modifications, the model

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can be applied to HWCVD growth of any material in any deposition system. We have grown epitaxial layers on ‘dead’ wafers, seed on display glass and oxide-coated textured metal foil and have begun to fabricate prototype devices. Analysis and modeling of these devices enable us to define material quality requirements for film Si photovoltaics. The considerable challenge of developing highly crystalline seed layers on inexpensive substrates is being addressed in many laboratories; improved crystalline seed layers will be critical to success of the technology. Acknowledgements The authors are grateful to many superb NREL scientists for years of measurement and characterization support, as reflected in many of our publications cited above. In particular, we thank Bobby To for scanning electron microscopy, Yanfa Yan and Kim Jones for transmission electron micrographs that enabled us to optimize epitaxy, and Robert Reedy for secondary ion mass spectrometry measurements of dopant densities. Anna Duda, Eugene Iwaniczko and Lorenzo Roybal of NREL contributed their expertise and time to fabrication of PV devices. We also thank collaborators who provided seed layers, including Stefan Gall (CSG Solar, formerly of Hahn–Meitner Institute, Berlin); Ta-Ko Chuang and Eric Mozdy of Corning Inc.; Parans Paranthaman, Lee Heatherly, Fred List, Claudia Cantoni, Kyunghoon Kim and others at Oak Ridge National Laboratory; and Tom Fanning, Jon Bornstein and Paul Schroeter of Ampulse Corp. This work is primarily funded by the U.S. Department of Energy (DOE) Office of Energy Efficiency and Renewable Energy's Solar Energy Technologies Program under DOE Contract No. DE-AC36-08GO28308. Work on RABiTS substrates was funded by a DOE Technology Commercialization and Development Fund grant and by Ampulse Corporation. References [1] I. Gordon, L. Carnel, D. Van Gestel, G. Beaucarne, J. Poortmans, Prog. Photovoltaics 15 (2007) 575. [2] K. Van Nieuwenhuysen, M. Payo, I. Kuzma-Filipek, J. Van Hoeymissen, G. Beaucarne, J. Poortman, Thin Solid Films 517 (2010) S80. [3] A.G. Aberle, J. Cryst. Growth 287 (2006) 386. [4] S. Gall, C. Becker, E. Conrad, P. Dogan, F. Fenske, B. Gorka, K.Y. Lee, B. Rau, F. Ruske, B. Rech, Sol. Energy Mater. Sol. Cells 93 (2009) 1004. [5] M.A. Green, P.A. Basore, N. Chang, D. Clugston, R. Egan, R. Evans, D. Hogg, S. Jarnason, M. Keevers, P. Lasswell, J. O'Sullivan, U. Schubert, A. Turner, S.R. Wenham, T. Young, Sol. Energy 77 (2004) 857. [6] R.B. Bergmann, T.J. Rinke, Prog. Photovoltaics 8 (2000) 451. [7] R.B. Bergmann, J.H. Werner, Thin Solid Films 403 (2002) 162. [8] J. Platen, B. Selle, I. Sieber, S. Brehme, U. Zeimer, W. Fuhs, Thin Solid Films 381 (2001) 22. [9] G. Andra, J. Bergmann, F. Falk, Thin Solid Films 487 (2005) 77. [10] A.T. Voutsas, A. Limanov, J.S. Im, J. Appl. Phys. 94 (2003) 7445. [11] I. Gordon, S. Vallon, A. Mayolet, G. Beaucarne, J. Poortmans, Sol. Energy Mater. Sol. Cells 94 (2010) 381. [12] C.W. Teplin, D.S. Ginley, H.M. Branz, J. Non-Cryst. Solids 352 (2006) 984. [13] H.J. Xiang, J.L.F. Da Silva, H.M. Branz, S.H. Wei, Phys. Rev. Lett. 103 (2009) 116101. [14] J. Shin, A. Goyal, S.-H. Wee, Thin Solid Films 517 (2009) 5710. [15] C.W. Teplin, M.P. Paranthaman, T.R. Fanning, K. Alberi, L. Heatherly, S.H. Wee, K. Kim, F.A. List, J. Pineau, J. Bornstein, K. Bowers, D.F. Lee, C. Cantoni, S. Hane, P. Schroeter, D.L. Young, E. Iwaniczko, K.M. Jones, H.M. Branz, submitted for publication. [16] A.T. Findikoglu, W. Choi, V. Matias, T.G. Holesinger, Q.X. Jia, D.E. Peterson, Adv. Mater. 17 (2005) 1527. [17] L. Oberbeck, J. Schmidt, T.A. Wagner, R.B. Bergmann, Prog. Photovoltaics 9 (2001) 333. [18] B. Gorka, P. Dogan, I. Sieber, F. Fenske, S. Gall, Thin Solid Films 515 (2007) 7643. [19] J. Schwarzkopf, B. Selle, W. Bohne, J. Rohrich, I. Sieber, W. Fuhs, J. Appl. Phys. 93 (2003) 5215. [20] P. Dogan, E. Rudigier, F. Fenske, K.Y. Lee, B. Gorka, B. Rau, E. Conrad, S. Gall, Thin Solid Films 516 (2008) 6989. [21] G. Ekanayake, T. Quinn, H.S. Reehal, B. Rau, S. Gall, J. Cryst. Growth 299 (2007) 309. [22] A. Minowa, M. Kondo, Jpn. J. Appl. Phys. 49 (2010) 50207. [23] D.J. Eaglesham, J. Appl. Phys. 77 (1995) 3597. [24] Y. Mori, K. Yoshii, H. Kakiuchi, K. Yasutake, Rev. Sci. Instrum. 71 (2000) 3173. [25] H. Ohmi, H. Kakiuchi, N. Tawara, T. Wakamiya, T. Shimura, H. Watanabe, K. Yasutake, Jpn J. Appl. Phys. 1 Regular Pap. Brief Commun. Rev. Pap. 45 (2006) 8424. [26] C.E. Richardson, K. Langeland, H.A. Atwater, Thin Solid Films 516 (2008) 597.

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