Microelectronic Engineering 88 (2011) 1560–1563
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Improved electrical characteristics and reliability of Ge MOSFET device with nitrided high-k gate dielectric by plasma immersion ion implantation Chung-Hao Fu a, Kuei-Shu Chang-Liao a,⇑, Wei-Hao Tseng a, Chun-Chang Lu a, Tien-Ko Wang a, Wen-Fa Tsai b, Yu-Chen Li b, Chi-Fong Ai b a b
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 30013, Taiwan, ROC Physics Division, Institution of Nuclear Energy Research, Taoyuan, Taiwan, ROC
a r t i c l e
i n f o
Article history: Available online 29 March 2011 Keywords: High-k gate dielectric Ge MOS Nitridation treatment Plasma immersion ion implantation
a b s t r a c t MOSFET devices with Ge channel and nitridation treatment using plasma immersion ion implantation (PIII) are studied in this work. Experimental results show that the electrical characteristics and reliability of Ge MOSFETs can be significantly improved by PIII nitridation. For instance, the mobility of device with 3 nm Si cap after PIII nitridation is enhanced by about 20%. Although the driving drain current of sample with a thinner Si cap is higher, its reliability property is worse. Regarding the effects of energy in PIII nitridation, the electrical characteristics of the sample with 2 keV are better than that with 1.5 keV. Ó 2011 Elsevier B.V. All rights reserved.
1. Introduction
2. Experiment
As the gate oxide thickness of MOS devices becomes thinner, the high-k gate dielectric has been proposed to replace SiO2 or SiON for nano-scale MOS device applications [1]; however, a reduction in channel mobility is also encountered [2]. A promising approach to solve this issue is to alternate Si channel with high mobility material like Ge, which can offer twice higher electron mobility and four times higher hole mobility than Si [3]. Yet, high-k gate dielectric and the substrate with high Ge content are facing some challenges for high performance [4]. The electrical characteristics of high-k dielectric are severely degraded due to Ge out-diffusion from channel. Fortunately, the incorporation of nitrogen into high-k material can suppress the inter-diffusion of element after high temperature process [5]. Recently, plasma immersion ion implantation (PIII) is becoming a favorable technique for dopant incorporation [6,7]. The sample to be treated by PIII is placed in a vacuum chamber where RF of microwave plasma is created containing ions of the species to be implanted [8]. PIII possesses several advantages such as high-dose, shallow depth, low damage, and precise depth. Although some effects of incorporating nitrogen into hafnium oxide by PIII on electrical and physical characteristics of MOS devices with Si and Si0.7Ge0.3 channel have been studied [9–11], those with pure Ge channel are not yet reported. In this work, the effects of Si cap thickness in Ge channel and the energy applied in nitridation treatment using PIII on the electrical characteristics of MOSFETS are investigated.
The MOS capacitors were fabricated on (1 0 0)-oriented 6-in N-type Si wafer with resistivity of 1–10 X-cm. After RCA clean, a pseudomorphic Ge layer was epitaxially grown by a UHV/CVD with GeH4 precursors. Then, a Si capping layer of 3–7 nm was epitaxially grown. A 1.5 nm thick HfO2 and 2.5 nm thick HfAlO were deposited by an atomic layer deposition (ALD). Then, a 50 nm thick TaN film was deposited by a sputtering to serve as the metal gate. After metal gate deposition, PIII nitridation was applied at ion energies of 1.5 or 2 keV for 10 min. Subsequently, an anneal is performed to activate the implants at 600 °C for 30 min in N2.
⇑ Corresponding author. Tel.: +886 3 5742674. E-mail address:
[email protected] (K.-S. Chang-Liao). 0167-9317/$ - see front matter Ó 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2011.03.071
3. Results and discussion Fig. 1 shows the drain current (Id) versus gate voltage curves of Ge MOSFET with Si cap from 3 to 7 nm. Samples with thinner Si cap show higher Id because more carriers can transport in the Ge channel. Fig 2 shows the transconductance (Gm) and the subthreshold swing (SS) of Ge MOSFETs with Si cap from 3 to 7 nm. For samples with thinner Si cap, the Gm value is larger since more carriers can transport in the Ge channel; however, SS is also larger due to more serious Ge diffusion. The electron mobility curves of MOSFETs with various Si-cap thicknesses are shown in Fig. 3. The mobility is higher with decreasing the Si cap thickness. This is because more carriers are distributed in the Ge channel [12]. Fig. 4 shows the Gm degradation of MOSFETs with various Si caps after a channel hot carrier (CHC) stress at Vd = 5.5 and Vg = 3 V. The Gm degradation is reduced with a thicker Si cap.
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Fig. 1. Id versus gate voltage of Ge MOSFET with Si cap from 3 to7 nm. Fig. 4. Gm degradation of Ge MOSFETs with Si cap from 3 to 7 nm after a CHC stress at Vd = 5.5 and Vg = 3 V.
Fig. 2. Gm and S.S. of Ge MOSFETs with Si cap from 3 to 7 nm.
Fig. 5 shows drain current (Id) versus gate voltage curves for MOSFETs with various PIII nitridation treatments. It is found that the driving current can be significantly enhanced by a PIII nitridation treatment, which may be due to the larger gate capacitance. Since the additional interfacial layer (IL) at high-k/substrate is reduced by nitridation treatment [5], the EOT is reduced and thus increases the gate capacitance. Fig 6 shows Gm and SS for Ge MOSFETs with various Si cap thicknesses and PIII nitridation treatments. For samples with PIII
nitridation treatment, both Gm and SS are improved since the diffusion of Ge is suppressed. Fig. 7 shows the mobility for Ge MOSFETs with various Si cap thicknesses and PIII nitridation treatments. For the sample with 3 nm Si cap and a PIII nitridation
Fig. 3. Electron mobility as a function of the inversion concentration of Ge MOSFETs with Si cap from 3 to 7 nm.
Fig. 6. Gm and S.S. of Ge MOSFETs with 3 or 7 nm Si cap thicknesses and PIII nitridation treatments.
Fig. 5. Id verus gate voltage of Ge MOSFETs with 3 or 7 nm Si cap thicknesses and PIII nitridation treatments at ion energy of 2 keV.
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Fig. 7. Electron mobility as a function of the inversion concentration in Ge MOSFETs with 3 or 7 nm Si cap thicknesses and PIII nitridation treatments.
Fig. 10. Gm degradation of Ge MOSFET with PIII nitridation at ion energies of 1.5 or 2 keV after a CHC stress at Vd = 5.5 and Vg = 3 V.
more stable than the Hf–O [13,14]. Besides, the Hf–N bond would also suppress the formation of Hf–Ge–O [5,11]. Fig. 9 shows the mobility of Ge MOSFETs without and with PIII nitridation treatment at 1.5 and 2 keV, respectively. The highest mobility is obtained for the sample after a PIII nitridation at 2 keV. Fig. 10 shows the Gm degradation for various Ge MOSFETs after CHC stress. The reliability is best enhanced by a PIII nitridation at ion energy of 2 keV. The results of Figs. 9 and 10 suggest that an ion energy of 1.5 keV is not enough to obtain adequate incorporation of N into dielectric, and most N atoms are just incorporated in the metal gate [10]. Besides, the electrical characteristics of Ge MOSFET are not degraded after PIII at ion energy of 2 keV. Since PIII-induced damage is not observed for Ge MOSFET, a higher implantation energy and dose should be studied in the future work. Fig. 8. Gm degradation of Ge MOSFET with various Si cap thicknesses and PIII nitridation after a CHC stress at Vd = 5.5 and Vg = 3 V.
4. Conclusions In this work, high mobility and drain current are achieved for Ge MOSFETs with a thinner Si cap. The mobility and reliability of Ge MOSFETs can be significantly improved by a PIII nitridation treatment at 2 keV ion energy. Acknowledgments The authors would like to thank The National Science Council of Taiwan, The Republic of China (R.O.C.) for financially supporting this research. The technical supports from National Nano Device Laboratories (NDL) of Taiwan, R.O.C. and Institute of Nuclear Energy Research of Taiwan, R.O.C., are also acknowledged. References
Fig. 9. Electron mobility as a function of the inversion concentration in Ge MOSFET after PIII nitridation at ion energies of 1.5 or 2 keV.
at 2 keV, the mobility enhancement is about 20%. This is because there are fewer oxide traps existed in the gate dielectric, and thus the effect of phonon scattering from the dielectric is smaller. Fig. 8 shows the Gm degradation for Ge MOSFETs with various Si cap thicknesses and PIII nitridation treatments after CHC stress. The Gm degradation is suppressed by using a PIII nitridation treatment because the Hf–N bond formed by the nitridation treatment is
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