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Impurity diffusion from uncoated foreign substrates during high temperature CVD for thin-film Si solar cells
Solar Energy Materials & Solar Cells 61 (2000) 301}309
Impurity di!usion from uncoated foreign substrates during high temperature CVD for thin-"lm Si solar cells G. Beaucarne!,*, S. Bourdais", A. Slaoui", J. Poortmans! !IMEC vzw., Kapeldreef 75, B-3001 Leuven, Belgium "Laboratoire CNRS-PHASE, 23 rue du Loess, F-67037 Strasbourg, France Received 20 August 1999
Abstract In this paper, we study the di!usion of impurities from three types of foreign substrates (graphite, alumina and mullite) during thermal chemical vapour deposition (CVD) of a polycrystalline Si "lm. For this we use a rapid thermal CVD (RTCVD) system and characterization techniques such as secondary ion mass spectroscopy (SIMS) and deep level transient spectroscopy (DLTS). Results show that, in the case of materials like graphite, metallic contaminants can freely outdi!use into the deposited layer and the environment. In contrast, the ceramic substrates release only a very limited amount of contaminants during the CVD process, making the need of a di!usion barrier much less severe. ( 2000 Elsevier Science B.V. All rights reserved. Keywords: Thin-"lm crystalline Si solar cells; Impurity di!usion; Di!usion barrier; Ceramic substrates
1. Introduction In the last few years, there has been considerable research e!orts in the "eld of thin-"lm crystalline Si solar cells, because they have the potential of delivering good performance at a low cost. Low-temperature approaches have yielded promising results [1,2], but process speed is seen as a problem. A lot of e!ort is now being put
* Corresponding author. E-mail address: [email protected] (G. Beaucarne) 0927-0248/00/$ - see front matter ( 2000 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 7 - 0 2 4 8 ( 9 9 ) 0 0 1 1 8 - X
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into increasing the growth rates to make a high throughput process possible. Hightemperature approaches do not su!er from low growth rates and might eventually turn out to be more attractive in spite of their higher costs. An important question with these approaches is whether impurities from the substrate can migrate to the active layer. It is well documented that many impurities have detrimental e!ect on the performance of Si solar cells. In particular, most metallic impurities start to be harmful already at trace concentrations [3]. When we deposit Si at high temperature on a foreign material, an important concern is therefore the possible contamination of the layer by solid state di!usion of impurities from the substrate. These contaminants can either be elements from the main components of the substrate material or other species present as impurities in the material. In order to avoid such contamination, research groups have been developing intermediate layers, the so-called di!usion barriers, which are meant to con"ne impurities in the substrate during high-temperature steps. The materials that have been studied include borosilicate glass [4], LPCVD silicon nitride in combination with spin-on silicon oxide [5], PECVD oxide [6], PECVD oxynitride [7] and silicon carbide [8]. In the latter reference, it was shown that the amount of impurities that can escape from a graphite substrate encapsulated in SiC is very small if not negligible, even when a very high-temperature treatment like ZMR is applied. However, it is preferable to avoid using a di!usion barrier. The layer deposition is an additional step which makes the process more expensive and time-consuming, e!ectively increasing the substrate cost. In this study we investigate the di!usion of contaminants from foreign substrates without any coating during chemical vapour deposition. Such information is useful when we have to assess the need of a barrier layer and how to design it.
2. Experimental In order to check whether impurities indeed migrate into Si during CVD growth, following contamination experiments have been carried out. Foreign substrates are placed on monocrystalline Si wafers in a rapid thermal chemical vapour deposition (RTCVD) reactor (Jipelec) and are subjected to a typical CVD cycle with following parameters: f temperature: 10503C or above f deposition time: 5 min deposition f gas #ow: 3 g TCS (trichlorosilane)/min diluted in 3 slm H . 2 Both the carrier Si wafer and the layer deposited on the substrate are subsequently analyzed with secondary ion mass spectrometry (SIMS) and in some cases with deep level transient spectroscopy (DLTS). These complementary techniques can provide crossed information, respectively, on the elements that have e!ectively di!used, and on their recombining activity in the deposited silicon.
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3. Results and discussion 3.1. Graphite The graphite substrates used in these experiments are commercial high purity substrates from Le Carbone (2123 PT). Although these substrates are among the purest available on the market, they still contain signi"cant concentrations of impurities. The composition provided by the manufacture indicates between 1}5 ppm Fe and Ca, and other elements like Al and B in concentrations below 1 ppm. The main impurities Fe and Ca are present in concentrations that are dangerously high for electronic devices. The concentration pro"les for various impurities as determined by SIMS in the carrier wafer are shown in Fig. 1. Fe does not appear as such in this graph, but its presence is indicated by the concentration of its 54 isotope, present in natural iron with a concentration of 5 at%. The impurity concentrations show typical di!usion pro"les. As expected, Fe and Ca are the most abundant contaminants, with peak concentrations above 1017 cm~3. Because of the relatively low thermal budget of the process used in this experiment, the pro"les extend to only about 1 lm below the carrier wafer surface (within the detection limit allowed by SIMS). Fig. 2 shows the Ca and Al pro"les in the deposited layer itself. Whereas Al is showing no di!usion pro"le, staying at a constant concentration of about 1015 cm~3, there is a steep pro"le of Ca, peaking at the interface at about 3]1017 cm~3. Note that the Ca di!usion is deeper in the layer than in the carrier wafer (more than 2 lm). This can be attributed to the closer intimacy between the graphite substrate and the layer, but is also expected from the higher di!usion coe$cient along grain boundaries in a polycrystalline material.
Fig. 1. Concentration pro"les of various impurities in the carrier wafer after CVD deposition on graphite.
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Fig. 2. Concentration pro"les of Ca and Al in the Si layer deposited on graphite.
The conclusion of this paragraph is that a substantial amount of impurities di!use out of non-coated graphite substrates during chemical vapour deposition of a Si layer, even in the case of highly pure graphite. A di!usion barrier is therefore needed to prevent this process, but this adds up to the substrate costs. 3.2. Alumina (microcrystalline Al2 O3 ) There are several types of alumina materials, which are used for di!erent applications. Even the purest types contain large amounts of impurities compared to concentrations considered acceptable in electronic Si devices. However, since aluminas are oxygen-based materials, di!usion within such ceramics is very low [9]. The alumina material used in these experiments, Coors ADS996 contains various oxides like SiO , Fe O , CaO, MgO and Na O. Some of these oxides, like MgO have 2 2 3 2 been added on purpose during substrate preparation in order to ease the sintering process. The concentration of Fe is about 50 ppm Fe and that of Mg is more than 700 ppm. The concentration pro"les, shown in Fig. 3, give constant background values indicating that the in-di!usion of impurities from the alumina substrate has led to contaminant impurities below the detection level of SIMS. Fig. 4 shows the concentration of Al in the deposited Si layer as a function of depth. A prominent feature of this graph is the very high peak in the area of the interface between the Si layer and the substrate. This could be construed as a large presence of Al, for instance in an alloyed Si}Al region. However, SRP measurements (Spreading Resistance Pro"lometry) show no such region with very low resistivity close to the interface. We therefore conclude that this peak is an artefact of the SIMS measurement, which does not correspond to a physical reality. In the bulk of the layer, Al atoms are present with a density of about 1016 cm~3 or lower. This is probably due to the auto doping e!ect, which is well known in studies of the SOS technology (Silicon On Sapphire). SOS is one of the earliest forms of silicon on insulator (SOI) technology, which involves using sapphire
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Fig. 3. Concentration pro"les of various impurities in the carrier wafer after CVD deposition on alumina.
Fig. 4. Concentration pro"les of Al in the Si layer deposited on alumina.
(monocrystalline Al O ) to grow thin monocrystalline Si layers epitaxially on an 2 3 insulator for high performance electronic circuits. In the SOS literature, auto doping is attributed to the reaction 2 Si(s)#Al O (s)PAl O(g)#2 SiO(g), 2 3 2 which can take place when the gaseous intermediate aluminum oxide can escape, i.e. when the substrate is still not completely covered by Si [10]. Note that Al gets incorporated in the layer from the gas phase and does not result from solid state di!usion. Other tests with thicker layers have shown a similar e!ect, with an average
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Fig. 5. DLTS in Si sample on alumina substrate and thermally heated at 12003C during 2 min under nitrogen.
concentration of about 5]1015 cm~3. Taking the massive amount of Al in the substrate into account, auto doping can be considered a small e!ect. Although we have not detected any impurity in the carrier wafer with SIMS, this does not mean that no contamination at all has occurred. Very low concentrations may be present, but those can only be measured with a very sensitive technique. DLTS can o!er this possibility but it is unable to give the chemical signature of the detected point defect unless one expects speci"c impurities. We have applied it in the case of alumina. A piece of monocrystalline Cz}Si (boron doped at 6.5]1015 cm~3) has been put on an alumina substrate (Coors Superstrate, very close in composition to the ADS996 material) and annealed in the RTCVD reactor at 12003C during 2 min under N . After a short surface etch, a Schottky diode has been made by evaporation and 2 the DLTS measurements have been carried out. Fig. 5 gives the DLTS spectrum plotted at an emission rate of 80 s~1. It exhibits two peaks, one at around 184 and the other at 252 K. Although an extensive study has not been done on these samples, we can speculate that the observed traps are related to contamination by Mg [11]. A rough estimation of the Mg concentration from the amplitude of the detected peaks yields a concentration in the range of 5]1012}1]1013 cm~3. The reason for the low contamination level of the carrier wafers and the Si layer from alumina substrates is that all impurities are present under oxide form. Al O in 2 3 particular is a very stable oxide, with a standard free energy of formation of !830 kJ/mol at 11003C, which is more stable than quartz (!620 kJ/mol at 11003C). Iron oxide is less stable and gets reduced in three steps to metallic Fe. FeO, the last
G. Beaucarne et al. / Solar Energy Materials & Solar Cells 61 (2000) 301}309
307
intermediate oxide in the reduction of Fe O , has a standard free energy of only 2 3 !170 kJ/mol at 11003C. According to thermodynamics, a substantial amount of Fe atoms should appear in metallic form, as the FeO}H system tends to a H O partial 2 2 pressure (pH O/pH "5]10~6 at 11003C in equilibrium) which is larger than the input 2 2 water content of the gas #ow. The presence of chlorinated species is an additional driving force for the oxide decomposition. However, several factors can prevent the formation of metallic Fe. It is known that FeO forms a spinel phase with Al O , 2 3 which is more stable than FeO [12]. Moreover, the iron oxide molecules are embedded in a matrix of the stable Al O oxide. In order to reduce them to Fe atoms, 2 3 H molecules need to di!use through this dense material, and the reaction products 2 (Fe, H O, and O ) also have to di!use back through the alumina matrix to reach the 2 2 surface. Thus, we attribute the low level of contamination level in the case of alumina to the moderate thermodynamical driving force due to the stability of the main components, and to the presence of several kinetic barriers against reduction and di!usion. It should be noted that this conclusion is valid only for the temperature range that has been investigated here. In their study of laser-beam melt and crystallization (LMC) Si layers on alumina (temperature '¹ "14153C), Ishii et al. observed .%-5 that the Al concentration was 5]1017 cm~3 in the laser crystallized layers if no special precaution was taken [5]. A di!usion barrier was necessary to reduce this concentration to 1016 cm~3. Another important remark is that the contamination behaviour observed here is for a relatively pure alumina material which has been developed for electronic thin-"lm applications. For photovoltaic applications where cost is of prime importance, less pure materials are likely to be used. Some preliminary experiments with very cheap alumina substrates (containing more than one 1 at% of Fe and brown in colour) have led to substantial contamination, visible with the naked eye. However, this is another extreme case. Materials especially developed for photovoltaics will have an intermediate impurity levels (in the order of 0.1%). Additional investigation on the contamination behaviour with this type of materials is needed.
3.3. Mullite Mullite is a ceramic material similar to alumina. It consists of a solid state solution of two stable oxides, Al O and SiO , with a stoichiometric formula 3 Al O }2 SiO . 2 3 2 2 3 2 This highly refractory material (¹ "18103C) is therefore expected to behave in the . same way as alumina as far as impurity outdi!usion is concerned. For these experiments, a laboratory made mullite sample was used with a purity level comparable to that of the alumina substrate studied above (concentration of unwanted oxides in the order of a few hundredths of a weight percent). As can be seen in Fig. 6, the impurity pro"les in the carrier wafer show only background level, indicating an impurity concentration below the SIMS detection limit as in the case of alumina. Considering the similarity between alumina and mullite, it is not surprising to obtain the same e!ect in terms of contamination.
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Fig. 6. Concentration pro"les of Al and Fe54 in the carrier wafer after CVD deposition on mullite.
4. Conclusion The di!usion of impurities from three types of foreign substrates during thermal chemical vapour deposition (CVD) of a polycrystalline Si "lm has been investigated. For comparable impurity levels, alumina and mullite give rise to much less contamination than graphite. This is probably because contaminants are present in free metallic form in graphite, whereas they are bound in the case of the ceramic materials.
Acknowledgements G. Beaucarne acknowledges the support of the IWT (Flemish Institute for Promotion of Scienti"c-Technological Research in the Industry) and S. Bourdais that of EDF (ElectriciteH de France). This work was partly funded within the frame of the Joule III-SFINCS project (contract no. JOR3-CT98-0233). We gratefully acknowledge the SIMS work of Luc Geenen, Imec. We thank laboratory CNRS-LMPM, Montpellier for providing the mullite samples.
References [1] K. Yamamoto, M. Yoshimi, T. Suzuki, Y. Tawada, Y. Okamoto, A. Nakajima, Below 5 lm thin "lm poly-Si solar cell on glass substrate fabricated at low temperature, Proceedings of the Second WCPVSEC, Vienna, 1998. [2] J. Meier, P. Torres, R. Platz, S. Dubail, U. Kroll, J.A. Anna Selvan, N. Pellaton Vaucher, Ch. Hof, D. Fischer, H. Keppner, A. Shah, K.-D. Ufert, P. Giannoule`s, J. Koehler, On the way towards high e$ciency thin "lm silicon solar cells by the `micromorpha concept, Proceeding of the Mat. Res. Soc. Symp., Vol. 420, 1996. Materials Research Society.
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[3] J.R. Davis, A. Rohatgi, P. Rai-Chaoudhury, P. Blais, R. H. Hopkins, Characterization of the e!ects of metallic impurities on silicon solar cell performance, Proceedings of the 13th PVSC, Washington, 1978, 490-495. [4] T.L. Chu, Fabrication of polycrystalline solar cells on low-cost substrates, USP no. 3961997, 1976. [5] K. Ishii, H. Nishikawa, T. Takahashi, Y. Hayashi, Jpn. J. Appl. Phys. 32 (1993) L770. [6] S. Reber, J. Aschaber, A. Hurrle, High temperature di!usion of iron in PECVD-SiO barrier layers for 2 crystalline silicon thin-"lm solar cells, Proceedings of the Second WCPVSEC, Vienna, 1998, 1798. [7] S. Reber, F. Faller, C. Hebling, R. Ludemann, Crystalline Silicon thin-"lm solar cells on SiC based Ceramics, Second WCE PVSE, Wien 1998, p. (1998) 1782 [8] H.V. Campe, B. Cembolista, H. Ebinger, W. Ho!man, U. Huth, W. Warzawa, Multicrystalline silicon layers for photovoltaic applications grown by a modi"ed CVD process, in L. Guimaraes, W. Palz, C. de Rey!, H. Kiess, P. Helm (Eds.), Proceedings of the 11th European Photovoltaic Conference, Harwood Academic, Chur, 1993, p. 1066. [9] M. Le Gall, B. Lesage, Philo. Mag. A 70 (5) (1994) 761. [10] G.W. Cullen, J. Crystal Growth 9 (1971) 107. [11] N. Baber, L. Moteliser, M. Kleverman, K. Bergman, H.G. Grimmeis, Phys. Rev. 38 (1988) 10483. [12] K. Rosenbach, J.A. Schmitz, Arch. Eisenhuettenwes 45 (1974) 43.
Impurity di!usion from uncoated foreign substrates during high temperature CVD for thin-"lm Si solar cells G. Beaucarne!,*, S. Bourdais", A. Slaoui", J. Poortmans! !IMEC vzw., Kapeldreef 75, B-3001 Leuven, Belgium "Laboratoire CNRS-PHASE, 23 rue du Loess, F-67037 Strasbourg, France Received 20 August 1999
Abstract In this paper, we study the di!usion of impurities from three types of foreign substrates (graphite, alumina and mullite) during thermal chemical vapour deposition (CVD) of a polycrystalline Si "lm. For this we use a rapid thermal CVD (RTCVD) system and characterization techniques such as secondary ion mass spectroscopy (SIMS) and deep level transient spectroscopy (DLTS). Results show that, in the case of materials like graphite, metallic contaminants can freely outdi!use into the deposited layer and the environment. In contrast, the ceramic substrates release only a very limited amount of contaminants during the CVD process, making the need of a di!usion barrier much less severe. ( 2000 Elsevier Science B.V. All rights reserved. Keywords: Thin-"lm crystalline Si solar cells; Impurity di!usion; Di!usion barrier; Ceramic substrates
1. Introduction In the last few years, there has been considerable research e!orts in the "eld of thin-"lm crystalline Si solar cells, because they have the potential of delivering good performance at a low cost. Low-temperature approaches have yielded promising results [1,2], but process speed is seen as a problem. A lot of e!ort is now being put
* Corresponding author. E-mail address: [email protected] (G. Beaucarne) 0927-0248/00/$ - see front matter ( 2000 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 7 - 0 2 4 8 ( 9 9 ) 0 0 1 1 8 - X
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G. Beaucarne et al. / Solar Energy Materials & Solar Cells 61 (2000) 301}309
into increasing the growth rates to make a high throughput process possible. Hightemperature approaches do not su!er from low growth rates and might eventually turn out to be more attractive in spite of their higher costs. An important question with these approaches is whether impurities from the substrate can migrate to the active layer. It is well documented that many impurities have detrimental e!ect on the performance of Si solar cells. In particular, most metallic impurities start to be harmful already at trace concentrations [3]. When we deposit Si at high temperature on a foreign material, an important concern is therefore the possible contamination of the layer by solid state di!usion of impurities from the substrate. These contaminants can either be elements from the main components of the substrate material or other species present as impurities in the material. In order to avoid such contamination, research groups have been developing intermediate layers, the so-called di!usion barriers, which are meant to con"ne impurities in the substrate during high-temperature steps. The materials that have been studied include borosilicate glass [4], LPCVD silicon nitride in combination with spin-on silicon oxide [5], PECVD oxide [6], PECVD oxynitride [7] and silicon carbide [8]. In the latter reference, it was shown that the amount of impurities that can escape from a graphite substrate encapsulated in SiC is very small if not negligible, even when a very high-temperature treatment like ZMR is applied. However, it is preferable to avoid using a di!usion barrier. The layer deposition is an additional step which makes the process more expensive and time-consuming, e!ectively increasing the substrate cost. In this study we investigate the di!usion of contaminants from foreign substrates without any coating during chemical vapour deposition. Such information is useful when we have to assess the need of a barrier layer and how to design it.
2. Experimental In order to check whether impurities indeed migrate into Si during CVD growth, following contamination experiments have been carried out. Foreign substrates are placed on monocrystalline Si wafers in a rapid thermal chemical vapour deposition (RTCVD) reactor (Jipelec) and are subjected to a typical CVD cycle with following parameters: f temperature: 10503C or above f deposition time: 5 min deposition f gas #ow: 3 g TCS (trichlorosilane)/min diluted in 3 slm H . 2 Both the carrier Si wafer and the layer deposited on the substrate are subsequently analyzed with secondary ion mass spectrometry (SIMS) and in some cases with deep level transient spectroscopy (DLTS). These complementary techniques can provide crossed information, respectively, on the elements that have e!ectively di!used, and on their recombining activity in the deposited silicon.
G. Beaucarne et al. / Solar Energy Materials & Solar Cells 61 (2000) 301}309
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3. Results and discussion 3.1. Graphite The graphite substrates used in these experiments are commercial high purity substrates from Le Carbone (2123 PT). Although these substrates are among the purest available on the market, they still contain signi"cant concentrations of impurities. The composition provided by the manufacture indicates between 1}5 ppm Fe and Ca, and other elements like Al and B in concentrations below 1 ppm. The main impurities Fe and Ca are present in concentrations that are dangerously high for electronic devices. The concentration pro"les for various impurities as determined by SIMS in the carrier wafer are shown in Fig. 1. Fe does not appear as such in this graph, but its presence is indicated by the concentration of its 54 isotope, present in natural iron with a concentration of 5 at%. The impurity concentrations show typical di!usion pro"les. As expected, Fe and Ca are the most abundant contaminants, with peak concentrations above 1017 cm~3. Because of the relatively low thermal budget of the process used in this experiment, the pro"les extend to only about 1 lm below the carrier wafer surface (within the detection limit allowed by SIMS). Fig. 2 shows the Ca and Al pro"les in the deposited layer itself. Whereas Al is showing no di!usion pro"le, staying at a constant concentration of about 1015 cm~3, there is a steep pro"le of Ca, peaking at the interface at about 3]1017 cm~3. Note that the Ca di!usion is deeper in the layer than in the carrier wafer (more than 2 lm). This can be attributed to the closer intimacy between the graphite substrate and the layer, but is also expected from the higher di!usion coe$cient along grain boundaries in a polycrystalline material.
Fig. 1. Concentration pro"les of various impurities in the carrier wafer after CVD deposition on graphite.
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Fig. 2. Concentration pro"les of Ca and Al in the Si layer deposited on graphite.
The conclusion of this paragraph is that a substantial amount of impurities di!use out of non-coated graphite substrates during chemical vapour deposition of a Si layer, even in the case of highly pure graphite. A di!usion barrier is therefore needed to prevent this process, but this adds up to the substrate costs. 3.2. Alumina (microcrystalline Al2 O3 ) There are several types of alumina materials, which are used for di!erent applications. Even the purest types contain large amounts of impurities compared to concentrations considered acceptable in electronic Si devices. However, since aluminas are oxygen-based materials, di!usion within such ceramics is very low [9]. The alumina material used in these experiments, Coors ADS996 contains various oxides like SiO , Fe O , CaO, MgO and Na O. Some of these oxides, like MgO have 2 2 3 2 been added on purpose during substrate preparation in order to ease the sintering process. The concentration of Fe is about 50 ppm Fe and that of Mg is more than 700 ppm. The concentration pro"les, shown in Fig. 3, give constant background values indicating that the in-di!usion of impurities from the alumina substrate has led to contaminant impurities below the detection level of SIMS. Fig. 4 shows the concentration of Al in the deposited Si layer as a function of depth. A prominent feature of this graph is the very high peak in the area of the interface between the Si layer and the substrate. This could be construed as a large presence of Al, for instance in an alloyed Si}Al region. However, SRP measurements (Spreading Resistance Pro"lometry) show no such region with very low resistivity close to the interface. We therefore conclude that this peak is an artefact of the SIMS measurement, which does not correspond to a physical reality. In the bulk of the layer, Al atoms are present with a density of about 1016 cm~3 or lower. This is probably due to the auto doping e!ect, which is well known in studies of the SOS technology (Silicon On Sapphire). SOS is one of the earliest forms of silicon on insulator (SOI) technology, which involves using sapphire
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305
Fig. 3. Concentration pro"les of various impurities in the carrier wafer after CVD deposition on alumina.
Fig. 4. Concentration pro"les of Al in the Si layer deposited on alumina.
(monocrystalline Al O ) to grow thin monocrystalline Si layers epitaxially on an 2 3 insulator for high performance electronic circuits. In the SOS literature, auto doping is attributed to the reaction 2 Si(s)#Al O (s)PAl O(g)#2 SiO(g), 2 3 2 which can take place when the gaseous intermediate aluminum oxide can escape, i.e. when the substrate is still not completely covered by Si [10]. Note that Al gets incorporated in the layer from the gas phase and does not result from solid state di!usion. Other tests with thicker layers have shown a similar e!ect, with an average
306
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Fig. 5. DLTS in Si sample on alumina substrate and thermally heated at 12003C during 2 min under nitrogen.
concentration of about 5]1015 cm~3. Taking the massive amount of Al in the substrate into account, auto doping can be considered a small e!ect. Although we have not detected any impurity in the carrier wafer with SIMS, this does not mean that no contamination at all has occurred. Very low concentrations may be present, but those can only be measured with a very sensitive technique. DLTS can o!er this possibility but it is unable to give the chemical signature of the detected point defect unless one expects speci"c impurities. We have applied it in the case of alumina. A piece of monocrystalline Cz}Si (boron doped at 6.5]1015 cm~3) has been put on an alumina substrate (Coors Superstrate, very close in composition to the ADS996 material) and annealed in the RTCVD reactor at 12003C during 2 min under N . After a short surface etch, a Schottky diode has been made by evaporation and 2 the DLTS measurements have been carried out. Fig. 5 gives the DLTS spectrum plotted at an emission rate of 80 s~1. It exhibits two peaks, one at around 184 and the other at 252 K. Although an extensive study has not been done on these samples, we can speculate that the observed traps are related to contamination by Mg [11]. A rough estimation of the Mg concentration from the amplitude of the detected peaks yields a concentration in the range of 5]1012}1]1013 cm~3. The reason for the low contamination level of the carrier wafers and the Si layer from alumina substrates is that all impurities are present under oxide form. Al O in 2 3 particular is a very stable oxide, with a standard free energy of formation of !830 kJ/mol at 11003C, which is more stable than quartz (!620 kJ/mol at 11003C). Iron oxide is less stable and gets reduced in three steps to metallic Fe. FeO, the last
G. Beaucarne et al. / Solar Energy Materials & Solar Cells 61 (2000) 301}309
307
intermediate oxide in the reduction of Fe O , has a standard free energy of only 2 3 !170 kJ/mol at 11003C. According to thermodynamics, a substantial amount of Fe atoms should appear in metallic form, as the FeO}H system tends to a H O partial 2 2 pressure (pH O/pH "5]10~6 at 11003C in equilibrium) which is larger than the input 2 2 water content of the gas #ow. The presence of chlorinated species is an additional driving force for the oxide decomposition. However, several factors can prevent the formation of metallic Fe. It is known that FeO forms a spinel phase with Al O , 2 3 which is more stable than FeO [12]. Moreover, the iron oxide molecules are embedded in a matrix of the stable Al O oxide. In order to reduce them to Fe atoms, 2 3 H molecules need to di!use through this dense material, and the reaction products 2 (Fe, H O, and O ) also have to di!use back through the alumina matrix to reach the 2 2 surface. Thus, we attribute the low level of contamination level in the case of alumina to the moderate thermodynamical driving force due to the stability of the main components, and to the presence of several kinetic barriers against reduction and di!usion. It should be noted that this conclusion is valid only for the temperature range that has been investigated here. In their study of laser-beam melt and crystallization (LMC) Si layers on alumina (temperature '¹ "14153C), Ishii et al. observed .%-5 that the Al concentration was 5]1017 cm~3 in the laser crystallized layers if no special precaution was taken [5]. A di!usion barrier was necessary to reduce this concentration to 1016 cm~3. Another important remark is that the contamination behaviour observed here is for a relatively pure alumina material which has been developed for electronic thin-"lm applications. For photovoltaic applications where cost is of prime importance, less pure materials are likely to be used. Some preliminary experiments with very cheap alumina substrates (containing more than one 1 at% of Fe and brown in colour) have led to substantial contamination, visible with the naked eye. However, this is another extreme case. Materials especially developed for photovoltaics will have an intermediate impurity levels (in the order of 0.1%). Additional investigation on the contamination behaviour with this type of materials is needed.
3.3. Mullite Mullite is a ceramic material similar to alumina. It consists of a solid state solution of two stable oxides, Al O and SiO , with a stoichiometric formula 3 Al O }2 SiO . 2 3 2 2 3 2 This highly refractory material (¹ "18103C) is therefore expected to behave in the . same way as alumina as far as impurity outdi!usion is concerned. For these experiments, a laboratory made mullite sample was used with a purity level comparable to that of the alumina substrate studied above (concentration of unwanted oxides in the order of a few hundredths of a weight percent). As can be seen in Fig. 6, the impurity pro"les in the carrier wafer show only background level, indicating an impurity concentration below the SIMS detection limit as in the case of alumina. Considering the similarity between alumina and mullite, it is not surprising to obtain the same e!ect in terms of contamination.
308
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Fig. 6. Concentration pro"les of Al and Fe54 in the carrier wafer after CVD deposition on mullite.
4. Conclusion The di!usion of impurities from three types of foreign substrates during thermal chemical vapour deposition (CVD) of a polycrystalline Si "lm has been investigated. For comparable impurity levels, alumina and mullite give rise to much less contamination than graphite. This is probably because contaminants are present in free metallic form in graphite, whereas they are bound in the case of the ceramic materials.
Acknowledgements G. Beaucarne acknowledges the support of the IWT (Flemish Institute for Promotion of Scienti"c-Technological Research in the Industry) and S. Bourdais that of EDF (ElectriciteH de France). This work was partly funded within the frame of the Joule III-SFINCS project (contract no. JOR3-CT98-0233). We gratefully acknowledge the SIMS work of Luc Geenen, Imec. We thank laboratory CNRS-LMPM, Montpellier for providing the mullite samples.
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