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Integrated-circuit digital logic families
WORLD
ABSTRACTS
ON MICROELECTRONICS
and the X, Y, 0 micro-positioning controls, permitting the operators' skill, judgment, emotions, eye deficiencies, etc., to affect the overall wafer alignment rejection rate. This evaluation of automatic alignment and mask making feasibility, shows how high-positional alignment accuracy can be obtained independently of the human error, enhancing both wafer and die yield and showing greater mask usage.
Integrated-circuit digital logic f a m i l i e s . I I I - E C L and M O S devices. L. S. GARRET. I E E E Spectrum, December (1970), p. 30. This final instalment of a threepart article is devoted to emitter-coupled logic (ECL) devices as well as to metal oxide semiconductor (MOS) logic devices of the p-channel (P-MOS) and complementary (CMOS) types. The concluding portion presents a summary chart comparing the major parameters of the various IC digital families discussed in the three instalments, plus a useful check list of available functions. I t s ignore noise. A. R. VIOLA. EDN, 1 February (1971), p. 29. Faster circuits initiate new problems in transmitting data between subsystems or over long lines. Careful consideration must be given to selecting the right circuit for interfacing signals.
D e s i g n i n g an LSI m e m o r y s y s t e m that outperf o r m s c o r e s - - e c o n o m i c a l l y . E D N Computer Hardware supplement, 15 January (1971). There has been
AND RELIABILITY
251
shapes, processing techniques, are rapidly increasing the variety of packages available to the equipment designer; the edge mount and other leadless approaches also offer new benefits.
Gases for the electronic i n d u s t r y ~ a c h a n g i n g technology. S. CYGELMAN. Solid State Technol., January (1971), p. 45. Recent years have seen a number of changes in products, procedures and teehniques in the specialty gas industry. This article reviews some of these changes and relates them to new possibilities in semiconductor manufacturing technology.
Junction-coating resins i m p r o v e s. c. p e r f o r m a n c e . O. DoBsoN. Electron. Engng, March (1971), p. 47. Environmental conditions in the region of the p-n junction of most semiconductor devices are a substantial factor in the general working efficiency of those devices, and some form of protection is therefore desirable.
Electropolishing silicon. C. E. HALLAS. Solid State Techno[., January (1971), p. 30. Electropolishing of both p- and n-type silicon wafers has been accomplished at rates as high as 2 mils per re.in. The technique and materials used in the process are described, and the results obtained are presented.
Glass, its vital role in s e m i c o n d u c t o r packaging. S. MERRIN. EDN, 1 December (1970), p. 35. From the
much fanfare over LSI semiconductor memories and how they promise to supplant ferrite cores. But just how is LSI going to achieve the necessary cost and performance advantages on a system level? Dynamic M O S is one w a y - - a n d here are the design details.
dawn of the semiconductor era, glass has played a prominent part in device packaging. In the search for reliable yet economical hermetic packages, glass promises to assume even greater importance.
C e r a m i c s for packaging. D. L. WILCOX. Solid State Technol., January (1971), p. 40. Ceramics are playing a
D.c. arc anodic p l a s m a o x i d a t i o n - - a n e w v a c u u m process for solid state d e v i c e fabrication. J. R. LIGENZA and M. KUHN. Solid State Technol., December
vital role in the solution of the advancing electronic packaging needs by virtue of the broad range of properties they possess and the product design flexibility due to ceramic processing versatility. These features have combined to make it possible for the electronic semiconductor package to take on increased functionality allowing further exploitation of the cost, performance and reliability advances of the semiconductor industry. With the increased functionality comes, however, a new set of problems (part number explosion, testing, turnaround time) for which solutions must be found. The significant properties of ceramic packaging materials are presented and some of the fundamental parameters controlling the critical physical and electrical properties are highlighted. Important fabrication techniques for preparing simple substrates and more complex multilevel wiring structures are reviewed and their relative merits identified in relation to the defined packaging needs.
Part 1. P l a s t i c - c e r a m i c d u e l stirs up n e w d e s i g n concepts for LSI packages. S. E. SCRUPSKI.Electronics, 12 April (1971), p. 75. Developments in materials,
(1970), p. 33. A d.c. arc is used as an intense plasma source in the vacuum-electrical processes of sputter cleaning and plasma anodic oxidation of silicon surfaces. Oxidized silicon surfaces of exceptional quality are easily produced at low temperatures. The electrical properties of the plasma anodized silicon surface, before and after annealing, are discussed as well as those of a multiple oxide sandwich layer on silicon.
Those aren't m o v i e r e e l s - - t h e y ' r e 3 5 - m m . rolls of ICs. Electron. Des. 19, No. 1, 7 January (1971). Rolls of 35-mm. film are replacing metal lead frames in a new i.e. packaging concept introduced by General Electric's Integrated Circuit Products Department, Syracuse, N.Y. The package, called miniMod, uses a copper-laminated, plastic film strip, similar to movie film, for mounting i.c.s. These indexed strips are assembled and sold on reels, which makes them well suited for high-volume, automatic handling, assembling and testing. The miniMod package is formed by attaching a monolithic silicon i.e. chip to a lead frame that is part of a film strip. T h e chip is then encapsulated in epoxy to complete the package.
ABSTRACTS
ON MICROELECTRONICS
and the X, Y, 0 micro-positioning controls, permitting the operators' skill, judgment, emotions, eye deficiencies, etc., to affect the overall wafer alignment rejection rate. This evaluation of automatic alignment and mask making feasibility, shows how high-positional alignment accuracy can be obtained independently of the human error, enhancing both wafer and die yield and showing greater mask usage.
Integrated-circuit digital logic f a m i l i e s . I I I - E C L and M O S devices. L. S. GARRET. I E E E Spectrum, December (1970), p. 30. This final instalment of a threepart article is devoted to emitter-coupled logic (ECL) devices as well as to metal oxide semiconductor (MOS) logic devices of the p-channel (P-MOS) and complementary (CMOS) types. The concluding portion presents a summary chart comparing the major parameters of the various IC digital families discussed in the three instalments, plus a useful check list of available functions. I t s ignore noise. A. R. VIOLA. EDN, 1 February (1971), p. 29. Faster circuits initiate new problems in transmitting data between subsystems or over long lines. Careful consideration must be given to selecting the right circuit for interfacing signals.
D e s i g n i n g an LSI m e m o r y s y s t e m that outperf o r m s c o r e s - - e c o n o m i c a l l y . E D N Computer Hardware supplement, 15 January (1971). There has been
AND RELIABILITY
251
shapes, processing techniques, are rapidly increasing the variety of packages available to the equipment designer; the edge mount and other leadless approaches also offer new benefits.
Gases for the electronic i n d u s t r y ~ a c h a n g i n g technology. S. CYGELMAN. Solid State Technol., January (1971), p. 45. Recent years have seen a number of changes in products, procedures and teehniques in the specialty gas industry. This article reviews some of these changes and relates them to new possibilities in semiconductor manufacturing technology.
Junction-coating resins i m p r o v e s. c. p e r f o r m a n c e . O. DoBsoN. Electron. Engng, March (1971), p. 47. Environmental conditions in the region of the p-n junction of most semiconductor devices are a substantial factor in the general working efficiency of those devices, and some form of protection is therefore desirable.
Electropolishing silicon. C. E. HALLAS. Solid State Techno[., January (1971), p. 30. Electropolishing of both p- and n-type silicon wafers has been accomplished at rates as high as 2 mils per re.in. The technique and materials used in the process are described, and the results obtained are presented.
Glass, its vital role in s e m i c o n d u c t o r packaging. S. MERRIN. EDN, 1 December (1970), p. 35. From the
much fanfare over LSI semiconductor memories and how they promise to supplant ferrite cores. But just how is LSI going to achieve the necessary cost and performance advantages on a system level? Dynamic M O S is one w a y - - a n d here are the design details.
dawn of the semiconductor era, glass has played a prominent part in device packaging. In the search for reliable yet economical hermetic packages, glass promises to assume even greater importance.
C e r a m i c s for packaging. D. L. WILCOX. Solid State Technol., January (1971), p. 40. Ceramics are playing a
D.c. arc anodic p l a s m a o x i d a t i o n - - a n e w v a c u u m process for solid state d e v i c e fabrication. J. R. LIGENZA and M. KUHN. Solid State Technol., December
vital role in the solution of the advancing electronic packaging needs by virtue of the broad range of properties they possess and the product design flexibility due to ceramic processing versatility. These features have combined to make it possible for the electronic semiconductor package to take on increased functionality allowing further exploitation of the cost, performance and reliability advances of the semiconductor industry. With the increased functionality comes, however, a new set of problems (part number explosion, testing, turnaround time) for which solutions must be found. The significant properties of ceramic packaging materials are presented and some of the fundamental parameters controlling the critical physical and electrical properties are highlighted. Important fabrication techniques for preparing simple substrates and more complex multilevel wiring structures are reviewed and their relative merits identified in relation to the defined packaging needs.
Part 1. P l a s t i c - c e r a m i c d u e l stirs up n e w d e s i g n concepts for LSI packages. S. E. SCRUPSKI.Electronics, 12 April (1971), p. 75. Developments in materials,
(1970), p. 33. A d.c. arc is used as an intense plasma source in the vacuum-electrical processes of sputter cleaning and plasma anodic oxidation of silicon surfaces. Oxidized silicon surfaces of exceptional quality are easily produced at low temperatures. The electrical properties of the plasma anodized silicon surface, before and after annealing, are discussed as well as those of a multiple oxide sandwich layer on silicon.
Those aren't m o v i e r e e l s - - t h e y ' r e 3 5 - m m . rolls of ICs. Electron. Des. 19, No. 1, 7 January (1971). Rolls of 35-mm. film are replacing metal lead frames in a new i.e. packaging concept introduced by General Electric's Integrated Circuit Products Department, Syracuse, N.Y. The package, called miniMod, uses a copper-laminated, plastic film strip, similar to movie film, for mounting i.c.s. These indexed strips are assembled and sold on reels, which makes them well suited for high-volume, automatic handling, assembling and testing. The miniMod package is formed by attaching a monolithic silicon i.e. chip to a lead frame that is part of a film strip. T h e chip is then encapsulated in epoxy to complete the package.