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Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications
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Microelectronic Engineering 84 (2007) 2916–2920 www.elsevier.com/locate/mee
Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications Chang-Ta Yang a,b, Kuei-Shu Chang-Liao a,*, Hsin-Chun Chang a, B.S. Sahu a, Tzu-Chen Wang a, Tien-Ko Wang a, Wen-Fa Wu c a
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 30013, Taiwan, ROC b Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan, ROC c National Nano Device Laboratories, Hsinchu 300, Taiwan, ROC Received 28 June 2006; received in revised form 17 February 2007; accepted 11 March 2007 Available online 18 March 2007
Abstract Interaction of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO2 gate dielectric and HfxTayN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO2 gate dielectric than that in HfOxNy. Compared to HfOxNy gate dielectric, SiO2 shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO2 gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability. Ó 2007 Elsevier B.V. All rights reserved. Keywords: MOS; HfxTayN; HfOxNy; Thermal stability; Metal gate; High-k
1. Introduction With the scaling down of gate effective oxide thickness (EOT) into sub-2 nm region for advanced MOS device applications, metal gate electrodes are required to overcome many disadvantageous effects associated with conventional poly-silicon gate, such as poly-depletion, boron penetration, high gate resistance and instability on high-k gate dielectric materials [1]. Although, refractory metal nitrides, such as TiN [2] and TaN [3] have been extensively studied as potential gate electrode candidates, these materials showed limited thermal stability [4,5] with considerable increase in EOT during high-temperature annealing, and thus, are not compatible with the conventional gate-first * Corresponding author. Address: Department of Engineering and System Science, National Tsing Hua University, Hsinchu 30013, Taiwan, ROC. Tel.: +886 3 5742674; fax: +886 3 5720724. E-mail address: [email protected] (K.-S. Chang-Liao).
0167-9317/$ - see front matter Ó 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2007.03.003
complementary metal-oxide-semiconductor (CMOS) process. The major problem associated with these refractory metal nitride electrodes, such as TaN, TiN, and HfN is on their work function [4,6]; specially, the work functions of TaN/SiO2 and TaN/HfO2 structures increase with increasing the annealing temperature and finally reach a value of 4.7–4.8 eV [4,7]. Fortunately, it has been found by the authors that addition of a small amount of Hf into the TaN metal gate electrode can enhance the thermal stability [8]. In addition, the work function can be tuned to a desired value by controlling Hf and Ta concentrations in the metal gate. HfO2 has proven to be one of the most promising candidate to replace SiO2 as the gate dielectric in sub 0.1-lm CMOS devices due to its suitable dielectric constant [9– 12], relatively wide bandgap (5.6 eV) with sufficient band offset (1.4 eV) [13], and acceptable thermal stability in contact with Si [14]. However, HfO2 crystallizes at low temperature, leading to polycrystalline films with high leakage
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paths along grain boundaries and non-uniformities in the k value and in the film thickness. Incorporation of nitrogen into HfO2 can increase the crystallization temperature [15]. HfON gate dielectric exhibits higher crystallization temperature and better thermal stability in contact with Si to withstand the conventional 800–900 °C activation annealing process. In addition, from scaling down point of view, HfON appears to be a promising gate dielectric material, as the incorporated nitrogen does not degrade the dielectric constant of the film. Nevertheless, there are still many challenges to be surmounted for the actual application of this gate dielectric together with its compatibility and thermal stability with advanced metal gates. In the present study, interaction of HfxTayN metal gate with HfOxNy and SiO2 gate dielectrics has been investigated from thermal stability and dielectric reliability point of view. In this regard, a comparative study between the most widely used SiO2 and HfOxNy gate dielectrics was studied. 2. Experimental The MOS devices were formed on (1 0 0)-oriented p-type silicon wafers with resistivity 15–25 X cm. After the conventional RCA cleaning, the wafers were subjected to a HF vapor clean for 90 s to remove native oxide. Next, hafnium nitride (HfxNy 2 nm) films were deposited onto the wafer using a reactive dc magnetron sputtering of a 99.9% pure Hf target in an Ar/N2 = 24/36 sccm ambient with a power density of 4.7 W/cm2 and a pressure of 7.6 mTorr. A post-deposition anneal (PDA) using rapid-thermalannealing (RTA) was then carried out at 850 °C in N2 gas for 60 s to form HfOxNy (4.5 nm). Note that some oxygen may already exist during the deposition of HfN by this sputtering. It is known that Hf-based dielectric is easily oxidized. To avoid excessive oxidation that might cause the formation of a thick interfacial layer between Si and high-k dielectric, post-deposition annealing (PDA) was performed in a N2 ambient with only a trace amount of residual oxygen in both chamber and the native oxide of Si surface. Meanwhile, SiO2 was formed onto (1 0 0)-oriented p-type silicon wafers with resistivity 15–25 X cm. After the conventional RCA cleaning and HF vapor clean, thermal oxide was grown at 800 °C in the furnace to form 2.0 nm SiO2. Next, HfxTayN (50 nm) films were deposited onto the HfOxNy and SiO2 films by a reactive dc magnetron cosputtering using 99.9% pure Hf and Ta targets with powers at 100 W and 150 W respectively in an Ar/N2 = 24/ 4.3 sccm ambient. The X-ray photoelectron spectroscopy (XPS) results show that the composition of HfxTayN film in this work is Hf0.27Ta0.58N0.15. A 100 nm TaN film was then deposited by sputtering to serve as a capping layer, and to prevent the top surface of HfxTayN from being oxidized during PMA. Subsequently, a PMA using RTA was carried out at 850 °C in N2 gas for 45 s. In order to get the compatibility and thermal stability of HfxTayN metal gate
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electrode, two additional PMA temperatures have been adopted, one below 850 °C (i.e. 750 °C) and the other above 850 °C (i.e. 950 °C). The TaN/HfxTayN gate electrode was then patterned by a helicon-wave plasma etching. A 500 nm thick Al film was deposited on the backsides of all samples. Finally, a sintering was conducted in a N2/H2 ambient at 420 °C for 30 min. 3. Results and discussion Fig. 1 illustrates the TOF-SIMS profiles of Hf and Ta for the two structures of: (a) Hf0.27Ta0.58N0.15/SiO2/Si and (b) Hf0.27Ta0.58N0.15/HfOxNy/Si MOS devices after a PMA temperature of 850 °C, respectively. It is quite obvious from the figure that the diffusion of Hf and Ta can extend into the Si substrate through the HfOxNy gate dielectric compared to SiO2 gate dielectric. Previous report showed that diffusion of refractory metals in high-k gate dielectrics is more significant than that of thermal oxide [16]. Refractory metal like Ta can even penetrate into the underline Si substrate. Compared to Ta, the diffusion of Hf is somehow more extended into Si substrate. This can
Fig. 1. Time-of–flight secondary ion mass spectroscopy (TOF-SIMS) profiles of: (a) Hf0.27Ta00.58N0.15/SiO2/Si and (b) Hf0.27Ta00.58N0.15/ HfOxNy/Si structures at a PMA temperature of 850 °C.
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be attributed to the lower bonding energy of Hf–N bonds (18.1 eV) [17] compared to Ta–N bonds (22.9 eV) [18]. On the other hand, nitrogen acts as a diffusion barrier for suppressing Hf and Ta to diffuse farther into the Si substrate. The interfaces of metal electrode/gate dielectric and gate dielectrics/Si are defined as the locations, where the count number of O is 10% of its maximum count number in the metal-oxide. Fig. 2 illustrates the equivalent oxide thickness (EOT) and gate leakage current density (Jg) (at Vg Vfb = 1 V) for the MOS capacitors with SiO2 or HfOxNy gate dielectrics, together with Hf0.27Ta0.58N0.15 metal gate stacks after three different PMA temperatures. The values of EOT were extracted from a simulation program considering quantum effects [19]. No significant variations of EOT and Jg are observed in both gate dielectrics with an increase in PMA temperature, indicating satisfactory thermal stability for HfTaN together with SiO2 or HfOxNy. The Jg value for the MOS capacitor with HfOxNy gate dielectric is larger due to the more recrystallization and the presence of defects at the metal gate/dielectric and dielectric/Si interfaces. To investigate the PMA induced variation of electrical property, the conductance (Gp) as a function of frequency (x) for all samples after different PMA temperatures are plotted as Gp/xA versus x by biasing the Si surface in depletion condition. Fig. 3a shows the maximum value of Gp/xA of MOS device with Hf0.27Ta00.58N0.15 gate electrode at different PMA temperatures and the interface trap density (Dit) is equal to (2.5/q)(Gp/xA)max at the maximum [20]. Fig. 3b illustrates the variations in Dit values of the MOS device with HfOxNy or SiO2 gate dielectrics after three different PMA temperatures. MOS device with HfOxNy gate dielectric shows higher Dit values compared to the one with SiO2. According to previous report [16],
Fig. 3. (a) The maximum value of Gp/xA of MOS capacitors with Hf0.27Ta00.58N0.15/HfON gate stack after different PMA temperatures and (b) interface trap density (Dit) of MOS capacitors with HfOxNy and SiO2 gate dielectrics after various PMA temperatures extracted from the conductance method.
Fig. 2. EOT and Jg for metal gate Hf0.27Ta00.58N0.15 with HfOxNy and SiO2 gate dielectrics at 750 °C, 850 °C and 950 °C PMA temperatures.
Ta atoms can penetrate into the high-k layer and Si substrate, which, in turn, degrade the bulk carrier lifetime. In addition, penetrated Ta atoms can also give rise to higher interface states and enhancement in pre-existing traps. Though, addition of nitrogen (i.e. HfOxNy type) can suppress the diffusion of metal ions, the incorporated nitrogen also induces additional trapped charges. The variation in the Dit values for the MOS capacitor with SiO2 gate dielectric is negligible. This can be attributed to the excellent interface properties of SiO2 and its excellent thermal stability. Fig. 4a shows the flat-band voltage of MOS device with Hf0.27Ta00.58N0.15/HfOxNy structure after different PMA
C.-T. Yang et al. / Microelectronic Engineering 84 (2007) 2916–2920
Fig. 4. (a) The flat-band voltage of MOS devices with Hf0.27Ta0.58N0.15/ HfOxNy structure at different PMA temperature and (b) the work function of the Hf0.27Ta0.58N0.15 metal gate in MOS device with both two HfOxNy and SiO2 gate dielectrics.
temperatures. The work function of metal gate can be extracted based on the flat-band voltage. Fig. 4b shows the work function of the Hf0.27Ta00.58N0.15 metal gate with both HfOxNy and SiO2 structures. It is observed that work functions are around 4.6 eV and 4.7 eV for HfxTayN with SiO2 and HfOxNy gate dielectrics, respectively. It is also shown that variation of work function with SiO2 and HfOxNy stack is very small with varying PMA temperatures, indicating the good thermal stability of these SiO2 and HfOxNy stacks. A constant voltage stress ( 12 MV/cm) has been applied for different span of time. The corresponding changes in DVfb values for MOS devices of both Hf0.27Ta00.58N0.15 /HfOxNy/Si and Hf0.27Ta00.58N0.15/ SiO2/Si after various PMA temperatures are shown in Fig. 5a. No significant changes in DVfb values are noticed with the increase in stress time. However, for the Hf0.27Ta0.58N0.15/HfOxNy/Si MOS capacitor, there is a sig-
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Fig. 5. (a) Flat-band voltage shifts (DVfb) as a function of stress time for Hf0.27Ta00.58N0.15/SiO2/Si and Hf0.27Ta00.58N0.15/HfOxNy/Si devices at various PMA temperatures. An F–N constant voltage stress of 12 MV/ cm has been applied for different span of time and (b) defect generation rate (Pg) for Hf0.27Ta00.58N0.15/SiO2/Si and Hf0.27Ta00.58N0.15/HfOxNy/Si devices at various PMA temperatures.
nificant increase in DVfb values with increasing PMA temperature, indicating that the DVfb values are influenced by high-temperature thermal cycle. This is because positive charges are generated after the stress at 12 MV/cm to cause the flat-band voltage shift. The amount of flat-band voltage shift is larger as the PMA temperature is higher because the diffusion length of Ta and Hf is increased to cause more metal ions to be trapped in high-k layer which makes the quality of interface of dielectric film to become worse. On the other hand, the flat-band voltage shift for SiO2 is smaller after the stress because of fewer oxide trap existed in SiO2 bulk. Defect generation rate (Pg) is a clear indicator to assess the effect of interface trap-assisted tunneling [21]. The Pg is extracted from the linear portion of the relationship
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between [(Jg J0)/J0] and injected charge (Qinj). Fig. 5b shows the extracted defect generation rate (Pg) for the Hf0.27Ta00.58N0.15 metal gate with HfOxNy or SiO2 gate dielectrics after different PMA temperatures. Results indicated that Pg value for SiO2 increases less significantly with increasing PMA temperatures as compared to HfOxNy, which can be due to the better SiO2/Si interface quality. 4. Conclusion Electrical characteristics of MOS device based on HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics after various PMA temperatures have been investigated in this work. MOS device based on SiO2 gate dielectric with metal gate HfxTayN shows good thermal stability. Compared to HfOxNy gate dielectric, SiO2 shows better electrical properties, such as leakage current, interface trap density and stress-induced flat-band voltage shift. The thermal stability and electrical properties of MOS devices with Hf0.27Ta00.58N0.15 metal gate and SiO2 gate dielectric remain almost unchanged with increasing PMA temperature, revealing that it can be a promising candidate for advanced CMOS technology. Acknowledgements The authors would like to thank the National Science Council of Republic of China for financially supporting this research. Technical support from National Nano Device Laboratories (NDL) of the ROC is also acknowledged. References [1] International Technology Roadmap for Semiconductors, Semiconductor Industry association, San Jose, CA, 2001.
[2] J. Chen, B. Maiti, D. Connelly, M. Mendicino, F. Huang, O. Adetutu, Y. Yu, D. Weddington, W. Wu, J. Candelaria, D. Dow, P. Tobin, J. Mogab, in: Symp. VLSI Tech. Dig., 1999, pp. 25–26. [3] H. Shimada, I. Ohshima, T. Ushiki, S. Sugawa, T. Ohmi, IEEE Trans. Electr. Dev. 48 (2001) 1619–1626. [4] C. Ren, H.Y. Yu, J.F. Kang, Y.T. Hou, M.F. Li, W.D. Wang, D.S.H. Chan, D.L. Kwong, IEEE Electr. Dev. Lett. 25 (2004) 123– 125. [5] M.F. Wang, Y.C. Kao, T.Y. Huang, H.C. Lin, C.Y. Chang, in: Int. Symp. P2ID, 2001, pp. 36–39. [6] J. Westlinder, T. Schram, L. Pantisano, E. Cartier, A. Kerber, G.S. Lujan, J. Olsson, G. Groeseneken, IEEE Electr. Dev. Lett. 24 (2003) 550–552. [7] M.S. Joo, B.J. Cho, N. Balasubramanian, D.L. Kwong, IEEE Electr. Dev. Lett. 25 (2004) 716–718. [8] C.L. Cheng, K.S. Chang-Liao, T.C. Wang, T.K. Wang, C.H. Wang, IEEE Electr. Dev. Lett. 27 (2006) 148–150. [9] A. Morioka, H. Watanabe, M. Miyamura, T. Tatsumi, M. Saitoh, T. Ogura, T. Iwamoto, T. Ikarashi, Y. Saito, Y. Okada, H. Watanabe, Y. Mochiduki, T. Mogami, VLSI Tech. Dig. (2003) 165–166. [10] T. Nabatame, K. Iwamoto, H. Ota, K. Tominaga, H. Hisamatsu, T. Yasuda, K. Yamamoto, W. Mizubayashi, Y. Morita, N. Yasuda, M. Ohno, T. Horikawa, A. Toriumi, VLSI Tech. Dig. (2003) 25–26. [11] H. Kim, A. Marshall, P.C. Mclntyre, K.C. Saraswat, Appl. Phys. Lett. 84 (2004) 2064–2066. [12] G.D. Wilk, R.M. Wallace, Appl. Phys. Lett. 74 (1999) 2854–2856. [13] J. Robertson, J. Vac. Sci. Technol. B, Microelectron. Process. Phenom. 18 (2000) 1785–1791. [14] K.J. Hubbard, D.G. Schlom, J. Mater. Res. 11 (1996) 2757–2776. [15] C.H. Choi, S.J. Rhee, T.S. Jeon, N. Lu, J.H. Sim, R. Clark, M. Niwa, D.L. Kwong, IEDM Tech. Dig. (2002) 857–860. [16] C.Y. Kang, S.J. Rhee, C.H. Choi, M.S. Akbar, M. Zhang, T. Lee, I. Ok, J.C. Lee, Appl. Phys. Lett. 86 (2005) 012901–012903. [17] Y.Y. Wu, A. Kohn, M. Eizenberg, J. Appl. Phys. 95 (2004) 6167– 6174. [18] X. Wang, J. Liu, F. Zhu, N. Yamada, D.L. Kwong, IEEE Trans. Electr. Dev. 51 (2004) 1798–1804. [19] V. Misra, G.P. Heuss, H. Zhong, Appl. Phys. Lett. 78 (2001) 4166– 4168. [20] E.H. Nicollian, J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, Wiley, New York, 1982, pp. 185–197. [21] J.H. Stathis, D.J. DiMaria, IEDM Tech. Dig. (1998) 167–170.
Microelectronic Engineering 84 (2007) 2916–2920 www.elsevier.com/locate/mee
Integration of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics for MOS device applications Chang-Ta Yang a,b, Kuei-Shu Chang-Liao a,*, Hsin-Chun Chang a, B.S. Sahu a, Tzu-Chen Wang a, Tien-Ko Wang a, Wen-Fa Wu c a
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 30013, Taiwan, ROC b Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan, ROC c National Nano Device Laboratories, Hsinchu 300, Taiwan, ROC Received 28 June 2006; received in revised form 17 February 2007; accepted 11 March 2007 Available online 18 March 2007
Abstract Interaction of HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics has been extensively studied. Metal-oxide-semiconductor (MOS) device formed with SiO2 gate dielectric and HfxTayN metal gate shows satisfactory thermal stability. Time-of-flight secondary ion mass spectroscopy (TOF-SIMS) analysis results show that the diffusion depths of Hf and Ta are less significant in SiO2 gate dielectric than that in HfOxNy. Compared to HfOxNy gate dielectric, SiO2 shows better electrical properties, such as leakage current, hysteresis, interface trap density and stress-induced flat-band voltage shift. With an increase in post metallization annealing (PMA) temperature, the electrical characteristics of the MOS device with SiO2 gate dielectric remain almost unchanged, indicating its superior thermal and electrical stability. Ó 2007 Elsevier B.V. All rights reserved. Keywords: MOS; HfxTayN; HfOxNy; Thermal stability; Metal gate; High-k
1. Introduction With the scaling down of gate effective oxide thickness (EOT) into sub-2 nm region for advanced MOS device applications, metal gate electrodes are required to overcome many disadvantageous effects associated with conventional poly-silicon gate, such as poly-depletion, boron penetration, high gate resistance and instability on high-k gate dielectric materials [1]. Although, refractory metal nitrides, such as TiN [2] and TaN [3] have been extensively studied as potential gate electrode candidates, these materials showed limited thermal stability [4,5] with considerable increase in EOT during high-temperature annealing, and thus, are not compatible with the conventional gate-first * Corresponding author. Address: Department of Engineering and System Science, National Tsing Hua University, Hsinchu 30013, Taiwan, ROC. Tel.: +886 3 5742674; fax: +886 3 5720724. E-mail address: [email protected] (K.-S. Chang-Liao).
0167-9317/$ - see front matter Ó 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2007.03.003
complementary metal-oxide-semiconductor (CMOS) process. The major problem associated with these refractory metal nitride electrodes, such as TaN, TiN, and HfN is on their work function [4,6]; specially, the work functions of TaN/SiO2 and TaN/HfO2 structures increase with increasing the annealing temperature and finally reach a value of 4.7–4.8 eV [4,7]. Fortunately, it has been found by the authors that addition of a small amount of Hf into the TaN metal gate electrode can enhance the thermal stability [8]. In addition, the work function can be tuned to a desired value by controlling Hf and Ta concentrations in the metal gate. HfO2 has proven to be one of the most promising candidate to replace SiO2 as the gate dielectric in sub 0.1-lm CMOS devices due to its suitable dielectric constant [9– 12], relatively wide bandgap (5.6 eV) with sufficient band offset (1.4 eV) [13], and acceptable thermal stability in contact with Si [14]. However, HfO2 crystallizes at low temperature, leading to polycrystalline films with high leakage
C.-T. Yang et al. / Microelectronic Engineering 84 (2007) 2916–2920
paths along grain boundaries and non-uniformities in the k value and in the film thickness. Incorporation of nitrogen into HfO2 can increase the crystallization temperature [15]. HfON gate dielectric exhibits higher crystallization temperature and better thermal stability in contact with Si to withstand the conventional 800–900 °C activation annealing process. In addition, from scaling down point of view, HfON appears to be a promising gate dielectric material, as the incorporated nitrogen does not degrade the dielectric constant of the film. Nevertheless, there are still many challenges to be surmounted for the actual application of this gate dielectric together with its compatibility and thermal stability with advanced metal gates. In the present study, interaction of HfxTayN metal gate with HfOxNy and SiO2 gate dielectrics has been investigated from thermal stability and dielectric reliability point of view. In this regard, a comparative study between the most widely used SiO2 and HfOxNy gate dielectrics was studied. 2. Experimental The MOS devices were formed on (1 0 0)-oriented p-type silicon wafers with resistivity 15–25 X cm. After the conventional RCA cleaning, the wafers were subjected to a HF vapor clean for 90 s to remove native oxide. Next, hafnium nitride (HfxNy 2 nm) films were deposited onto the wafer using a reactive dc magnetron sputtering of a 99.9% pure Hf target in an Ar/N2 = 24/36 sccm ambient with a power density of 4.7 W/cm2 and a pressure of 7.6 mTorr. A post-deposition anneal (PDA) using rapid-thermalannealing (RTA) was then carried out at 850 °C in N2 gas for 60 s to form HfOxNy (4.5 nm). Note that some oxygen may already exist during the deposition of HfN by this sputtering. It is known that Hf-based dielectric is easily oxidized. To avoid excessive oxidation that might cause the formation of a thick interfacial layer between Si and high-k dielectric, post-deposition annealing (PDA) was performed in a N2 ambient with only a trace amount of residual oxygen in both chamber and the native oxide of Si surface. Meanwhile, SiO2 was formed onto (1 0 0)-oriented p-type silicon wafers with resistivity 15–25 X cm. After the conventional RCA cleaning and HF vapor clean, thermal oxide was grown at 800 °C in the furnace to form 2.0 nm SiO2. Next, HfxTayN (50 nm) films were deposited onto the HfOxNy and SiO2 films by a reactive dc magnetron cosputtering using 99.9% pure Hf and Ta targets with powers at 100 W and 150 W respectively in an Ar/N2 = 24/ 4.3 sccm ambient. The X-ray photoelectron spectroscopy (XPS) results show that the composition of HfxTayN film in this work is Hf0.27Ta0.58N0.15. A 100 nm TaN film was then deposited by sputtering to serve as a capping layer, and to prevent the top surface of HfxTayN from being oxidized during PMA. Subsequently, a PMA using RTA was carried out at 850 °C in N2 gas for 45 s. In order to get the compatibility and thermal stability of HfxTayN metal gate
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electrode, two additional PMA temperatures have been adopted, one below 850 °C (i.e. 750 °C) and the other above 850 °C (i.e. 950 °C). The TaN/HfxTayN gate electrode was then patterned by a helicon-wave plasma etching. A 500 nm thick Al film was deposited on the backsides of all samples. Finally, a sintering was conducted in a N2/H2 ambient at 420 °C for 30 min. 3. Results and discussion Fig. 1 illustrates the TOF-SIMS profiles of Hf and Ta for the two structures of: (a) Hf0.27Ta0.58N0.15/SiO2/Si and (b) Hf0.27Ta0.58N0.15/HfOxNy/Si MOS devices after a PMA temperature of 850 °C, respectively. It is quite obvious from the figure that the diffusion of Hf and Ta can extend into the Si substrate through the HfOxNy gate dielectric compared to SiO2 gate dielectric. Previous report showed that diffusion of refractory metals in high-k gate dielectrics is more significant than that of thermal oxide [16]. Refractory metal like Ta can even penetrate into the underline Si substrate. Compared to Ta, the diffusion of Hf is somehow more extended into Si substrate. This can
Fig. 1. Time-of–flight secondary ion mass spectroscopy (TOF-SIMS) profiles of: (a) Hf0.27Ta00.58N0.15/SiO2/Si and (b) Hf0.27Ta00.58N0.15/ HfOxNy/Si structures at a PMA temperature of 850 °C.
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be attributed to the lower bonding energy of Hf–N bonds (18.1 eV) [17] compared to Ta–N bonds (22.9 eV) [18]. On the other hand, nitrogen acts as a diffusion barrier for suppressing Hf and Ta to diffuse farther into the Si substrate. The interfaces of metal electrode/gate dielectric and gate dielectrics/Si are defined as the locations, where the count number of O is 10% of its maximum count number in the metal-oxide. Fig. 2 illustrates the equivalent oxide thickness (EOT) and gate leakage current density (Jg) (at Vg Vfb = 1 V) for the MOS capacitors with SiO2 or HfOxNy gate dielectrics, together with Hf0.27Ta0.58N0.15 metal gate stacks after three different PMA temperatures. The values of EOT were extracted from a simulation program considering quantum effects [19]. No significant variations of EOT and Jg are observed in both gate dielectrics with an increase in PMA temperature, indicating satisfactory thermal stability for HfTaN together with SiO2 or HfOxNy. The Jg value for the MOS capacitor with HfOxNy gate dielectric is larger due to the more recrystallization and the presence of defects at the metal gate/dielectric and dielectric/Si interfaces. To investigate the PMA induced variation of electrical property, the conductance (Gp) as a function of frequency (x) for all samples after different PMA temperatures are plotted as Gp/xA versus x by biasing the Si surface in depletion condition. Fig. 3a shows the maximum value of Gp/xA of MOS device with Hf0.27Ta00.58N0.15 gate electrode at different PMA temperatures and the interface trap density (Dit) is equal to (2.5/q)(Gp/xA)max at the maximum [20]. Fig. 3b illustrates the variations in Dit values of the MOS device with HfOxNy or SiO2 gate dielectrics after three different PMA temperatures. MOS device with HfOxNy gate dielectric shows higher Dit values compared to the one with SiO2. According to previous report [16],
Fig. 3. (a) The maximum value of Gp/xA of MOS capacitors with Hf0.27Ta00.58N0.15/HfON gate stack after different PMA temperatures and (b) interface trap density (Dit) of MOS capacitors with HfOxNy and SiO2 gate dielectrics after various PMA temperatures extracted from the conductance method.
Fig. 2. EOT and Jg for metal gate Hf0.27Ta00.58N0.15 with HfOxNy and SiO2 gate dielectrics at 750 °C, 850 °C and 950 °C PMA temperatures.
Ta atoms can penetrate into the high-k layer and Si substrate, which, in turn, degrade the bulk carrier lifetime. In addition, penetrated Ta atoms can also give rise to higher interface states and enhancement in pre-existing traps. Though, addition of nitrogen (i.e. HfOxNy type) can suppress the diffusion of metal ions, the incorporated nitrogen also induces additional trapped charges. The variation in the Dit values for the MOS capacitor with SiO2 gate dielectric is negligible. This can be attributed to the excellent interface properties of SiO2 and its excellent thermal stability. Fig. 4a shows the flat-band voltage of MOS device with Hf0.27Ta00.58N0.15/HfOxNy structure after different PMA
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Fig. 4. (a) The flat-band voltage of MOS devices with Hf0.27Ta0.58N0.15/ HfOxNy structure at different PMA temperature and (b) the work function of the Hf0.27Ta0.58N0.15 metal gate in MOS device with both two HfOxNy and SiO2 gate dielectrics.
temperatures. The work function of metal gate can be extracted based on the flat-band voltage. Fig. 4b shows the work function of the Hf0.27Ta00.58N0.15 metal gate with both HfOxNy and SiO2 structures. It is observed that work functions are around 4.6 eV and 4.7 eV for HfxTayN with SiO2 and HfOxNy gate dielectrics, respectively. It is also shown that variation of work function with SiO2 and HfOxNy stack is very small with varying PMA temperatures, indicating the good thermal stability of these SiO2 and HfOxNy stacks. A constant voltage stress ( 12 MV/cm) has been applied for different span of time. The corresponding changes in DVfb values for MOS devices of both Hf0.27Ta00.58N0.15 /HfOxNy/Si and Hf0.27Ta00.58N0.15/ SiO2/Si after various PMA temperatures are shown in Fig. 5a. No significant changes in DVfb values are noticed with the increase in stress time. However, for the Hf0.27Ta0.58N0.15/HfOxNy/Si MOS capacitor, there is a sig-
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Fig. 5. (a) Flat-band voltage shifts (DVfb) as a function of stress time for Hf0.27Ta00.58N0.15/SiO2/Si and Hf0.27Ta00.58N0.15/HfOxNy/Si devices at various PMA temperatures. An F–N constant voltage stress of 12 MV/ cm has been applied for different span of time and (b) defect generation rate (Pg) for Hf0.27Ta00.58N0.15/SiO2/Si and Hf0.27Ta00.58N0.15/HfOxNy/Si devices at various PMA temperatures.
nificant increase in DVfb values with increasing PMA temperature, indicating that the DVfb values are influenced by high-temperature thermal cycle. This is because positive charges are generated after the stress at 12 MV/cm to cause the flat-band voltage shift. The amount of flat-band voltage shift is larger as the PMA temperature is higher because the diffusion length of Ta and Hf is increased to cause more metal ions to be trapped in high-k layer which makes the quality of interface of dielectric film to become worse. On the other hand, the flat-band voltage shift for SiO2 is smaller after the stress because of fewer oxide trap existed in SiO2 bulk. Defect generation rate (Pg) is a clear indicator to assess the effect of interface trap-assisted tunneling [21]. The Pg is extracted from the linear portion of the relationship
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between [(Jg J0)/J0] and injected charge (Qinj). Fig. 5b shows the extracted defect generation rate (Pg) for the Hf0.27Ta00.58N0.15 metal gate with HfOxNy or SiO2 gate dielectrics after different PMA temperatures. Results indicated that Pg value for SiO2 increases less significantly with increasing PMA temperatures as compared to HfOxNy, which can be due to the better SiO2/Si interface quality. 4. Conclusion Electrical characteristics of MOS device based on HfxTayN metal gate with SiO2 and HfOxNy gate dielectrics after various PMA temperatures have been investigated in this work. MOS device based on SiO2 gate dielectric with metal gate HfxTayN shows good thermal stability. Compared to HfOxNy gate dielectric, SiO2 shows better electrical properties, such as leakage current, interface trap density and stress-induced flat-band voltage shift. The thermal stability and electrical properties of MOS devices with Hf0.27Ta00.58N0.15 metal gate and SiO2 gate dielectric remain almost unchanged with increasing PMA temperature, revealing that it can be a promising candidate for advanced CMOS technology. Acknowledgements The authors would like to thank the National Science Council of Republic of China for financially supporting this research. Technical support from National Nano Device Laboratories (NDL) of the ROC is also acknowledged. References [1] International Technology Roadmap for Semiconductors, Semiconductor Industry association, San Jose, CA, 2001.
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