- Email: [email protected]
Investigation of a simultaneous multifunctional photonic logic gate based on bidirectional FWM
Optics Communications 308 (2013) 115–120
Contents lists available at SciVerse ScienceDirect
Optics Communications journal homepage: www.elsevier.com/locate/optcom
Investigation of a simultaneous multifunctional photonic logic gate based on bidirectional FWM Lanlan Li a,b,n, Tingting Lv b, Jian Wu b,1 a b
College of Physics and Information Engineering, Fuzhou University, Fuzhou, PR China State Key Laboratory of Information Photonics and Optical Communications Beijing University of Posts and Telecommunications, Beijing 100876, PR China
art ic l e i nf o
a b s t r a c t
Article history: Received 22 April 2013 Received in revised form 11 June 2013 Accepted 14 June 2013 Available online 8 July 2013
We demonstrate a multi-functional photonic logic gate for RZ-PolSK signals based on four wave mixing (FWM) in highly nonlinear fiber (HNLF). Bidirectional operation with one spool of HNLF is implemented numerically at 40 Gb/s. The basic logic arithmetics, such as XOR, AB; AB, XNOR, AND, NOR, and complex logic functions such as half-subtracter, half-adder, comparator and decoder are simultaneously realized by adjusting the polarization controllers. This novel structure is low-cost and rather flexible. Proper logic results, clear waveforms and high Q factors of eye diagrams are presented. Simulation analysis shows that bit error-free operation for the logic gate can be obtained when the wavelength separation is from 7 to 6 nm for two input signals. The impact of the input power on the Q factor is also investigated. Due to the femoto-second response time of Kerr-effect in HNLF we used in the scheme, the logic gate has great potential in future ultra-high speed optical transmission systems. & 2013 Elsevier B.V. All rights reserved.
Keywords: All-optical signal processing Four-wave mixing Highly nonlinear fiber (HNLF) Multi-functional logic gate Polarization shift keying (PolSK)
1. Introduction All optical signal processing plays an important role in future ultra-high optical network to overcome the bottleneck posed by the optical–electrical–optical conversions. Recent years various techniques have been extensively investigated, such as wavelength conversion [1], demultiplexing [2] and regeneration [3]. All optical logic operation is a key element in wide applications including parity checking, switching, and address recognition, etc. Rather than just a single logic operation is realized, a simultaneous multifunctional photonic logic gate (SMPLG) is more desirable for its flexibility, and cost-effectiveness [4–6]. Several approaches have been proposed to achieve a SMPLG [4–6,8,9,12,13]. Nonlinear effects in semiconductor optical amplifier (SOA) [4], optical fiber [5], periodically-poled lithium-niobate (PPLN) waveguide [6] and chalcogenide (ChG) [7] are mainly exploited to implement logic functions in previous literatures. HNLF is very attractive for its near-instantaneous response time, low noise and cost. Polarization shifted keying (PolSK) format, which uses the state of polarization (SOP) as the informationbearing parameter, has a high insensitivity to laser phase noise in coherent systems [10–11]. A SMPLG for PolSK signals (AND, NOR, AB, AB, XNOR, XOR, half adder, half subtracter, decoder, and
n
Corresponding author. Tel.: +86 591 22865132. E-mail address: [email protected] (L. Li). 1 IEEE member.
0030-4018/$ - see front matter & 2013 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.optcom.2013.06.029
comparator) is numerically investigated using four wave mixing (FWM) in a couple of SOAs [12]. However, its performance in ultrahigh speed systems will be limited by slow carrier recovery time in SOA and large power consumption. Based on our previous experimental demonstration of the reconfigurable logic gate with power penalties less than 3 dB for the gates XNOR, XOR, AND, NOR, AB, AB, and half subtracter at 10 Gb/s [13], in this paper, we exploit a new bidirectional structure to realize the SMPLG for RZ-PolSK signals at 40 Gb/s using bidirectional FWM in HNLF [14]. The structure not only decreases the cost because only one spool of HNLF is used, but also implements all the logic functions simultaneously, including simple functions such as XOR, XNOR, AB, AB, AND, NOR, and the complex functions such as half adder, half subtracter, decoder and comparator. The wavelength characteristic of the logic gates and the impact of the input power are respectively detailedly analyzed. Given the femtosecond response time of Kerr effect in HNLF, the module is promising in ultra-speed systems. 2. Principle The operating principle of the proposed SMPLG is illustrated in Fig. 1. In binary PolSK encoding, a logical “1” corresponds to a given linear state of polarization (SOP) and “0” corresponds to the orthogonal state. Therefore, the input PolSK signals are distributed in two orthogonal SOPs, as data A and B shown in Fig. 1. Two synchronized RZ-PolSK signals are launched into a HNLF. Inside
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Two 40 Gb/s RZ-PolSK pulse sources work at different wavelengths. The input signals A and B are synchronized independent 26 bit-length, pseudorandom bit sequences. An ideal erbiumdoped fiber amplifier (EDFA) with gain 27 dB and noise figure 5 dB, is employed to amplify each input PolSK signal. According to the previous experiment [13], we set the parameters of HNLF as follows: the effective length of 1 km, the attenuation factor of 0.78 dB/km at 1550 nm, nonlinear coefficient of 10.5 W 1 km 1, dispersion of 0.3 ps/nm/km, dispersion slope of 0.018 ps/nm2/km at 1550 nm, zero-dispersion pffiffiffiffiffiffiffiffi wavelength of 1567.2 nm, the PMD parameter of 0:03 ps= km. An optical delay line (ODL) and a polarization controller (PC) are used for each direction operation to align the time and the polarization. Two circulators are exploited to realize bidirectional operation. Band-pass filter (BPF) is used to filter the idler. We use a polarization controller (PC) and a PBS to implement polarization detection. Output signals are all finally detected by photodiode receivers with 50 GHz bandwidth. The electric field associated with two orthogonal polarized optical waves can be written as
the HNLF, the FWM arises from beating between signal components with the same SOP. For the two orthogonal polarized components under ideal conditions (perfect cylindrical symmetry and stress-free fiber), FWM does not occur between them [15,18]. The generated FWM idlers possess the same SOP with the corresponding signal components. By detecting the idlers, the proposed different logic functions are realized. In one case, when two signals A and B are both logic “1” or “0” in a fixed bit transition before they are sent into the HNLF, when FWM occurs, the resulting intensity and polarization state of the idler can be obtained. If the intensity of the idler is directly detected at the output end of HNLF, a logic XNOR gate can be achieved. If we further separate two polarization components by a polarization beam splitter (PBS), then a logic AND gate and a NOR gate can be realized. In the other case, when the SOP of the signal B is rotated by 901 to be vertical to signal A, a logical XOR, AB, AB gate can be obtained similarly by intensity detection and polarization detection, respectively [14]. Based on the above basic logic operations, we can further obtain the half subtracter, half adder, decoder and comparator with different combinations, as concluded in Table 1. Such as the XOR could represent the difference between A and B, and the isolated AB and AB indicate the results of borrow (B–A) and borrow (A–B) respectively. Combining XOR, AB and AB simultaneously, an all-optical half-subtracter is achieved. Consequently, the six simple logic gates: XNOR, XOR, AB, AB, AND, NOR, and four complex gates: half adder, half subtracter, comparator, decoder can all be implemented simultaneously.
! ! E ¼ Ex e x þ Ey e y
ð1Þ
where Ex and Ey are the complex amplitudes of the polarization ! ! components of the field with the same carrier. e x , e y are orthonormal polarization eigenvectors. β0j is the corresponding propagation constants (j¼x, y). The slowly varying amplitudes, Ex and Ey, are found to satisfy the following set of two coupled-mode equations [15]. ∂Ex ∂Ex iβ2 ∂2 Ex α 2 þ β1x þ þ Ex ¼ iγ jEx j2 þ jEy j2 Ex 2 2 3 ∂z ∂t 2 ∂t þ
3. Simulation structure
iγ n 2 E E expð2iΔβzÞ 3 x y
ð2Þ
∂Ey ∂Ex iβ2 ∂2 Ey α 2 2 2 E jE þ β1y þ þ ¼ iγ jE j þ j Ey y y x 2 3 ∂z ∂t 2 ∂t 2
The proposed bidirectional structure for the SMPLG is shown in Fig. 2. The PolSK signal is generated by polarization multiplexing two intensity-modulated signals respectively coded by complementary patterns [10]. The Gaussian pulse is with 33% duty cycle.
þ
iγ n 2 E E expð2iΔβzÞ 3 y x
ð3Þ
where βi is the ith order dispersion parameter at the optical wave frequency, α is the fiber loss, γ is the nonlinear factor, Δβ ¼ β0x β0y ¼ ð2π=LB Þ is related to the modal birefringence of the fiber. LB is the beat length in the low birefringence fiber. Split-step Fourier
Fig. 1. Principle of the SMPLG.
Fig. 2. Bidirectional structure of the proposed SMPLG.
Table 1 Truth table of the SMPLG Inputs
XOR
A
B
0 0 1 1
0 1 0 1
XNOR
AB
AB
AND
NOR
Half subtracter Diff.
0 1 1 0
1 0 0 1
0 0 1 0
0 1 0 0
0 0 0 1
1 0 0 0
0 1 1 0
Half adder Bor.
0 1 0 0
0 0 1 0
Car.
Add.
0 0 0 1
0 1 1 0
Decoder
1 0 0 0
0 1 0 0
0 0 1 0
Comparator
0 0 0 1
＞
＝
＜
0 0 1 0
1 0 0 1
0 1 0 0
L. Li et al. / Optics Communications 308 (2013) 115–120
method (SSFM) is utilized to solve the model. First and second order group velocity dispersion (GVD) effects, self-phase modulation (SPM), XPM between orthogonal polarization components and FWM effect are all taken into account. To further access the realistic situations, random mode coupling is also considered to simulate the polarization-mode dispersion (PMD) effect using the coarse-step method [16]. So the polarization states of the pulse change randomly along the fiber during propagation.
117
The normalized FWM efficiency in HNLF can be directly analyzed by equations below [17]: Δk ¼
η¼
πλ40 dD 2ðf pump f probe Þ2 ðf pump f 0 Þ c2 dλ α2
α2 þ ðΔkÞ2
" 1þ
# 4eαL sin2 ðΔk=2Þ ð1eαL Þ2
ð4Þ
ð5Þ
Δk is the phase-mismatching. λ0 is the zero dispersion wavelength and f0 is the corresponding frequency. c is the rate of light in vacuum. D is the dispersion and dD/dλ is the dispersion slope. η is the efficiency. fpump and fprobe are respectively the frequencies of pump light and probe light. L is the length of the fiber. When Δk¼ 0, the phase-matching condition is satisfied and the normalized efficiency achieves the maximum value 1. Q factor is used to evaluate the performance of logic gates. It is defined by Q¼
jε1 ε0 j δ1 þ δ0
ð6Þ
where ε1 , ε0 are the mean values of “one” level and “zero” level, while δ1 and δ0 are the standard deviations of “one” and “zero”, respectively. 4. Results and discussions: 4.1. Function demonstration
Fig. 3. (a) Optical spectrum of the PolSK signal at 1545 nm. (b) Optical spectrums of FWM after HNLF and the filtered idler.
The wavelengths of two PolSK signals are 1542 nm and 1545 nm. Fig. 3(a) gives the spectrum of the signal B. The total input power into the HNLF for each direction is maintained at 13.48 dBm. Idler component at 1539 nm is selected by using a tunable band-pass filter (BPF) with 0.8 nm bandwidth, as shown in Fig. 3(b). In order to validate the logic functions presented in Fig. 1, the sample 16-bit optical intensity sequences of defined x (logical “0”)-, y (logical “1”)-axis polarization components for signal A and B, their logic results, and corresponding electrical eye diagrams are respectively shown in Fig. 4. The sample sequences of signal A and B are 0100 1011 0111 0110 and 1001 0110 1110 1100, respectively. The proposed multifunctional logic gate is successfully achieved
Fig. 4. Optical waveforms and corresponding electrical eye diagrams for data A, data B at x-, y-polarizations, and output logical results.
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with nice performance. The ghost pulses appear in some “0” positions of the logic gates waveforms are induced by weak coupling between the orthogonal components of two signals in these bit slots. Due to the modal birefringence we considered in the fiber, the polarization states of the input change periodically along the fiber from linear to elliptic, elliptic to circular, and then back to linear. This phenomenon results in components at principal x-axis and y-axis appear. The measured Q factors of XNOR, XOR, AND, A and NOT (B), NOR and NOT (A) and B are respectively 11.3 dB, 11.1 dB, 13.5 dB, 9.8 dB, 11.8 dB and 12.8 dB. In the simulations, Q factor of above 6 corresponds to bit error free operation at 10–9 BER. The widths of electrical eye diagrams shown in Fig. 4 are wider than 33% bit period and the amplitudes are lower than those of the optical waveforms. They are both due to the limited bandwidth of receiver. Pedestals at “0” level and variations at “1” level of the logic gates can be attributed to the amplified spontaneous noise (ASE) from the EDFA. As mentioned above, the logic gates AND, NOR, A and NOT (B), NOT (A) and B can be obtained respectively by splitting the gates XNOR and XOR using PBSs. As demonstrated in [11], as long as the polarization states of the PolSK signals and the main axes of the PBS have been aligned with each other, improving the extinction ratio of the PBS, the performances of logic gates AND, NOR, A and NOT (B), NOT (A) and B could not be worse than those of logic gate XNOR and XOR. To simplify the calibration, we select the XNOR and XOR gates to make intensive research below. 4.2. Performance analysis The dependence of FWM efficiency on the wavelength detuning is calculated using Eq. (4) and (5). As shown in Fig. 5(a), when the wavelength of pump light λA is fixed at 1542 nm and the wavelength of probe light λB is changed from 1532 to 1552 nm, the normalized FWM efficiency deteriorates with the increment of detuning. When λB is 1536 nm and 1548 nm, the normalized efficiency has decreased to be as low as around 0.0089. This indicates that there exists an operating wavelength range for the logic gate. We further demonstrated the relationship between the sensitivity of the logic gate and the wavelength position of the probe light. λB is changed by the step of 1 nm. For each couple of wavelengths, the input power is adjusted respectively to achieve bit error-free operation and the sensitivity is recorded. As shown in Fig. 5(b), the sensitivity varies as λB is changed from 1535 to 1548 nm, but it maintains in the range of 21.3 dB to 19.2 dB. This shows that the bit error-free operation can be obtained for these wavelength positions. However, for λB lower than 1535 nm and higher than 1548 nm, the bit error ratio less than 10–9 cannot be obtained by adjusting the input power because of the rather low FWM efficiency. We also choose different wavelength separations to investigate the relationships between the Q factors and the input power for logic gates XOR and XNOR. Three pairs of signal wavelengths of different wavelength separations (WS) are selected. λA is fixed at 1542 nm, while λB is set as 1536 nm, 1545 nm and 1548 nm, i.e., the WSs are 6 nm, 3 nm, and 6 nm respectively. Idlers at shorter wavelengths are correspondingly selected to research performances of the logic gates. The input powers into the two ends of the HNLF are varied while being kept the same with each other all the time. Other parameters are kept constant. Theoretical results of the input power versus the Q factors of eye diagrams for XNOR, XOR gates and FWM efficiency are shown in Fig. 6 respectively. FWM efficiency is defined as the ratio of the filtered idler average power and input pump power in the same direction. As can be seen from Fig. 6, Q factor for different WS is closely correlated to the FWM efficiency. For the three pairs of wavelengths, the
Fig. 5. (a) Calculation result for normalized FWM efficiency as a function of probe wavelength when pump wavelength is 1542 nm. (b) The sensitivities of logic gates XOR and XNOR when λB changes in the C band.
minimum input powers to achieve bit error free operation of XOR gate are 18.1 dBm, 12.3 dBm and 20.8 dBm and the corresponding efficiency are 33 dB, 28.9 dB and 33.4 dB, respectively. When the WS of two signal sources is larger, higher input power is required to obtain clear eye diagrams. This is mostly attributed to the decrease of FWM efficiency in HNLF when the WS increases. With WS above 6 nm, the performance of the SPMLG degrades significantly because of the low FWM efficiency even though we improve the power. Fig. 7(a) and (b) shows the waveforms of logic gates XOR and XNOR when the WS is 7 nm and the input power is 20.3 dBm. The measured FWM efficiency is 37 dB. We can observe that, there are distinct amplitude jitters on the logical “1” level, and noise on the logical “0” level. The Q factors are 4.9 and 4.6, which cannot support the bit error-free operation. Higher power accelerates some unwanted nonlinear effects, such as SPM and XPM, which worsen the performance of the logic gate. In general, the bit error-free operation can be obtained when the WS is 7 6 nm.
5. Conclusions We propose a novel scheme of a SMPLG for RZ-PolSK signals at 40 Gb/s. Only a spool of HNLF is used to demonstrate the simultaneous
L. Li et al. / Optics Communications 308 (2013) 115–120
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Fig. 6. The relationship between Q factors for logic gates XOR\XNOR and input powers, when the two PolSK signal wavelength separations are respectively at 6 nm, 3 nm and 6 nm.
results, clear eye diagrams indicate favorable performance of the scheme. Q factors for the eye diagrams of the logic gates are closely related to the FWM efficiency. To obtain error free operation, WS between 7 nm and 6 nm should be kept. Due to the femoto-second time scale response time of Kerr-effect in HNLF we used in the scheme, the logic gate shows potential nice performance in highspeed optical transmission systems.
Acknowledgment This work was partly supported by the Fundamental Research Funds for the Central Universities 0460-022521 and Fuzhou University Science and Technology Project 0110–600893.
References
Fig. 7. The waveforms of logic gates XOR (a) and XNOR (b) with the wavelength separation at 7 nm.
realization of 6 simple gates and 4 complex gates (XOR, AB, AB, XNOR, AND, NOR, half-subtracter, half-adder, comparator, and decoder). This new structure is low-cost, multi-functional and flexible. Proper logic
[1] Motoharu Matsuura, Naoto Kishi, IEEE Photonics Technology Letters 23 (2011) 615. [2] Xiaoxia Wu, Antonella Bogoni, Jian Wang, Hao Huang, Scott Nuccio, Omer Yilmaz, and Alan Willner, 40-to-640-Gbit/s multiplexing and subsequent 640to-10-Gbit/s demultiplexing using cascaded nonlinear optical loop mirrors, in: Proceedings of the Conference on Optical Fiber Communications (OFC), paper OWG7 pdf (2011). [3] Tomofumi Kise, Kimchau N. Nguyen, John M. Garcia, Henrik N. Poulsen, Daniel J. Blumenthal, Optics Express 19 (2011) 9330. [4] X. Chen, Y. Yu, X. Zhang, IEEE Photonics Technology Letters 23 (2011) 118. [5] K. Sun, J. Qiu, M. Rochette, L.R. Chen, All-optical logic gates (x or, and, and or) based on cross phase modulation in a highly nonlinear fiber, in: Proceedings of the European Conference and Exhibition on optical Communication (ECOC), paper 3.3.7 pdf (2009). [6] A. Bogoni, X. Wu, Z. Bakhtiari, S..Nuccio, A.E. Willner, 640 Gb/s all-optical logic functions in a PPLN waveguide, in: Proceedings of the European Conference and Exhibition on optical Communication (ECOC), paper Mo.1.A.5 (2010). [7] T.D. Vo, R. Pant, M.D. Pelusi, J. Schröder, D. Choi, S.K. Debbarma, S.J. Madden, B. L. Davies, B.J. Eggleton, Optics Letters 36 (2011) 712. [8] A. Bogris, P. Velanas, D. Syvridis, IEEE Photonics Technology Letters 19 (2007) 402. [9] P. Velanas, A. Bogris, D. Syvridis, Optical Fiber Technology 15 (2009) 65. [10] S. Benedetto, P. Poggiolini, IEEE Transactions on Communications 40 (1992) 708. [11] M.M. Matalgah, R.M. Radaydeh, Journal of Lightwave Technology 23 (2005) 1152. [12] P. Li, D. Huang, X. Zhang, IEEE Journal of Quantum Electronics 45 (2009) 1542. [13] L. Li, J. Wu, J. Qiu, B. Wu, K. Xu, X. Hong, Y. Li, J. Lin, Optics Communications 283 (2010) 3608.
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[14] L. Li, B. Wu, J. Qiu, Y. Li, H. Guo, Y. Zuo, X. Hong, Y. Dai, K. Xu, J. Wu, J. Lin, Simultaneous realization of a multifunctional photonic logic gate based on bidirectional FWM, in: Proceedings of the IEEE Photonics Conference (PHO), pp. 375–376 (2011). [15] G.P. Agrawal, Nonlinear Fiber Optics, 3rd ed., New York: Academic, pp. 203–210.
[16] D. Marcuse, C.R. Menyuk, P.K.A. Wai, IEEE Journal of Lightwave Technology 15 (1997) 1735. [17] Kyo Inoue, IEEE Journal of Lightwave Technology 10 (1992) 1553. [18] Kyo Inoue, IEEE Journal of Lightwave Technology 28 (1992) 883.
Contents lists available at SciVerse ScienceDirect
Optics Communications journal homepage: www.elsevier.com/locate/optcom
Investigation of a simultaneous multifunctional photonic logic gate based on bidirectional FWM Lanlan Li a,b,n, Tingting Lv b, Jian Wu b,1 a b
College of Physics and Information Engineering, Fuzhou University, Fuzhou, PR China State Key Laboratory of Information Photonics and Optical Communications Beijing University of Posts and Telecommunications, Beijing 100876, PR China
art ic l e i nf o
a b s t r a c t
Article history: Received 22 April 2013 Received in revised form 11 June 2013 Accepted 14 June 2013 Available online 8 July 2013
We demonstrate a multi-functional photonic logic gate for RZ-PolSK signals based on four wave mixing (FWM) in highly nonlinear fiber (HNLF). Bidirectional operation with one spool of HNLF is implemented numerically at 40 Gb/s. The basic logic arithmetics, such as XOR, AB; AB, XNOR, AND, NOR, and complex logic functions such as half-subtracter, half-adder, comparator and decoder are simultaneously realized by adjusting the polarization controllers. This novel structure is low-cost and rather flexible. Proper logic results, clear waveforms and high Q factors of eye diagrams are presented. Simulation analysis shows that bit error-free operation for the logic gate can be obtained when the wavelength separation is from 7 to 6 nm for two input signals. The impact of the input power on the Q factor is also investigated. Due to the femoto-second response time of Kerr-effect in HNLF we used in the scheme, the logic gate has great potential in future ultra-high speed optical transmission systems. & 2013 Elsevier B.V. All rights reserved.
Keywords: All-optical signal processing Four-wave mixing Highly nonlinear fiber (HNLF) Multi-functional logic gate Polarization shift keying (PolSK)
1. Introduction All optical signal processing plays an important role in future ultra-high optical network to overcome the bottleneck posed by the optical–electrical–optical conversions. Recent years various techniques have been extensively investigated, such as wavelength conversion [1], demultiplexing [2] and regeneration [3]. All optical logic operation is a key element in wide applications including parity checking, switching, and address recognition, etc. Rather than just a single logic operation is realized, a simultaneous multifunctional photonic logic gate (SMPLG) is more desirable for its flexibility, and cost-effectiveness [4–6]. Several approaches have been proposed to achieve a SMPLG [4–6,8,9,12,13]. Nonlinear effects in semiconductor optical amplifier (SOA) [4], optical fiber [5], periodically-poled lithium-niobate (PPLN) waveguide [6] and chalcogenide (ChG) [7] are mainly exploited to implement logic functions in previous literatures. HNLF is very attractive for its near-instantaneous response time, low noise and cost. Polarization shifted keying (PolSK) format, which uses the state of polarization (SOP) as the informationbearing parameter, has a high insensitivity to laser phase noise in coherent systems [10–11]. A SMPLG for PolSK signals (AND, NOR, AB, AB, XNOR, XOR, half adder, half subtracter, decoder, and
n
Corresponding author. Tel.: +86 591 22865132. E-mail address: [email protected] (L. Li). 1 IEEE member.
0030-4018/$ - see front matter & 2013 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.optcom.2013.06.029
comparator) is numerically investigated using four wave mixing (FWM) in a couple of SOAs [12]. However, its performance in ultrahigh speed systems will be limited by slow carrier recovery time in SOA and large power consumption. Based on our previous experimental demonstration of the reconfigurable logic gate with power penalties less than 3 dB for the gates XNOR, XOR, AND, NOR, AB, AB, and half subtracter at 10 Gb/s [13], in this paper, we exploit a new bidirectional structure to realize the SMPLG for RZ-PolSK signals at 40 Gb/s using bidirectional FWM in HNLF [14]. The structure not only decreases the cost because only one spool of HNLF is used, but also implements all the logic functions simultaneously, including simple functions such as XOR, XNOR, AB, AB, AND, NOR, and the complex functions such as half adder, half subtracter, decoder and comparator. The wavelength characteristic of the logic gates and the impact of the input power are respectively detailedly analyzed. Given the femtosecond response time of Kerr effect in HNLF, the module is promising in ultra-speed systems. 2. Principle The operating principle of the proposed SMPLG is illustrated in Fig. 1. In binary PolSK encoding, a logical “1” corresponds to a given linear state of polarization (SOP) and “0” corresponds to the orthogonal state. Therefore, the input PolSK signals are distributed in two orthogonal SOPs, as data A and B shown in Fig. 1. Two synchronized RZ-PolSK signals are launched into a HNLF. Inside
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L. Li et al. / Optics Communications 308 (2013) 115–120
Two 40 Gb/s RZ-PolSK pulse sources work at different wavelengths. The input signals A and B are synchronized independent 26 bit-length, pseudorandom bit sequences. An ideal erbiumdoped fiber amplifier (EDFA) with gain 27 dB and noise figure 5 dB, is employed to amplify each input PolSK signal. According to the previous experiment [13], we set the parameters of HNLF as follows: the effective length of 1 km, the attenuation factor of 0.78 dB/km at 1550 nm, nonlinear coefficient of 10.5 W 1 km 1, dispersion of 0.3 ps/nm/km, dispersion slope of 0.018 ps/nm2/km at 1550 nm, zero-dispersion pffiffiffiffiffiffiffiffi wavelength of 1567.2 nm, the PMD parameter of 0:03 ps= km. An optical delay line (ODL) and a polarization controller (PC) are used for each direction operation to align the time and the polarization. Two circulators are exploited to realize bidirectional operation. Band-pass filter (BPF) is used to filter the idler. We use a polarization controller (PC) and a PBS to implement polarization detection. Output signals are all finally detected by photodiode receivers with 50 GHz bandwidth. The electric field associated with two orthogonal polarized optical waves can be written as
the HNLF, the FWM arises from beating between signal components with the same SOP. For the two orthogonal polarized components under ideal conditions (perfect cylindrical symmetry and stress-free fiber), FWM does not occur between them [15,18]. The generated FWM idlers possess the same SOP with the corresponding signal components. By detecting the idlers, the proposed different logic functions are realized. In one case, when two signals A and B are both logic “1” or “0” in a fixed bit transition before they are sent into the HNLF, when FWM occurs, the resulting intensity and polarization state of the idler can be obtained. If the intensity of the idler is directly detected at the output end of HNLF, a logic XNOR gate can be achieved. If we further separate two polarization components by a polarization beam splitter (PBS), then a logic AND gate and a NOR gate can be realized. In the other case, when the SOP of the signal B is rotated by 901 to be vertical to signal A, a logical XOR, AB, AB gate can be obtained similarly by intensity detection and polarization detection, respectively [14]. Based on the above basic logic operations, we can further obtain the half subtracter, half adder, decoder and comparator with different combinations, as concluded in Table 1. Such as the XOR could represent the difference between A and B, and the isolated AB and AB indicate the results of borrow (B–A) and borrow (A–B) respectively. Combining XOR, AB and AB simultaneously, an all-optical half-subtracter is achieved. Consequently, the six simple logic gates: XNOR, XOR, AB, AB, AND, NOR, and four complex gates: half adder, half subtracter, comparator, decoder can all be implemented simultaneously.
! ! E ¼ Ex e x þ Ey e y
ð1Þ
where Ex and Ey are the complex amplitudes of the polarization ! ! components of the field with the same carrier. e x , e y are orthonormal polarization eigenvectors. β0j is the corresponding propagation constants (j¼x, y). The slowly varying amplitudes, Ex and Ey, are found to satisfy the following set of two coupled-mode equations [15]. ∂Ex ∂Ex iβ2 ∂2 Ex α 2 þ β1x þ þ Ex ¼ iγ jEx j2 þ jEy j2 Ex 2 2 3 ∂z ∂t 2 ∂t þ
3. Simulation structure
iγ n 2 E E expð2iΔβzÞ 3 x y
ð2Þ
∂Ey ∂Ex iβ2 ∂2 Ey α 2 2 2 E jE þ β1y þ þ ¼ iγ jE j þ j Ey y y x 2 3 ∂z ∂t 2 ∂t 2
The proposed bidirectional structure for the SMPLG is shown in Fig. 2. The PolSK signal is generated by polarization multiplexing two intensity-modulated signals respectively coded by complementary patterns [10]. The Gaussian pulse is with 33% duty cycle.
þ
iγ n 2 E E expð2iΔβzÞ 3 y x
ð3Þ
where βi is the ith order dispersion parameter at the optical wave frequency, α is the fiber loss, γ is the nonlinear factor, Δβ ¼ β0x β0y ¼ ð2π=LB Þ is related to the modal birefringence of the fiber. LB is the beat length in the low birefringence fiber. Split-step Fourier
Fig. 1. Principle of the SMPLG.
Fig. 2. Bidirectional structure of the proposed SMPLG.
Table 1 Truth table of the SMPLG Inputs
XOR
A
B
0 0 1 1
0 1 0 1
XNOR
AB
AB
AND
NOR
Half subtracter Diff.
0 1 1 0
1 0 0 1
0 0 1 0
0 1 0 0
0 0 0 1
1 0 0 0
0 1 1 0
Half adder Bor.
0 1 0 0
0 0 1 0
Car.
Add.
0 0 0 1
0 1 1 0
Decoder
1 0 0 0
0 1 0 0
0 0 1 0
Comparator
0 0 0 1
＞
＝
＜
0 0 1 0
1 0 0 1
0 1 0 0
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method (SSFM) is utilized to solve the model. First and second order group velocity dispersion (GVD) effects, self-phase modulation (SPM), XPM between orthogonal polarization components and FWM effect are all taken into account. To further access the realistic situations, random mode coupling is also considered to simulate the polarization-mode dispersion (PMD) effect using the coarse-step method [16]. So the polarization states of the pulse change randomly along the fiber during propagation.
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The normalized FWM efficiency in HNLF can be directly analyzed by equations below [17]: Δk ¼
η¼
πλ40 dD 2ðf pump f probe Þ2 ðf pump f 0 Þ c2 dλ α2
α2 þ ðΔkÞ2
" 1þ
# 4eαL sin2 ðΔk=2Þ ð1eαL Þ2
ð4Þ
ð5Þ
Δk is the phase-mismatching. λ0 is the zero dispersion wavelength and f0 is the corresponding frequency. c is the rate of light in vacuum. D is the dispersion and dD/dλ is the dispersion slope. η is the efficiency. fpump and fprobe are respectively the frequencies of pump light and probe light. L is the length of the fiber. When Δk¼ 0, the phase-matching condition is satisfied and the normalized efficiency achieves the maximum value 1. Q factor is used to evaluate the performance of logic gates. It is defined by Q¼
jε1 ε0 j δ1 þ δ0
ð6Þ
where ε1 , ε0 are the mean values of “one” level and “zero” level, while δ1 and δ0 are the standard deviations of “one” and “zero”, respectively. 4. Results and discussions: 4.1. Function demonstration
Fig. 3. (a) Optical spectrum of the PolSK signal at 1545 nm. (b) Optical spectrums of FWM after HNLF and the filtered idler.
The wavelengths of two PolSK signals are 1542 nm and 1545 nm. Fig. 3(a) gives the spectrum of the signal B. The total input power into the HNLF for each direction is maintained at 13.48 dBm. Idler component at 1539 nm is selected by using a tunable band-pass filter (BPF) with 0.8 nm bandwidth, as shown in Fig. 3(b). In order to validate the logic functions presented in Fig. 1, the sample 16-bit optical intensity sequences of defined x (logical “0”)-, y (logical “1”)-axis polarization components for signal A and B, their logic results, and corresponding electrical eye diagrams are respectively shown in Fig. 4. The sample sequences of signal A and B are 0100 1011 0111 0110 and 1001 0110 1110 1100, respectively. The proposed multifunctional logic gate is successfully achieved
Fig. 4. Optical waveforms and corresponding electrical eye diagrams for data A, data B at x-, y-polarizations, and output logical results.
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with nice performance. The ghost pulses appear in some “0” positions of the logic gates waveforms are induced by weak coupling between the orthogonal components of two signals in these bit slots. Due to the modal birefringence we considered in the fiber, the polarization states of the input change periodically along the fiber from linear to elliptic, elliptic to circular, and then back to linear. This phenomenon results in components at principal x-axis and y-axis appear. The measured Q factors of XNOR, XOR, AND, A and NOT (B), NOR and NOT (A) and B are respectively 11.3 dB, 11.1 dB, 13.5 dB, 9.8 dB, 11.8 dB and 12.8 dB. In the simulations, Q factor of above 6 corresponds to bit error free operation at 10–9 BER. The widths of electrical eye diagrams shown in Fig. 4 are wider than 33% bit period and the amplitudes are lower than those of the optical waveforms. They are both due to the limited bandwidth of receiver. Pedestals at “0” level and variations at “1” level of the logic gates can be attributed to the amplified spontaneous noise (ASE) from the EDFA. As mentioned above, the logic gates AND, NOR, A and NOT (B), NOT (A) and B can be obtained respectively by splitting the gates XNOR and XOR using PBSs. As demonstrated in [11], as long as the polarization states of the PolSK signals and the main axes of the PBS have been aligned with each other, improving the extinction ratio of the PBS, the performances of logic gates AND, NOR, A and NOT (B), NOT (A) and B could not be worse than those of logic gate XNOR and XOR. To simplify the calibration, we select the XNOR and XOR gates to make intensive research below. 4.2. Performance analysis The dependence of FWM efficiency on the wavelength detuning is calculated using Eq. (4) and (5). As shown in Fig. 5(a), when the wavelength of pump light λA is fixed at 1542 nm and the wavelength of probe light λB is changed from 1532 to 1552 nm, the normalized FWM efficiency deteriorates with the increment of detuning. When λB is 1536 nm and 1548 nm, the normalized efficiency has decreased to be as low as around 0.0089. This indicates that there exists an operating wavelength range for the logic gate. We further demonstrated the relationship between the sensitivity of the logic gate and the wavelength position of the probe light. λB is changed by the step of 1 nm. For each couple of wavelengths, the input power is adjusted respectively to achieve bit error-free operation and the sensitivity is recorded. As shown in Fig. 5(b), the sensitivity varies as λB is changed from 1535 to 1548 nm, but it maintains in the range of 21.3 dB to 19.2 dB. This shows that the bit error-free operation can be obtained for these wavelength positions. However, for λB lower than 1535 nm and higher than 1548 nm, the bit error ratio less than 10–9 cannot be obtained by adjusting the input power because of the rather low FWM efficiency. We also choose different wavelength separations to investigate the relationships between the Q factors and the input power for logic gates XOR and XNOR. Three pairs of signal wavelengths of different wavelength separations (WS) are selected. λA is fixed at 1542 nm, while λB is set as 1536 nm, 1545 nm and 1548 nm, i.e., the WSs are 6 nm, 3 nm, and 6 nm respectively. Idlers at shorter wavelengths are correspondingly selected to research performances of the logic gates. The input powers into the two ends of the HNLF are varied while being kept the same with each other all the time. Other parameters are kept constant. Theoretical results of the input power versus the Q factors of eye diagrams for XNOR, XOR gates and FWM efficiency are shown in Fig. 6 respectively. FWM efficiency is defined as the ratio of the filtered idler average power and input pump power in the same direction. As can be seen from Fig. 6, Q factor for different WS is closely correlated to the FWM efficiency. For the three pairs of wavelengths, the
Fig. 5. (a) Calculation result for normalized FWM efficiency as a function of probe wavelength when pump wavelength is 1542 nm. (b) The sensitivities of logic gates XOR and XNOR when λB changes in the C band.
minimum input powers to achieve bit error free operation of XOR gate are 18.1 dBm, 12.3 dBm and 20.8 dBm and the corresponding efficiency are 33 dB, 28.9 dB and 33.4 dB, respectively. When the WS of two signal sources is larger, higher input power is required to obtain clear eye diagrams. This is mostly attributed to the decrease of FWM efficiency in HNLF when the WS increases. With WS above 6 nm, the performance of the SPMLG degrades significantly because of the low FWM efficiency even though we improve the power. Fig. 7(a) and (b) shows the waveforms of logic gates XOR and XNOR when the WS is 7 nm and the input power is 20.3 dBm. The measured FWM efficiency is 37 dB. We can observe that, there are distinct amplitude jitters on the logical “1” level, and noise on the logical “0” level. The Q factors are 4.9 and 4.6, which cannot support the bit error-free operation. Higher power accelerates some unwanted nonlinear effects, such as SPM and XPM, which worsen the performance of the logic gate. In general, the bit error-free operation can be obtained when the WS is 7 6 nm.
5. Conclusions We propose a novel scheme of a SMPLG for RZ-PolSK signals at 40 Gb/s. Only a spool of HNLF is used to demonstrate the simultaneous
L. Li et al. / Optics Communications 308 (2013) 115–120
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Fig. 6. The relationship between Q factors for logic gates XOR\XNOR and input powers, when the two PolSK signal wavelength separations are respectively at 6 nm, 3 nm and 6 nm.
results, clear eye diagrams indicate favorable performance of the scheme. Q factors for the eye diagrams of the logic gates are closely related to the FWM efficiency. To obtain error free operation, WS between 7 nm and 6 nm should be kept. Due to the femoto-second time scale response time of Kerr-effect in HNLF we used in the scheme, the logic gate shows potential nice performance in highspeed optical transmission systems.
Acknowledgment This work was partly supported by the Fundamental Research Funds for the Central Universities 0460-022521 and Fuzhou University Science and Technology Project 0110–600893.
References
Fig. 7. The waveforms of logic gates XOR (a) and XNOR (b) with the wavelength separation at 7 nm.
realization of 6 simple gates and 4 complex gates (XOR, AB, AB, XNOR, AND, NOR, half-subtracter, half-adder, comparator, and decoder). This new structure is low-cost, multi-functional and flexible. Proper logic
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