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New method to improve bit-rate of all-optical logic gate based on 2D photonic crystal
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
Contents lists available at ScienceDirect
Optik journal homepage: www.elsevier.com/locate/ijleo
Original research article
New method to improve bit-rate of all-optical logic gate based on 2D photonic crystal
T
⁎
Reza Dayhoola, , Alireza Maleki Javanb a Department of Communication, College of Electrical Engineering, Yadegar-e-Imam Khomeini (RAH) Shahr-e-rey Branch, Islamic Azad University, Tehran, Iran b Shahid Sattari Aeronautical University of Science & Technology, Tehran, Iran
A R T IC LE I N F O
ABS TRA CT
Keywords: All-optical logic gate Photonic crystals Optical waveguides FDTD
In this paper, we introduce a new method to improve bit-rate of all-optical logic gate. At first, we make some changes in conventional photonic crystal waveguides (CPCW), which improve bitrate of CPCW. We found by changing hole's diameter near defect, the bit-rate can be varied via hole's diameter variations. So, by finding maximum bit-rate in optimized photonic crystal waveguides (OPCW) and applying it in to an all-optical logic gate, the improvement can be seen. This can be achieved by first, finding the best bit-rate of OPCW then, applying OPCW in to an alloptical logic gate to find best answer for all optical logic gate, which considers this structure works functional. At the end, The results show that bit-rate of all-optical logic gate improved from 0.976 Tbit/s to 1.52 Tbit/s.
1. Introduction All-optical signal processing technology and optical communication has surpassed electronic technology in higher speed, lower power consuming, and smaller physical dimension. Moreover, these days all-optical signal processing technology has attracted tremendous attention because of advantages of optical technology over electronic technology such as optical switches and logic gates [1], optical communication [2], and slow-light [3]. All-optical logic gates are major unit of all-optical signal processing and optical communication. Both of these need a lot of complex combination of all-optical logic gates. Every all-optical logic gate needs to be operated fast and functional as a critical and essential part of bigger structure. Furthermore, we can improve the entire system to work faster and more reliable by optimizing an all-optical logic gate. This paper intends to present a new method in all-optical logic gates based on 2D photonic crystal to improve their bit rate, which can be applied in other structures based on 2D photonic crystal. The basic of this improvement lays in (CPCW). There are many ways to improve CPCW like adding non-linearities to achieve low group velocity [4], and some changes in CPCW for having low group velocity to improve bit-rate [5]. The main problem to add non-linearities is the simulation time, which takes a lot of time to simulate. Moreover, we need more power to pump in our structure for having non-linearities. So, if we remove non-linearities from structure, we will reduce simulation time, and we will not need higher input power. If we desire to improve speed without non-linearities, we need some modification in CPCW to improve bit rate. In Section 2 by some optimization in CPCW and calculating bit rate by response time [6], and changing some hole's radius in CPCW to improve bit-rate; then, we achieve optimized photonic crystal waveguide (OPCW). Furthermore, in Section 3 to obtain higher bit rate we use an all-optical logic gate [7]. Thus, CPCW has replaced by OPCW, and simulated new all-optical logic gate, it shows improvement in bit rate from 0.976 Tbit/s to 1.52 Tbit/s. ⁎
Corresponding author. E-mail address: [email protected] (R. Dayhool).
https://doi.org/10.1016/j.ijleo.2019.02.140 Received 19 January 2019; Accepted 24 February 2019 0030-4026/ © 2019 Elsevier GmbH. All rights reserved.
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
R. Dayhool and A. Maleki Javan
Fig. 1. (a) Hexagonal lattice, r/a = 0.3, a = 0.32, holes in Si. (b) Photonic band structure in TE mode.
2. Optimized photonic crystal waveguide In this section, we introduce how to improve the bit rate of photonic crystal waveguide without any significant change, and not use non-linearities. So, we reach this point, by changing some air holes’ radius, which can change bit-rate, shows improvement in bitrate compare to CPCW. As shown in Fig. 1a, the structure type for CPCW is hexagonal lattice by a = 0.325μ lattice constant. The air holes in the dielectric with refractive index n = 3.5 and radius of r = 0.3a are used for this structure. Fig. 1b illustrates the band structure of TE modes for the structure. The calculated band structure shows that TE modes have two band gaps. The main band gap placed in normalized range a of 0.205 < λ < 0.272 , which equivalent of this range is 1.29μ < λ < 1.715μ. The CPCW are made by some defect in photonic crystal lattice that has been shown in Fig. 2a. So, to improve bit-rate we made some configuration in CPCW, which has been shown in Fig. 2b. As shown in Fig. 2b, the change in holes’ radius near defects, and the diameter changed over Radj between 0.1a to 0.4a. Furthermore, we sweep over holes’ radius and found output power and bit rate by changing Radj. The normalized output power, which has been calculated by 2D FDTD in Fig. 3 shows output power for every Radj. It shows that in some point of Radj, the power consumes in the structure; moreover, for more than 0.35a, we lost most of input power in the OPCW and this is probably because of band gap. The climax of output power occurs about Radj × a = 0.34a. So, we do not calculate output power for more than Radj × a = 0.34a. For determine bit rate of OPCW, rise time curve of the output power have been used Fig. 4. At steady-state, the time taken to climax output power from 0 to 90% of the average output power is 0.58 ps. This time consists of two parts; one of which is time due to transmission delay trisetime = 0.35 ps and another is time taken by output power to evolve from 0% to 90% of average output power trisetime = 0.23 ps. So, it has been expected that the falling time from climax output power to 10% of output power is approximately equal to trisetime. Thus, a narrow pulse width of 2 × trisetime = 0.46 ps can be produced. Moreover, the response time of trisetime = 4 × trisetime = 0.92 ps has been achieved if the ON and OFF time of the signal is the same which leads to a bit rate of 1/ trisetime = 1/087 Tbit/s. Furthermore, by calculating bit rate for all holes’ radius value we found, that in 0.18a we reach the climax of the bit-rate which is 2.35 Tbit/s. In comparison with CPCW, which its bit-rate is 0.675 Tbit/s, OPCW's results in Figs. 5 and 3 show better bit-rate and same output power.
3. Optimized all-optical logic gate In this section we apply our OPCW in to an all-optical photonic crystal logic gate. For this reason, we used an all-optical logic gates based on this paper [7]. The all optical logic gate shows in Fig. 6a, which designed in [7] and Fig. 6b shows optimized all optical logic
Fig. 2. Lattice constant a = 352 nm. (a) Conventional PCW. (b) Optimized PCW, Radj × a is hole's radius. 592
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
R. Dayhool and A. Maleki Javan
Fig. 3. Normalized output power.
Fig. 4. Changing normalized output power from zero to one.
Fig. 5. Bit-rate changes by holes’ radius.
gate to improve its bit rate. According to Fig. 5, the climax of bit-rate is happened between 0.17a to 0.21a. Considering bit-rate and functionality of new alloptical logic gate, the simulation runs over variable value of Radj × a, and initial of rc = 0.44a (yellow hole in the center of structure (Fig. 6b). The results show in 0.21a, we have better bit-rate in AND logic state. Moreover, other states of logic gates follow the same structure and here we just recalculate AND truth table. According to Table 1, the AND logic gate runs as follows: (i) In first state, all inputs are zero so we obtained logic 0. (ii) For state, port A = 0 or 1, Port B = 0 or 1 (because of symmetric structure both states are same), and reference port R = 1 with ϕ = 0, the output logic state is obtained 0, which is equal to 0.1427P0. (iii) In this state, all inputs are in logic 1 with ϕ = 0 the output logic state is 1, which is equal to 0.6998P0. In this configuration, the bit rate is 1.52 Tbits/ s. 4. Conclusion We present a new method to improve bit rate of all-optical logic gate by some configuration in CPCW and introduce OPCW. By using response time and calculating bit rate of OCPW, we find out bit rate of this structure by varying Radj. Then, by applying OPCW 593
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
R. Dayhool and A. Maleki Javan
Fig. 6. rc = 0.44a (yellow hole in the center of structure). (a) Schematic of all optical logic gate [7]. (b) Schematic of optimized all optical logic gate (Radj × a (orange holes in b)). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.) Table 1 Truth table for AND logic gate. The output power is in terms of input power P0. AND gate Input Port A (ϕ = 0°)
Input Port B (ϕ = 0°)
Reference signal (R)
Logic output
Output
0 0 1 1
0 1 0 1
0 1 (ϕ = 180°) 1 (ϕ = 180°) 1 (ϕ = 0°)
0 0 0 1
0 0.1427P0 0.1427P0 0.6998P0
into an all optical logic gate, we could improve bit rate from 0.976 Tbit/s to 1.52 Tbit/s, which is about 55% improvement. References [1] Y. Zhang, Y. Zhang, B. Li, Optical switches and logic gates based on self-collimated beams in two-dimensional photonic crystals, Opt. Express 15 (15) (2007) 9287–9292. [2] C. Tang, X. Dou, Y. Lin, H. Yin, B. Wu, Q. Zhao, Design of all-optical logic gates avoiding external phase shifters in a two-dimensional photonic crystal based on multi-mode interference for BPSK signals, Opt. Commun. 316 (2014) 49–55. [3] K. Abedi, S.M. Mirjalili, Slow light performance enhancement of Bragg slot photonic crystal waveguide with particle swarm optimization algorithm, Opt. Commun. 339 (2015) 7–13. [4] Y. Hamachi, S. Kubo, T. Baba, Low dispersion slow light and nonlinearity enhancement in lattice-shifted photonic crystal waveguide, Quantum Electronics and Laser Science Conference, Optical Society of America, 2008 QTuC1. [5] A.R. Shroff, P.M. Fauchet, Interlaced coupled-cavity waveguide in photonic crystal for low group velocity and high bit-rate applications, 3rd IEEE International Conference on Group IV Photonics, 2006, IEEE, 2006, pp. 64–66. [6] C.J. Wu, C.P. Liu, Z. Ouyang, Compact and low-power optical logic not gate based on photonic crystal waveguides without optical amplifiers and nonlinear materials, Appl. Opt. 51 (5) (2012) 680–685. [7] P. Rani, Y. Kalra, R. Sinha, Design of all optical logic gates in photonic crystal waveguides, Optik – Int. J. Light Electron Opt. 126 (9–10) (2015) 950–955.
594
Contents lists available at ScienceDirect
Optik journal homepage: www.elsevier.com/locate/ijleo
Original research article
New method to improve bit-rate of all-optical logic gate based on 2D photonic crystal
T
⁎
Reza Dayhoola, , Alireza Maleki Javanb a Department of Communication, College of Electrical Engineering, Yadegar-e-Imam Khomeini (RAH) Shahr-e-rey Branch, Islamic Azad University, Tehran, Iran b Shahid Sattari Aeronautical University of Science & Technology, Tehran, Iran
A R T IC LE I N F O
ABS TRA CT
Keywords: All-optical logic gate Photonic crystals Optical waveguides FDTD
In this paper, we introduce a new method to improve bit-rate of all-optical logic gate. At first, we make some changes in conventional photonic crystal waveguides (CPCW), which improve bitrate of CPCW. We found by changing hole's diameter near defect, the bit-rate can be varied via hole's diameter variations. So, by finding maximum bit-rate in optimized photonic crystal waveguides (OPCW) and applying it in to an all-optical logic gate, the improvement can be seen. This can be achieved by first, finding the best bit-rate of OPCW then, applying OPCW in to an alloptical logic gate to find best answer for all optical logic gate, which considers this structure works functional. At the end, The results show that bit-rate of all-optical logic gate improved from 0.976 Tbit/s to 1.52 Tbit/s.
1. Introduction All-optical signal processing technology and optical communication has surpassed electronic technology in higher speed, lower power consuming, and smaller physical dimension. Moreover, these days all-optical signal processing technology has attracted tremendous attention because of advantages of optical technology over electronic technology such as optical switches and logic gates [1], optical communication [2], and slow-light [3]. All-optical logic gates are major unit of all-optical signal processing and optical communication. Both of these need a lot of complex combination of all-optical logic gates. Every all-optical logic gate needs to be operated fast and functional as a critical and essential part of bigger structure. Furthermore, we can improve the entire system to work faster and more reliable by optimizing an all-optical logic gate. This paper intends to present a new method in all-optical logic gates based on 2D photonic crystal to improve their bit rate, which can be applied in other structures based on 2D photonic crystal. The basic of this improvement lays in (CPCW). There are many ways to improve CPCW like adding non-linearities to achieve low group velocity [4], and some changes in CPCW for having low group velocity to improve bit-rate [5]. The main problem to add non-linearities is the simulation time, which takes a lot of time to simulate. Moreover, we need more power to pump in our structure for having non-linearities. So, if we remove non-linearities from structure, we will reduce simulation time, and we will not need higher input power. If we desire to improve speed without non-linearities, we need some modification in CPCW to improve bit rate. In Section 2 by some optimization in CPCW and calculating bit rate by response time [6], and changing some hole's radius in CPCW to improve bit-rate; then, we achieve optimized photonic crystal waveguide (OPCW). Furthermore, in Section 3 to obtain higher bit rate we use an all-optical logic gate [7]. Thus, CPCW has replaced by OPCW, and simulated new all-optical logic gate, it shows improvement in bit rate from 0.976 Tbit/s to 1.52 Tbit/s. ⁎
Corresponding author. E-mail address: [email protected] (R. Dayhool).
https://doi.org/10.1016/j.ijleo.2019.02.140 Received 19 January 2019; Accepted 24 February 2019 0030-4026/ © 2019 Elsevier GmbH. All rights reserved.
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
R. Dayhool and A. Maleki Javan
Fig. 1. (a) Hexagonal lattice, r/a = 0.3, a = 0.32, holes in Si. (b) Photonic band structure in TE mode.
2. Optimized photonic crystal waveguide In this section, we introduce how to improve the bit rate of photonic crystal waveguide without any significant change, and not use non-linearities. So, we reach this point, by changing some air holes’ radius, which can change bit-rate, shows improvement in bitrate compare to CPCW. As shown in Fig. 1a, the structure type for CPCW is hexagonal lattice by a = 0.325μ lattice constant. The air holes in the dielectric with refractive index n = 3.5 and radius of r = 0.3a are used for this structure. Fig. 1b illustrates the band structure of TE modes for the structure. The calculated band structure shows that TE modes have two band gaps. The main band gap placed in normalized range a of 0.205 < λ < 0.272 , which equivalent of this range is 1.29μ < λ < 1.715μ. The CPCW are made by some defect in photonic crystal lattice that has been shown in Fig. 2a. So, to improve bit-rate we made some configuration in CPCW, which has been shown in Fig. 2b. As shown in Fig. 2b, the change in holes’ radius near defects, and the diameter changed over Radj between 0.1a to 0.4a. Furthermore, we sweep over holes’ radius and found output power and bit rate by changing Radj. The normalized output power, which has been calculated by 2D FDTD in Fig. 3 shows output power for every Radj. It shows that in some point of Radj, the power consumes in the structure; moreover, for more than 0.35a, we lost most of input power in the OPCW and this is probably because of band gap. The climax of output power occurs about Radj × a = 0.34a. So, we do not calculate output power for more than Radj × a = 0.34a. For determine bit rate of OPCW, rise time curve of the output power have been used Fig. 4. At steady-state, the time taken to climax output power from 0 to 90% of the average output power is 0.58 ps. This time consists of two parts; one of which is time due to transmission delay trisetime = 0.35 ps and another is time taken by output power to evolve from 0% to 90% of average output power trisetime = 0.23 ps. So, it has been expected that the falling time from climax output power to 10% of output power is approximately equal to trisetime. Thus, a narrow pulse width of 2 × trisetime = 0.46 ps can be produced. Moreover, the response time of trisetime = 4 × trisetime = 0.92 ps has been achieved if the ON and OFF time of the signal is the same which leads to a bit rate of 1/ trisetime = 1/087 Tbit/s. Furthermore, by calculating bit rate for all holes’ radius value we found, that in 0.18a we reach the climax of the bit-rate which is 2.35 Tbit/s. In comparison with CPCW, which its bit-rate is 0.675 Tbit/s, OPCW's results in Figs. 5 and 3 show better bit-rate and same output power.
3. Optimized all-optical logic gate In this section we apply our OPCW in to an all-optical photonic crystal logic gate. For this reason, we used an all-optical logic gates based on this paper [7]. The all optical logic gate shows in Fig. 6a, which designed in [7] and Fig. 6b shows optimized all optical logic
Fig. 2. Lattice constant a = 352 nm. (a) Conventional PCW. (b) Optimized PCW, Radj × a is hole's radius. 592
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
R. Dayhool and A. Maleki Javan
Fig. 3. Normalized output power.
Fig. 4. Changing normalized output power from zero to one.
Fig. 5. Bit-rate changes by holes’ radius.
gate to improve its bit rate. According to Fig. 5, the climax of bit-rate is happened between 0.17a to 0.21a. Considering bit-rate and functionality of new alloptical logic gate, the simulation runs over variable value of Radj × a, and initial of rc = 0.44a (yellow hole in the center of structure (Fig. 6b). The results show in 0.21a, we have better bit-rate in AND logic state. Moreover, other states of logic gates follow the same structure and here we just recalculate AND truth table. According to Table 1, the AND logic gate runs as follows: (i) In first state, all inputs are zero so we obtained logic 0. (ii) For state, port A = 0 or 1, Port B = 0 or 1 (because of symmetric structure both states are same), and reference port R = 1 with ϕ = 0, the output logic state is obtained 0, which is equal to 0.1427P0. (iii) In this state, all inputs are in logic 1 with ϕ = 0 the output logic state is 1, which is equal to 0.6998P0. In this configuration, the bit rate is 1.52 Tbits/ s. 4. Conclusion We present a new method to improve bit rate of all-optical logic gate by some configuration in CPCW and introduce OPCW. By using response time and calculating bit rate of OCPW, we find out bit rate of this structure by varying Radj. Then, by applying OPCW 593
Optik - International Journal for Light and Electron Optics 183 (2019) 591–594
R. Dayhool and A. Maleki Javan
Fig. 6. rc = 0.44a (yellow hole in the center of structure). (a) Schematic of all optical logic gate [7]. (b) Schematic of optimized all optical logic gate (Radj × a (orange holes in b)). (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.) Table 1 Truth table for AND logic gate. The output power is in terms of input power P0. AND gate Input Port A (ϕ = 0°)
Input Port B (ϕ = 0°)
Reference signal (R)
Logic output
Output
0 0 1 1
0 1 0 1
0 1 (ϕ = 180°) 1 (ϕ = 180°) 1 (ϕ = 0°)
0 0 0 1
0 0.1427P0 0.1427P0 0.6998P0
into an all optical logic gate, we could improve bit rate from 0.976 Tbit/s to 1.52 Tbit/s, which is about 55% improvement. References [1] Y. Zhang, Y. Zhang, B. Li, Optical switches and logic gates based on self-collimated beams in two-dimensional photonic crystals, Opt. Express 15 (15) (2007) 9287–9292. [2] C. Tang, X. Dou, Y. Lin, H. Yin, B. Wu, Q. Zhao, Design of all-optical logic gates avoiding external phase shifters in a two-dimensional photonic crystal based on multi-mode interference for BPSK signals, Opt. Commun. 316 (2014) 49–55. [3] K. Abedi, S.M. Mirjalili, Slow light performance enhancement of Bragg slot photonic crystal waveguide with particle swarm optimization algorithm, Opt. Commun. 339 (2015) 7–13. [4] Y. Hamachi, S. Kubo, T. Baba, Low dispersion slow light and nonlinearity enhancement in lattice-shifted photonic crystal waveguide, Quantum Electronics and Laser Science Conference, Optical Society of America, 2008 QTuC1. [5] A.R. Shroff, P.M. Fauchet, Interlaced coupled-cavity waveguide in photonic crystal for low group velocity and high bit-rate applications, 3rd IEEE International Conference on Group IV Photonics, 2006, IEEE, 2006, pp. 64–66. [6] C.J. Wu, C.P. Liu, Z. Ouyang, Compact and low-power optical logic not gate based on photonic crystal waveguides without optical amplifiers and nonlinear materials, Appl. Opt. 51 (5) (2012) 680–685. [7] P. Rani, Y. Kalra, R. Sinha, Design of all optical logic gates in photonic crystal waveguides, Optik – Int. J. Light Electron Opt. 126 (9–10) (2015) 950–955.
594