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Vectron and Futurenet agreement Vectron's printed circuit board (PCB) layout package has been coupled to the FutureNet line of DASH engineering workstations by a licensing agreement. The agreement covers two years and is renewable. FutureNet claim that it will have a value of $18 million US over five years. The first release of the Vectron package on DASH workstations is scheduled for September 1985. It will be introduced under the FutureNet label of DASH-PCB and will be marketed worldwide by FutureNet. FutureNet claim that when integrated into the DASH product the Vectron package will complete the design process. It will do this by generating artwork and manufacturing documentation needed to make finished PCBs. Rick Smyth, Vice President of Marketing at Vectron, said, 'We view this as an excellent opportunity to enter and participate in the most rapidly growing segment of electronic design - the personal computer workstation market'. (FutureNet Corpora-
tion, 9310 TopangaCanyonBoulevard, Chatsworth, CA 91303-5728, USA. Tel: (818) 700-0691)
LOGS on PC Microsystem services, the UK distributors of the P-CAD EDA range of CAD and CAE software, have introduced a logic simulator package known as PC-LOGS. PC-LOGS is an interactive 12 state simulator which uses the net list from PC-CAPS (a hierarchical logic design system) as its input. When a logic diagram (or a section of one) has been completed, PC-LOGS can simulate the circuit described by the net list and verify the logic for functionality and
volume 17 number 6 july/august 1985
performance. It runs on the IBM PC, PC XT, PC AT and any compatible PCs which support PC-DOS (versions 1.1 and 2.0). According to Microsystems, it will perform simulation at a rate of 500 events/s. Output can be viewed as waveforms on screen or can be saved on disc file and processed to produce plots. It uses an event-driven algorithm so that only the logic elements that have changed state are evaluated.
(Microsystem Services, PO Box 37, Lincoln Road, CressexIndustrial Estate, High Wycombe,Bucks HP12 3XJ, UK. Tel: (0494) 41661. Tx:
837187)
Automated VLSI design The Genesil family of automated VLSI design turnkey products has been extended by two further systems: the Genesi1100 and the Genesil 500. The manufacturers of the Genesil range, Silicon Compilers Inc provide their customers with service support and this includes training. The Genesil system enables the user to work at the functional level as Genesil will generate timing and simulation models, power estimates, test vectors and finished layouts. It supports VLSI designs in dual layer metal CMOS and single-layer NMOS. The Genesi1100 system configuration includes a DEC MicroVax II with 2 Mbytes of RAM, 184 Mbytes of disc storage, a 95 Mbyte magnetic tape drive, a colour graphics terminal and DEC's Ultrix version of Unix. The base price of the Genesi1100 is $165 000 US. The Genesil 500 system five-user configuration includes a DEC 11/785 VAX, 8 Mbytes of RAM, 450 Mbytes of disc storage, a 9 track magnetic tape drive and the Berkeley 4.2 version of Unix. Its base cost is $640 000 US.
(Silicon Compilers Inc, 11 Upper Brook Street, London W1, UK. Tel: 01-491 0093)
Software link Tektronix's CADDPORT makes it possible to link its PLOT 10 (TechniCAD) drafting software with PDA Engineering's PATRAN solid modelling and analysis system. PATRAN design information is carried to TekniCAD via CADDPORT where it is processed for interpretation and manipulation by TekniCAD to produce design documentation, CADDPORT supports TekniCAD in both distributed and centralized configurations. TekniCAD can reside with PATRAN on a common host or be distributed to TekniCAD drafting workstations. Licence fees for CADDPORT start at £2 800. TekniCAD licence fees start at £2 400 and PATRAN annual licence fees at £7 500. Tektronix and PDA Engineering are jointly marketing TekniCAD and CADDPORT. (Tektronix UK ttd,
Fourth A venue, Globe Park, Marlow, BucksSL 7 1YD, UK. Tel."06284 6000)
Hardware modelling A hardware modelling system called Turbo Chip has been introduced by CAE Systems Ltd. It is suitable for modelling complex VLSI devices and printed circuit boards. It can be used with Sun and Apollo workstations and DEC VAX superminis. Parts can be simulated using Turbo Chip to speed up design. The simulation can then be compared to the performance of the actual chip to verify that it has been correctly built. The basic board set consists of a master and a slave board. The master holds control and pattern memory and the slave has the device to be modelled as well as drivers and sensors. The basic pattern memory is 64 Kbytes and is expandable. The pattern memory clock speed is 10 MHz. (CAESystems
Ltd, c/o Tektronix (UK) Ltd, Fourth Avenue, Globe Park, Marlowe, Bucks SL7 1YD, UK)
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