Memory characteristics and tunneling mechanism of Pt nano-crystals embedded in HfAlOx films for nonvolatile flash memory devices

Accepted Manuscript Memory Characteristics and Tunneling Mechanism of Pt Nono-crystals Embedded in HfAlOx Films for Nonvolatile Flash Memory Devices Guangdong Zhou, Bo Wu, Zhiling Li, Zhijun Xiao, Shuhui Li, Ping Li PII:

S1567-1739(14)00417-9

DOI:

10.1016/j.cap.2014.12.024

Reference:

CAP 3830

To appear in:

Current Applied Physics

Received Date: 26 September 2014 Revised Date:

18 December 2014

Accepted Date: 19 December 2014

Please cite this article as: G. Zhou, B. Wu, Z. Li, Z. Xiao, S. Li, P. Li, Memory Characteristics and Tunneling Mechanism of Pt Nono-crystals Embedded in HfAlOx Films for Nonvolatile Flash Memory Devices, Current Applied Physics (2015), doi: 10.1016/j.cap.2014.12.024. This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.

ACCEPTED MANUSCRIPT 1. The Pt nano-crystals and based-HfAlO films memory devices was fabricated. 2. The 6.5V memory window and 88% stored charge after 105s were detected.

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3. The defects-enhanced Pool-Frenkel tunnel may dominate the stored charge action.

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Memory Characteristics and Tunneling Mechanism of Pt Nono-crystals Embedded in HfAlOx Films for Nonvolatile Flash Memory Devices

Guangdong Zhoua,b , Bo Wuc,∗, Zhiling Lia , Zhijun Xiaoa , Shuhui Lia , Ping Lib a

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Guizhou Institute of Technology, Guizhou, 550003, People’s Republic of China Institute for Clean Energy & Advance Materials, Southwest University, Chongqing, 400715, People’s Republic of China c Institute of Theoretical Physics, Zunyi Normal College, Zunyi, 563002, People’s Republic of China

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b

Abstract

A non-volatile flash memory device based on metal oxide semiconductor (MOS) capacitor structure has been fabricated using platinum nano-crystals(Pt-

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NCs) as storage units embedded in HfAlOx high-k tunneling layers. Its memory characteristics and tunneling mechanism are characterized by capacitancevoltage(C-V) and flat-band voltage-time(∆VF B -T) measurements. A 6.5V

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flat-band voltage (memory window) corresponding to the stored charge density of 2.29×1013 cm−2 and about 88% stored electron reserved after apply ±8V program or erase voltage for 105 s at high frequency of 1MHz was

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demonstrated. Investigation of leakage current-voltage(J-V) indicated that defects-enhanced Pool-Frenkel tunneling plays an important role in the tunneling mechanism for the storage charges. Hence, the Pt-NCs and HfAlOx based MOS structure has a promising application in non-volatile flash mem∗

Corresponding author.Tel:+86-0852-8927153. Email address: [email protected] (Bo Wu)

Preprint submitted to Current Applied Physics

December 18, 2014

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ory devices.

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Keywords: Pt nano-crystals; memory characteristics; dielectric films; tunneling mechanism 1. Introduction

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Nonvolatile flash memory device using discrete nano-crystals (NCs) as charge storage element embedded in gate dielectric layers has been widely

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studied since the devices were discovered by Tiwari et al in 1996[1]. Compared to those traditional semiconductor NCs like Si, Ge, GeSi[2, 3, 4], the metal NCs like Pt, Ag, Au, Ti [5, 6, 7, 8, 9] are believed to be a higher density storage dots with longer retention time, lower power, smaller energy perturbation and a wider range available work function due to their strong charge confinement effect[10]. Charge storage and retention characteristics

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for Pt NCs as storage element in memory devices has been studied extensively in recent years. In 2008, a 6.5V memory window, of which about 50% was reserved after 1×104 s, was observed for the Al2 O3 dielectric films embedded 4nm Pt nano-particles when employ ±7V P/E voltage[5]. In 2009,

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the maximum memory window of 4.26V for the optimized Pt diameter of 3∼5nm was reported and its about 70% memory window can be kept after

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employ ±7V P/E voltage[11]. In 2011, the ultra-small Pt nano-particles with a diameter of 0.7∼1.34nm as stored dots were embedded into GaAs layers, a 6.5V memory window was detected and its about 80% stored charge was reserved[6]. Moreover, as a novelly structural metal nano-particle, the PtFe2 O3 core-shell nano-particles were embedded in indium gallium zinc oxide layer in 2013. The results revealed that the memory window about 4.76V 2

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was observed and its 65% stored charge was reserved at high electric field[12].

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Very recently, Liu et al reported a p-Si/ Al2 O3 /Pt-NCs/HfO2 memory devices

structures with a 6.6V memory window, in which only 73% stored charge was retained at high ±12V P/E voltage[13].

In view of applications, optimizing technological conditions, prolonging

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retention time, expanding charge storage density and understanding tunneling behavior for Pt-NCs storage devices need to be further investigated.

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Due to good dielectric properties, larger storage density, low leakage current density and small-sizing nonvolatile flash memory devices, the high-k material, such as HfAlOx [24], HfO2 [15], HfSiOx [16], Al2 O3 [17], are believed to be an excellent tunneling/controlling dielectric layer candidate for substituting conventional SiO2 . Ones confirms that the materials with high dielectric constant can to improve capacitance density, restrain leakage current

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density and decrease program/erase voltage[18]. Among them, the HfAlOx series materials have been focused because of its high crystalline temperature (>900 ◦ C), a relatively high permittivity (about 17) and an appropriate band gap(about 6.0eV)[19]. In our previous work, the capacitor structural

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Hf-based films inserted by Ag nanoparticles were fabricated on p-Si(100) substrates, and the permittivity of 21.8 at 1MHz and the leakage current density

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with 9.5×10−8 ˚ A/cm2 at -1V for the HfAlOx film with Ag nanoparticles, are detected and superior to that of the HfAlOx film without Ag particles in

dielectric characteristics[20]. Naturally, such excellent dielectric properties in the Hf-based film embedded noble metal NCs also triggers this investigation for the HfAlOx /Pt-NCs/HfAlOx /p-Si(100) nonvolatile flash memory structure to focus on its memory characteristics and stored charge tunneling

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mechanism. 2. Experimental Details

Platinum metal target with high purity (about 99.995%) and HfAlOx (2:1 molar ratio of HfO2 and Al2 O3 ) ceramic target are employed to fabricate Pt-

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NCs and HfAlOx tunneling/control layers, respectively, by means of radiofrequency magnetron sputtering. The p-Si(100) substrates with a resistivity

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from 4 to 6 Ω/cm are ultrasonically cleaned in acetone and dehydrated alcohol for 40 min, then are etched by a HF(9:1 volume ratio) solution for 3 min to remove the native oxide layer and leave an hydrion-attached surface. The base vacuum of growth chamber is 6.0×10−5 Pa. A 5nm-thick HfAlOx tunneling layer is deposited on the cleaned p-Si(100) substrate at room temperature in 3.0Pa argon atmosphere with sputtering power of 100W. And

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than, carefully and precisely control the sputtering times, massive experiments illustrate the high quality Pt-NCs can be prepared when keeping the sputtering time for 5 seconds. Finally, the prepared Pt-NCs is annealed at

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600◦ C for 30 minutes in situ. It is worth pointing that, the size and distribution of Pt-NCs are determined by the working power, the bias voltage and the pressure of Ar, while, its density can be controlled by the sputtering time.

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The 10nm-thick HfAlOx control layer is covered on Pt-NCs to form the capacitor structure of HfAlOx /Pt-NCs/HfAlOx /p-Si(100), then been annealed in high-purity of nitrogen atmosphere at 700◦C for 30 min. Silver top electrode with the different diameter(D=0.1mm, 0.2mm, 0.5mm) is fabricated at 250◦ C in 0.5Pa argon ambient with a working power of 20W. Scanning electron microscopy (SEM, FEI450) and high-resolution transmission electron 4

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microscopy (HRTEM, JEM-2010) are used to observe the Pt-NCs distribu-

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tion and the microstructures of devices, respectively. Finally, the charge

storage and dielectric properties are measured by HP4294A impedance analyzer and Keithley2400 digital multimeter.

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3. RESULTS AND DISCUSSION 3.1. Structural properties

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In Fig. 1(a), the SEM image of Pt-NCs deposited on tunneling HfAlOx layer is presented. We can see that the fabricated Pt-NCs are self-assembled and well-distributed with an average density of 7.1×1012 cm−2 . In Fig. 1(b), the cross-sectional HRTEM images for the non-volatile flash memory device of HfAlOx /Pt-NCs/HfAlOx /Si(100) capacitor structure is shown. The average diameter of Pt-NCs is about 3nm and the thickness of tunneling/control

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HfAlOx layers is about 5/10nm, respectively. Moreover, an ultra-thin interfacial layer(only 0.8nm) between p-Si(100) substrate and HfAlOx tunneling layer is detected, unexpectedly. In our previous work, the similar interfacer,

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which main chemical components are HfSix and HfSiOx [20], also appeared. As a consequence, the superior quality of Pt-NCs and HfAlOx were success-

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fully fabricated by the means of radio frequency sputtering. 3.2. Memory characteristics Fig. 2 shows energy band alignment for the non-volatile memory devices

with MOS capacitor structure composed by HfAlOx /Pt-NCs/HfAlOx /p-Si(100). The flat-band condition is shown in Fig. 2(a). An essential potential well of ∼2.15eV and ∼2.10eV is established between tunneling/control HfAlOx 5

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layer and p-Si(100) substrate due to their different work function. If applying

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a positive gate voltage, the channel electrons will be injected into ultrathin

interfacial layer. When the voltage is high enough, some electrons might tunnel through the HfAlOx tunneling layer and be captured by the embedded

Pt-NCs. It results in the fact that the C-V curve shifting to right corre-

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sponding to the programming process, as shown in Fig. 2(b). Conversely, if applying a negative gate voltage, the storage charges tunnel back to channel,

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leading to the C-V curve shift to left corresponding to the charge erasing process, as shown in Fig. 2(c). we can infer that when sweeping a cycle gate voltage from positive to negative, an counterclockwise C-V hysteresis (memory window) can be observed.

For understanding the memory properties well, in Fig. 3(a), the nonvolatile flash memory devices with capacitor structure composed by HfAlOx /Pt-

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NCs/HfAlOx /p-Si(100) is schematically demonstrated and its C-V measurements as applying different gate voltage on the devices at high frequency 1MHz is also showed in Fig. 3(b). As program/erase voltage increasing from ±2V to ±8V, the flat-band voltage shift (memory window) is also expanded

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gradually. It can be obviously detected that the maximum memory window is about 6.5V. The relation between the C-V window width (△VF B ), the ac-

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cumulation capacitance unit area(Cacc ), the charge(q) and the stored charge density (N) can be given by the equation[1, 21]: N=

Cacc × △VF B , q×t

(1)

and the effective thickness of film (t) can be calculated by: t = (tcontrol + 6

tN Cs )/tAll . 2

(2)

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Where the tcontrol , tN Cs and tAll are thickness of control layer, NCs diame-

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ter and the all oxide thickness, respectively. The calculation illustrates that the memory window of 6.5V corresponding to the stored charge density of

2.29×1013 cm−2 , which is large enough for non-volatile memory devices application.

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As a comparison, the corresponding sample without Pt-NCs was also fabricated. The distinct flat-band voltage shift for the sample without Pt-

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NCs when applying different program/erase voltage is not detected, as shown in Fig. 3(b) inset. We therefore deduce that the embedded noble metal NCs play a crucial role in the charge storage effect for non-volatile flash memory devices with capacitor structure.

For non-volatile flash memory devices, the other performance indexes, such as retention time, endurance characteristics and leakage current density

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are also very essential to valuate their application prospectives. In present work, the high frequency 1MHz flat-band voltage shift-time(∆VF B -T) is measured at room temperature. When applying ±8V program/erase voltage on the Pt-NCs based non-volatile memory devices for 105 s, a memory window of

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5.72V can be maintained corresponding to the stored charge reserved about 88%, as shown in Fig. 4(a), which indicates that the fabricated memory

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devices under optimized experiment condition has an excellent retention and endurance characteristics. Taking contribution of Pt-NCs into account, the Pt-NCs and without Pt-NCs capacitor structure was compared. Their leakage current density-voltage (J-V) curves were measured at room temperature and a 1.85×10−7 A/cm2 @-1V was observed comparing to the sample without

Pt-NCs insertion, see Fig. 4(b). On the one hand, a 2.15eV potential well

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(shown in fig.2) is established due to the difference of work function between

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Pt metal and HfAlOx matrix. Therefore, the tunneling charges are confined

and captured by the formative potential well. On the other hand, the size of Pt-NCs is bout 3nm, the tunneling charges can be captured due to the size

effects and the quantum confinement effects[22, 23]. As the storage charge

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increasing around the Pt-NCs, the Coulomb blockade effect plays the major role in hindering the electron continual tunneling [24]. Consequently, the es-

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pecial potential well and the particular size of Pt-NCs should be responsible for the leakage current sharply decreasing.

As for physical and chemical mechanism behind experimental phenomenons, in the Pt-NCs embedded HfAlOx film, discission on the role of metal NCs in charge retention properties is necessary. Shi et al[25] believes that the ultrathin interface layer mediated by metal NCs between Si(100) substrate

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and tunneling oxide play am important role in charge retention characteristics. Kim’s work [26] also illustrates that the potential barrier, size, shape, purity of Pt-NCs should be responsible for the retention time. In our previous work, the interfacial defects are demonstrated that it is harmful for

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the storage charge retention[20]. Hence, in our recent investigation, the relatively high stored charge reserved about 88% on 105 s can be attributed to

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the extremely ultrathin interfacial layer(only 0.8nm), suitable size(2∼3nm) and well-distributed Pt-NCs in the HfAlOx film. 3.3. Tunneling mechanism Besides the improvement of retention properties, the embedment of Pt-

NCs can also change the stored charge tunneling behavior for improving the memory characteristics of non-volatile flash memory devices. There8

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fore, the tunneling mechanism for the fabricated non-volatile flash memFirstly, for some con-

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ory devices was further investigated, necessarily.

ventional tunneling mechanism, such as Fowler-Nordheim (F-N) tunneling,

Poole-Frenkel (P-F) tunneling, Channel-Hot-Electron (CHE) and bond-tobond(B-T-B) tunneling are need to focus. Among them, due to high elec-

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tric field condition(>15MV/cm), CHE tunneling mechanism is hard to be

employed to flash program/erase process in present fabricated non-volatile

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flash memory devices. Besides, the Schottky tunneling mechanism works on low electric field (<5MV/cm), which has been reported in flash memory devices[27], can be also considered for the present HfAlOx film. So then, F-N, P-F, B-T-B and Schottky tunneling mechanism was emphasized in recent work.

As the results, the leakage current density versus elec-

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tric field curves are plotted according to F-N tunneling (ln( EJ2 ) ∝ E1 ),P-F √ √ tunneling(ln( EJ ) ∝ E), Schottky tunneling(ln(J) ∝ E), and B-T-B tunneling mechanism(ln( EJ ) ∝

1 ) E

in Fig. 5, respectively. The E and J is electric

field and leakage current density, respectively. For F-N tuneling, in Fig. 5(a), the fit curve at low electric field was

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presented according to the following F-N tunneling equation[28]:

where A =

q3 m , ∗ m 8πhφB

B =

B J = AE 2 exp(− ), E

(3)

3

∗ 1 (φ ) 2 8π (2 m ) 2 Bq 3 h2

, m∗ is effective mass of electron,

m is the mass of electron, h is Planck constant and φB is potential barrier.

In Hf-based films m∗ = 0.4mo (mo is the mass of single free electron)[29]. In Fig. 5(c), we can see that a slop of -5.8×108 in F-N the fitting curve at high electric field, which is correspond to 0.25eV potential barrier(it means φF N =0.25eV). The calculation result demonstrates the F-N potential barrier 9

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of 0.25eV is too low for the electron tunnel freely in or out the Pt-NCs.

the Pt-NCs based memory devices.

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Hence, we deduced that the F-N tunneling is not the main mechanism for

In Fig. 5(b), the Schottky tunneling mechanism at low electric field is made by the equation[30]: βs 1 φs E2 − ), kB T kB T

is equal to

q3 . 4πεr ε0

4πm(kB )2 q . h3

The βs

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where A is the Richardson constant and dominated by A = q

(4)

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J ∝ AT 2 exp(

The others parameters: T, h, m ,q, kB , εr , ε0 and φs are

the temperature, the Planck’s constant, electron mass, charge of an electron, the Boltzmann constant, the relative permittivity, the vacuum permittivity and barrier height, respectively. In this mechanism, the calculational Schottky barrier and relative permittivity are 0.4eV and 2.17, respectively. The

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relatively low barrier value is hard to block electron tunneling between the p-Si (100) substrate and Pt storage units, and the permittivity about 2 is also far from our expectation. As a result, the Schottky tunneling mechanism is not a proper tunneling mechanism in accordance with recent Pt-NCs based

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memory measurement.

As far as B-T-B tunneling mechanism is concerned, when the electric field

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above 1MV/cm, the band to band tunneling mechanism (B-T-B tunneling) can be dominated by the equation[31]: 3

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Eg2 J = AV q exp(−B ), E Eg

where A and B are constants, can be given by the A =

(5) √

2m∗ 3 q , 4π 3 ¯ h2

B=

√ 4 2m∗ . 3q¯ h

The C is equal to 1 at room temperature. The E and Eg are the electric field 10

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and forbidden band width. The rest V is bias voltage. In Fig. 5(c), the fitted

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curve of B-T-B tunneling mechanism is presented. Obviously, measurement

on the slop and intercept are -6.23×108 and -16.70, respectively, which gives a forbidden band width of 9.19eV. However, the measuring band width for the HfAlOx and Pt metal are 6.0eV and 5.93eV, which forms a potential barrier

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of 2.15eV at flat-band condition. Hence, the 9.19eV forbidden bandwidth

from the B-T-B fit is not agreement with experimental result well. The

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B-T-B tunneling are may not the main tunneling mechanism, yet. P-F type tunneling is the last tunneling mechanism considered by us. Its fit plot is showed in Fig. 5(d) following the equation[32]: JP F ∝ E × exp( where βP F =

q

q3 . πεr ε0

βP F 1 φP F E2 − q ), kB T kB T

(6)

In Fig. 5(f), the detected slope and intercept are

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7.9×10−4 and 32, which corresponding to relative permittivity εr and P-F potential barrier are 14.78 and 0.85eV, respectively. The dielectric constant of 14.78 is very closed to our previous experimental results (about 17)[20]. However, the relative low potential barrier of 0.85eV is far from our expecta-

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tion, which is possibly attributed to the inevitable interfacial defects formed between the p-Si(100) substrates and HfAlOx tunneling layer.

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Based the above calculation results and analysis, as shown in Table 1. By comparing different tunneling mechanism, the P-F tunneling may play an important role in electron tunneling process although the permittivity and potential well have a relative low value. We believe that the defects such as oxygen vacancy existed in interfacial layer and the HfAlOx matrix, have great

impact on the low value. In order to prove this inference, 10nm-thick HfAlOx deposited on Si substrates under the optimizing experimental condition, is 11

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permittivities and potential well values.

Slope

Permittivity

Potential well

F-N

5.8×108

-

0.25

S-T

1.08×10−3

2.17

0.40

B-T-B

-6.23×108

-

9.19

P-F

7.9×10−3

14.78

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T unneling

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Table 1: Comparison of F-N, S-T, B-T-B, P-F tunneling mechanisms for the their slopes,

0.85

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etched by XPS, and atoms ratio for different etched time shown in Fig.6. As the Fig. 6(a) shown, the Hf4f binding energy peak has an obvious “red shift” phenomenon, especially at 300s, its binding energy peak at 15.23eV, which illustrates that only the HfSix existed in interfacial layer. The continual “red shift” for Hf4f as etching time increasing that demonstrates the oxygen

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vacancy defects existed and increased from our fabricated samples, surface to interfacial layer. Besides, the atom percent obtained based XPS analysis, shown in Fig. 6(b), illustrates that the oxygen atom percent under decreasing and the Si atom percent gradually increasing. Therefore, the oxygen vacancy

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defects existed in HfAlOx films, also in interfacial layer. It is worth noting that, as Fig.3 shown, this oxygen vacancy defects has negligible impact on

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memory characteristics[33]. Based above analysis, we believe the potential well value influenced by the oxygen vacancy defects, takes the permittivity value of 14.78 into account, the Pool-Frenkel tunneling is the main tunneling mechanism, but enhanced and assisted by the oxygen vacancy defects[34].

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4. CONCLUSION

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A non-volatile flash memory device with the MOS capacitor structure

containing 10nm-thick HfAlOx control layer, self-assembled Pt-NCs and 5nm-

thick HfAlOx tunneling layer are fabricated. By means of RF sputtering at room temperature, the fabricated Pt-Ncs is well-distributed and bear a high

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area density. Investigations on memory characteristics demonstrate that a memory window of 6.5V corresponding to the stored charge of 2.29×1013 cm−2

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was detected when applying ±8V program/erase voltage on the memory de-

vice. After applying program/erase voltage for 105 s, a memory window about 5.72V with 88% charge storage is still reserved. Also, a low leakage current of 1.85×10−7 A/cm2 @-1V was detected for the Pt-NCs based non-volatile flash memory device. Moreover, four tunneling mechanisms were discussed comprehensively in this work. We deduced that the defects-enhanced Poole-

neling behavior.

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Frenkel tunneling mechanism plays a crucial role in the stored charge tun-

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ACKNOWLEDGMENTS

This work was partly supported by the National Natural Science Foun-

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dation of China (11304410), Natural Science Foundation of Technology Department (QJHJZ-LKZS[2012]03 and QKHJZ[2014]2170) and Youth Science Foundation of Education Ministry (QJHKZ[2012]084) of Guizhou Province of China.

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References

Appl. Phys. Lett. 68 (1996) 1377 .

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[1] S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E.F. Crabbe, and K. Chan,

[2] S.R.A. Ahmed, A.B.Md. Ismail, Amer. J. Nanosci. and Nanotech. 2

SC

(2004) 8.

[3] J.H. Chen, Y.Q. Wang, W.J. Yoo; Y.C. Yeo, IEEE Trans. Electron

M AN U

Devices 51 (2004) 11.

[4] T. Ito, Y. Mitani, Y. Nakasaki, M. Koike, T. Konno, H. Matsuba, T. Kai, W. Kaneko and Y. Ozawa, Appl. Phys. Lett. 100 (2012) 072902. [5] H Choi, B.S. Choi, T.W. Kim, S.J. Jung, M. Chang, T. Lee and H.

TE D

Hwang, Nanotech. 19 (2008) 305704.

[6] R.C. Jeff Jr., M. Yun, B. Ramalingam, B. Lee, V. Misra, G. Triplett and S. Gangopadhyay, Appl. Phys. Lett. 99 (2011) 072104. [7] S.W. Ryu, Y.K. Choi, C.B. Mo, S.H. Hong, P.K. Park, and S.W. Kang,

EP

J. Appl. Phys. 101 (2007) 026109.

AC C

[8] D.Y. Yun, N.H. Lee, H.S. Kim, S.W. Lee and T.W. Kim, Appl. Phys. Lett. 104 (2014) 023304.

[9] L.W. Feng, C.Y. Chang, T.C. Chang, C.H. Tu, P.S. Wang, Y.F. Chang, M.C. Chen, and H.C. Huang, Appl. Phys. Lett. 95 (2009) 262110.

[10] Z. Liu, C. Lee, V. Narayanan, G. Pei, and E. C. Kan, IEEE Trans. Electron Devices 49 (2002) 1606. 14

ACCEPTED MANUSCRIPT

[11] M. Yun, D.W. Mueller, IEEE Electron Device Lett. 30 (2009) 12.

and T.S. Yoon, J. Nanopart Res. 15 (2013) 1345.

RI PT

[12] Q. Hu, S.C. Lee, Y.J. Baek, H.H. Lee, C.J. Kang, H.M. Kim, K.B. Kim,

[13] X.J. Liu, L. Zhu, M.Y. Gao, X.F. Li, Z.Y. Cao, H.F. Zhai, A.D. Li, and

SC

D. Wu, Appl. Surf. Sci. 289 (2014) 332.

[14] K.C. Chan, P.F. Lee, and J.Y. Dai, Appl. Phys. Lett. 92 (2008) 143117.

(2002) 2041.

M AN U

[15] Y.S. Lin, R. Puthenkovilakam and J.P. Chang, Appl. Phys. Lett. 81

[16] H. Yan, T. Kagata, S. Arima, H. Sato and H. Okuzak, Appl. Metri. Sci. 12 (2008) 205.

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[17] S. Ramesh, S. Dutta, B. Shankar, S. Gopalan, Appl. Nanosci. 14 (2014) 0298.

[18] C.H. Lee, S.H. Hur and J.H. Choi, Appl. Phys. Lett. 86 (2008) 152908.

EP

[19] G. He, L.D. Zhang, G.W. Meng, G.H. Li, Q. Fang, and J.P. Zhang, J. Appl. Phys. 102 (2007) 094103.

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[20] B. Wu, P. Zhang, B. Sun and Q.X. Gao, J. Alloys and Compounds, 575 (2013) 370.

[21] J. K. Kim, H.J. Cheong, Y. Kim, J.Y. Yi, H. J. Bark, S.H. Bang, and J.H. Cho, Semicond. Appl. Phys. Lett. 82 (2003) 2527.

[22] J.G. Hou, B. Wang, J.L. Yang, K.D. Wang, W. Lu, Z.Y. Li, H.Q. Wang, D.M. Chen, and Q.S. Zhu, Phys. Rev. Lett. 90 (2003) 24. 15

ACCEPTED MANUSCRIPT

[23] Z.T. Liu, C.H. Lee, V. Narayanan, G. Pei, and E.C. Kan, IEEE Trans.

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Electron Devices. 49 (2002) 1606 .

[24] K.C. Chan, P.F. Lee, and J.Y. Dai, Appl. Phys. Lett. 92 (2008) 143117. [25] Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, Jpn. J. Appl. Phys.,

SC

Part 1, 38 (1999) 425.

[26] D.W. Kim, F.E. Prins, T. Kim, S. Hwang, C. H. Lee, D. L. Kwong and

M AN U

S. K. Banerjee, IEEE Trans. Electron Devices 50 (2003) 510. [27] D.N. Van , H.N. Hong , R. Jayapal, J. Juyeon, J. Kyungsoo, B. Kyunghyun, A.D. Vinh and Y. Appl. Phys. Lett. 100 (2012) 143502 [28] Y.L. Chioua, J.P. Gambinob and M. Mohammada, Solid State Electron-

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ics 45 (2001) 1787.

[29] F.C. Chiu, J. Appl. Phys. 100 (2006) 114102. [30] P.R. Emtage and W. Tantraporn, Phys. Rev. Lett. 8 (1962) 267.

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[31] E.O. Kane, J. Phys. Chem. Solids. 12 (1960) 181.

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[32] S.D. Ganichev, E. Ziemann, and W. Prett, Phys. Rev. B 61 (1999) 15. [33] E. Verrelli, D. Tsoukalas, Microelectron. Eng. 88 (2011) 1189 [34] Y.V. Gomeniuk, Semicond. Phys. Quantum. Electr. & Opt. 5 (2012) 139

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Figure Captions Fig. 1. (a) SEM image of Pt-NCs grown on the surface of HfAlOx tunneling

layer, with an area density of 7.1×1012 cm−2 . (b) Cross-sectional HR-TEM image of a HfAlOx /Pt-NCs/HfAlOx /Si(100) non-volatile flash memory struc-

ture. The self-assembly Pt-NCs present clear lattice observably. Average

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diameter of the Pt-Nc is about 3nm.

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Fig. 2. Schematic of energy band alignment for the non-volatile memory devices with HfAlOx /Pt-NCs/HfAlOx /Si(100) capacitor structure under (a) flat-band condition, (b) charge programming process and (c) charge erasing process.

Fig. 3. (a) The diagram for the non-volatile memory devices with HfAlOx /Pt-

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NCs/HfAlOx /p-Si(100) capacitor structure. (b) The capacitance-voltage(CV) measurement for capacitor structure with Pt-NCs and without Pt-NCs. a memory window about 6.5V is observed corresponding to the stored charge

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density of 2.29×1013 cm−2 .

Fig. 4. (a) The high frequency of 1MHz flat band voltage-waiting time

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(∆V F -T) at room temperature when applying ±8V program/erase voltage

on Pt-NCs based non-volatile devices for 105 s. A reserved charge of 88% was detected. (b) The leakage current density -voltage (J-V) curves for the samples with Pt-NCs and without Pt-NCs, a leakage current of 1.85×10−7 A/cm2 was observed in HfAlOx film embedded Pt-NCs.

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Fig. 5. (a) ln(J/E2 )∝E1/2 curve based F-N tunneling. (b)ln(J)∝E1/2 curve ln( EJ )∝E1/2 curve based P-F tunneling.

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based Schottky tunneling. (c) ln( EJ )∝ E1 curve based B-T-B tunneling. (d)

Fig. 6. (a) XPS spectra of HfAlOx film etched by Ar ion and (b) atoms

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percent for different atom of HfAlOx at different etching time.

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Figure 1: (a) SEM image of Pt-NCs grown on the surface of HfAlOx tunneling layer, with an area density of 7.1×1012cm−2 . (b) Cross-sectional HR-TEM image of a HfAlOx /PtNCs/HfAlOx /Si(100) non-volatile flash memory structure.

The self-assembly Pt-NCs

present clear lattice observably. Average diameter of the Pt-Nc is about 3nm.

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Figure 2: Schematic of energy band alignment for the non-volatile memory devices with

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HfAlOx /Pt-NCs/HfAlOx /Si(100) capacitor structure under (a) flat-band condition, (b)

charge programming process and (c) charge erasing process.

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Figure 3:

(a) The diagram for the non-volatile memory devices with HfAlOx /Pt-

NCs/HfAlOx /p-Si(100) capacitor structure. (b) The capacitance-voltage(C-V) measurement for capacitor structure with Pt-NCs and without Pt-NCs. a memory window about 6.5V is observed corresponding to the stored charge density of 2.29×1013cm−2 .

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Figure 4: (a) The high frequency of 1MHz flat band voltage-waiting time (∆V F -T) at room temperature when applying ±8V program/erase voltage on Pt-NCs based non-volatile devices for 105 s. A reserved charge of 88% was detected. (b) The leakage current density -voltage (J-V) curves for the samples with Pt-NCs and without Pt-NCs, a leakage current of 1.85×10−7A/cm2 was observed in HfAlOx film embedded Pt-NCs.

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Figure 5: (a) ln(J/E2 )∝E1/2 curve based F-N tunneling. (b)ln(J)∝E1/2 curve based SchotJ J tky tunneling. (c) ln( E )∝ E1 curve based B-T-B tunneling. (d) ln( E )∝E1/2 curve based

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P-F tunneling.

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Figure 6: (a) XPS spectra of HfAlOx film etched by Ar ion and (b) atoms percent for

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different atom of HfAlOx at different etching time.

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