Microprogramming and microcontrol a hardware definition

21

MICROPROGRAMMING AND MICROCONTROL A HARDWARE DEFINITION Gerhard Chroust IBM Laboratory Vienna Austria

Abstract: This paper tries to give a simple and effective definition of 'microprogrammin@' by reducing this notion to the concept of a 'microcontrolled' machine. The class of microcontrolled machines can rigorously be defined using the terminology of switching algebra. These definitions are then used to specify quantitative parameters for the classification of microcontrolled machines.

I . INTRODUCTION

S i n c e 1951, w h e n P r o f . W i l k e s i n t r o d u c e d the n o t i o n o f ' m i c r o p r o g r a m m i n g ' (/12/) t h e r e has b e e n c o n s t a n t c o n c e r n a n d d i s c u s s i o n a b o u t its e x a c t m e a n i n g and scope. A tyDical indication of t h i s u n c e r t a i n t y is t h e e x i s t e n c e of a m u l t i t u d e of d i f f e r e n t d e f i n i t i o n s (e.q. /I/,/L~/,/5/,/6/,/7/,/8/,/9/,/11/,/13/). The s i t u a t i o n is e v e n w o r s e , if o n e w a n t s to ~ u a n t i f y c h a r a c t e r i s t i c s of m i c r o p r o g r a m m e @ m a c h i n e s . E x c e p t for the n u m b e r o ~ b i t s in the c o n t r o l w o r d no a c c e n t e ~ m e a s u r e s s e e m to e ~ i s t . Considerin~ existing
of a m i c r o c o n t r o l l e d In this paper this

a) T h e c o n c e p t of c o n t r o l l e v e l s a l l o w s to p l a c e all c o n t r o l l o g i c i n t o o n e c o n t i n u o u s system between strict microcontrolled machines on one end and arbitrary complex control logic on the other. T h i s is s h o w n in s e c t i o n 3. b) the d e f i n i t i o n o f m i c r o c o n t r o l l e d m a c h i n e s a l l o w s a certain microcontrolled m a c h i n e is (see s e c t i o n 4). The concepts presented here paper will excite discussion and

to q u a n t i f y

s t i l l n e e d some r e f i n e m e n t . further investigations.

The

'how m u c h

author

horizontal'

hopes

that

this

22 2. "~ICROCO~TROLLED 5 ~ C H I N E S A~D ~ I C R O P R O C ~ A ~ I N C (taken from /3/) C o n c e p t u a l l y a central p r o c e s s i n g unit can be split into separate n e t w o r k s as shown in Fig. 1 (cf. also /11/), the m o s t important subnetworks being the control network, the execution network and the d e c o d i n g network. The d i v i s i o n between the d e c o d i n g and the e x e c u t i o n network is to some degree a c o n c e p t u a l one only, since these networks are usually integrated into one. For the following c o n s i d e r a t i o n s we assume that all gates which do not d i r e c t l y govern data flow belong to the decoding network. Furthermore 'fanning out' of signals is c o n s i d e r e d a logical function and all such nodes are thought to belong to the d e c o d i n g network (Fig.2). At each clock pulse the control transfers one word from m e m o r y (a 'control word') into the control register. The s e l e c t i o n is based on the address of the p r e v i o u s l y selected word, on i n f o r m a t i o n from the d e c o d i n g network (e.g. jump address) and from the e x e c u t i o n network (e.g. o v e r f l o w condition). The actual structure of the control network is of no concern for this paper. The c o n t e n t s of the control r e g i s t e r is t r a n s l a t e d into control signals by the d e c o d i n g network. We p o s t u l a t e that the execution network be purely combinational. Logical connections within this network take place 'simultaneously' except for the 'natural' gate delays. ~t this point a m i n o r c l a r i f i c a t i o n seems appropriate: All n e t w o r k s are c o n s i d e r e d at a logical level. The clock pulses synchronize the control signals in the machine. Problems c o n c e r n i n g hazards an~ t r a n s i e n t are as~u~ed to be taken care of. ~or the sahe of simnlicity ~¢e assume binary logic. -icrocontrollec ~ m a c h i n e s nn the c~ecor~ing net~7orh. [~efinition I : A ~achine i~ combinational.

(~trictlv)

will ~Tistinguish t h e m s e l v e s

m i c r o c o n t r o l led,

if

from others by r e s t r i c t i o n s put

and

only if the d e c o d i n g network is

Definition 1 seems to cover e s s e n t i a l l y "ilkes' notion o~ microprograr,ning (/12/). Thc~ -~efinition ensures that no fiel(? in the control register ~,ill cause the d e c o d i n g n~;t'~-orh to issue a sequence of control signals. The e x i s t e n c e of the d e c o d i n g network nahes above d e f i n i t i o n s a p p l i c a b l e to both h o r f z o n t a l and v e r t i c a l microprogrammling. Since the e x e c u t i o n n e t w o r k is also combinational, all timing of gates must be done e x p l i c i t l y by control signals due to d i f f e r e n t control words. For practiCal purposes, however, it is n e c e s s a r y to a l l o w for delay of physical gates. ['achines which do not fulfill D e f i n i t i o n I for such reasons only should still be called microcontrolled. Vor this reason a larger class of m a c h i n e s is defined, which includes stricly m i c r o c o n t r o l l e d machines.

w

esee~tloa

a~twork

4eeedla8 aeCwerM

Fig.1

Fig.2

ezeeu~Io, aatvorM

2~ D e f i n i t i o n 2: In a ~ m i c r o c o n t r o l l e d m a c h i n e the ~ e c o ~ i n g net~zork c o n s i s t s of a c o m b i n a t i o n a l n e t w o r k p r e c e d e d bv d e l a v s ~ %,,n~Ich n r o v i d e ~ i f f e r e n t but fixe(7 ~elavs for the signals e m a n a t i n g from the Control R e g i s t e r (~ig. 3). In v i e w of this d e f i n i t i o n the p h a s e ~ m i c r o c o n t r o l l e d machine.

strict m i c r o c o n t r o l l e ~

machine

is a special

case of a

execution netvork

delay,

dQ¢c~ln|n|t.ork D e f i n i t i o n 3: • ~icro~rogramming machine.

is

writing

code

in

machine

Fig.] language

for a p h a s e d

microcontrolled

Above definition makes the notion of m i c r o n r o g r a m m i n q d e p e n d a n t on the u n d e r l y i n g machine. W r i t i n g the same code may be m i c r o p r o g r a m m i n g or not d e p e n d i n g on the hardware. This seems p a r a d o x i a l at first glance, but a similar s i t u a t i o n arises for m a c h i n e code: A specific list of code m a y be m a c h i n e code for one m a c h i n e and a h i g h e r level language for another. Rosin /10/ gives the example, that IB~/360 m a c h i n e i n s t r u c t i o n s are d i r e c t l y e x e c u t e d on an IB~ 360/75, w h e r e a s they are e m u l a t e d (using microcode) on other models.

3. C O N T R O L

LEVELS

OF A "'ACHIUE

~icrocontrol as defined in Definition I and 2 is a very basic concept. It seems u n s a t i s f a c t o r y that small changes in the control logic, w h i c h in t h e m s e l v e s m i g h t be very reasonable and systematic, totally d e s t r o y the p r o p e r t y of being m i c r o c o n t r o l l e d (cf. Fig. 8 and 9). In practice one would expect a continuous transition from strict microcontrolled machines to p h a s e d m i c r o c o n t r o l l e d m a c h i n e s and to more complex control structures. The n o t i o n of 'level' tries to c a t c h this idea. One can split d e c o d i n g n e t w o r k s - and the a u t h o r b e l i e v e s that this is true for any control logic - into c o m b i n a t i o n a l s u b n e t w o r k s s e p a r a t e d by delay units. A simple form of such a d i v i s i o n for a (non-microcontrolled) m a c h i n e is shown in Fig. 4. Further studies will be n e c e s s a r y to find a p p r o p r i a t e rules for such divisions. We assume for the m o m e n t that this division is done sensibly, resulting in 'maximal' subnetworks. Fig. 4. can be interpreted level of sequence control.

that each

de©odina metvork

D e f i n i t i o n 4: The level of control of a s u b n e t w o r k s and d e l a y n e t w o r k s .

~

control

set of d e l a y units

~eeodinI

an a d d i t i o n a l

OZO~tion

letvork

logic

establishes

aet~ork

is

the

sum of the n u m b e r

of d e c o d i n g

24 In this t e r m i n o l o g y strict m i c r o c o n t r o l l e d m a c h i n e s (no delay elements) are of level 0 or I, phased m i c r o c o n t r o l l e d m a c h i n e s of level I or 2. The network of Fig. 4 e s t a b l i s h e s level 3. ~ 7 o t e , that the networh of Fig. 10, although being of level 2, in not m i c r o controlled. In some sense the level of control indicates how 'indirectly' the c o n t e n t s of the control r e g i s t e r is used to control the data gates. Above d e f i n i t i o n still leaves m a n y questions open. Vor example it is not quite clear how to treat ]nixed structures as in Fig. 5..

I

I,o

...... nl~,nork

-

I

'

l

D e f i n i t i o n 5: --q~ r~achin6- is dire_____ctly m i c r o c o n t r o l l e d , consists of delays only. T,~th e x c e n t i o n of control r e g i s t e r are not change.ft.

if a

the d e c o d i n g network does not exist or nossible delay, the signals from the

It. H O R I Z O N T A L I T Y ~n a d i r e c t l y m i c r o c o n t r o l l e d machine each bit of the control word d i r e c t l y controls one gate. T h e r e f o r e any possible state of the e x e c u t i o n network can be specified by a pattern of the control word. In those cases, where a d e c o d i n g network exists, this in not n e c e s s a r i l y so. Some t h e o r e t i c a l l y possible states on the output side of the d e c o d i n g network will never be generated. In s w i t c h i n g algebra (/14/) one finds the notion of i n f o r m a t i o n s u p p r e s s i o n of a network. ~e will use the i n f o r m a t i o n s u p p r e s s i o n of the d e c o d i n g network to m e a s u r e the h o r i z o n t a l i t y of a m i c r o c o n t r o l l e d machine. The basis for m e a s u r i n g h o r i z o n t a l i t y is the r e l a t i o n of the binary logarithms of the n u m b e r of d i f f e r e n t states the control word could r e p r e s e n t versus the actual number of states at the output of the d e c o d i n g network. On the input side the n u m b e r of states c o r r e s p o n d s to 2 ~ m , where m is the number of bits in the control word.

D e f i n i t i o n 6: The h0rizontality h o~ a m i c r o c o n t r o l l e d m a c h i n e is defined as the r e l a t i o n of the binary logarithms of the number of possible output states to the number of possible input states of the d e c o d i n g network. l d ( c a r d (4 o) ) h

~

~

o

~

m

~

m

~

m

m

m

m

m

ld(card(4')) v h e r e ~' ( ~ o ) network.

is

the

set

of

input

(output)

states

of

the

decoding

Theorem I : Given n decoding networks in parallel then the r e s u l t i n g h o r i z o n t a l i t y will be the w e i g h t e d sum of the h o r i z o n t a l i t i e s of the individual networks. The w e i g h t i n g factors are based on the relative n u m b e r of input lines.

25

Proof : Let in be t h e n u m b e r of i n p u t the d e c o d i n g n e t w o r k (Fig. 6).

id(.(card(~R|}) h

=

----''"

lines

and

~

(~

the

number

of

input

Eld(card(~J}

. . . . . . . . . . .

---- . . . . .

"----"

(output)

~, ~

. . . . . .

states

for

!

--

Eld (card (~} }

Id (, (card (~A)) }

using mn = Id(card(~A}} ld (card (~a)) = E ..............

E

£a~

Id (card ( ~ } ) mn .... " Yd ( c a r d (8~) Em~

m2

mn =

I~ - - -

Fig.6

*

hn

£mi c~.e.d,

mn

hn

r

I. Theorem 2 : The horizontality of s e v e r a l s e r i a l l y c o n n e c t e d d e c o d i n g n e t w o r k s is the p r o d u c t the individual horizontalities. A delay element does not change the borizontality.

of

Proof : a)

For

the

connection

of

2 networks:

Fig.

h =

b) c)

Id (card {~) ............. mz

For

)

an a r b i t r a r y

Id {card = ............. m,

number

If one considers the n u m b e r of i n p u t

(~I[} } •

Id (card .............

of networks

a delay states.

7

element

(~)

} =

Id (card ( ~ [ } ) the n r o o f then

the

is

hz

•

•

ha

(I

i t e r a t e ~.

number

of o u t p u t

states

is al,*,ays e m u a l

to

q . e .~.

5. E)[~:YPLES

T o i l l u s t r a t e s o m e b o r d e r c a s e s o f t h e d e f i n i t i o n s , t h r e e sam[}le r;achine d e s c r i b e d a n d c l a s s i f i e d a c c o r d i n g to the g i v e n d e f i n i t i o n s .

structures

are

5.1) A situation, in wl,ich d u r i n g one c l o c k t i m e d a t a is fetchc< ~ f r o m a m e m o r y ceil, u p d a t e d and then s t o r e C b a c h J s i~ot m i c r o c o n h r o l , J~ an iml~lemen't<'tJon like Fig. 9. is chosen. It is a l e v e l 2 n e t w o r k , the h o r i z o n t a l i t y is 0.5 (0.5 * I). 5.2) A small modification, however, a]]o,~s to r e p r e s e n t t'~e ~ro];lem of 5.1 as f.has~:.] ~ : ~ c r o c o n t r o l u s i n g t~:o c o n t r o l ;~its (~Jq. 9). In a t r u l y ~:~icrocontrolle<" ntachine the input an~ ~ o u t ~ u t of the re.gister w i l l n e e d sel)arahe c o n t r o l ~ i e ] d s in a n y c a s e as to ta]:e c a r e of d i f f e r e n t r o u t i n g s for the d a t a . T h i s n e t w o r k is to be classified as l e v e l I, its h o r i z o n t a l i t y is I.

26

Xesor¥

lnpu%-sste

Y,.tnction

O u t p u t ' s a~e

te

I p.,

~Ig.

8

Fig.

.

9

I

S~eo~40ut}ut

-iste

5.3) The definitions of mlcrocontrolle~ r~achines ,:~o not a l l o ~ fnr $~lay~ b~tc~<~ i:!.~ d e c o d i n g and the £~xecution networh. If t],is %Jcrc not ~-~rohibit;;<~, a sing]u control field could trigger a sequence of counters which in turn would function liP.e a c l a s s i c a l h a r d - w i r e d logic d e s i g n (Fig. 10). In Fig. 10 one has to note that the 'fanning-out point' of the control signal is considcre~] to belong to the ~]ecoding net%7ork. This is a level 2 n e t w o r k with h o r i z o n t a l ~ t y 0.33 (0.33"I).

Fi 9 • ?0

"leco~int

he%York"

f{. COI:CI,USION

The aim of this p a p e r

is to give

a simple,

effective

definitiop

of ~!icroprogramming.

The d e f i n i t i o n of m i c r o p r o g r a m m i n g is made d e p e n C a n t on the u n d e r l y i n g machine: microp r o g r a m m i n g is w r i t i n g m a c h i n e code for a m i c r o c o n t r o l l e C machine. "licroprogran~ing is therefore essentially a h a r d w a r e property. In c o n f o r m i t y with R . R o s i n /10/ this result m a k e s it a p p a r e n t that there is no m i c r o p r o g r a m m i n g separate from a h a r d w a r e machine. The class of m i c r o c o n t r o l l e d m a c h i n e s is r i g o r o u s l y defined. The p r o ~ e r t y of being m i c r o c o n t r o l l e d can be t e s t e d e f f e c t i v e l y for any one machine. The proposed definition of microcontrol separates such m a c h i n e s from those with c l a s s i c a l s e q u e n t i a l control. The d e f i n i t i o n e s s e n t i a l l y follows the i n t u i t i v e n o t i o n of 'direct control of individual gates', but is probably broad e n o u g h to cover all s h o r t - c u t s used in actual design of m i c r o c o n t r o l l e d machines. In addition a c o m m o n c o n c e p t for any control logic is p r o p o s e d together with quantifying p a r a m e t e r s a l l o w i n g a c l a s s i f i c a t i o n of e x i s t i n g control logic. It is hoped that these d e f i n i t i o n s - and their d e f i c i e n c i e s - will trigger further d i s c u s s i o n and research. 7. REFERJ~NCES

/I/ B r o a d b e n t J.K.: ~ i c r o p r o g r a m m i n g No.1 (Feb. 1974), p. 2 - 8.

and system

architecture.-

/2/ C h r o u s t G. : ~ i k r o p r o g r a m m i e r u n g - Eine D e f i n i t i o n ~echenanl. 16 (1974), No. 2, n. 4 9 52. /3/ C h r o u s t C. : A H a r d w a r e D e f i n i t i o n (197t~), ~Io. I, p. 11 - 14.

The C o m p u t e r

auf H a r d w a r e - B a s i s . -

of ~licroprogramming.-

J.,

vol.

17,

Elektron.

~Ic,'~ICRO %]ewsletter,

vol.

5

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A., L e v r a t North-

/5/ T~]ynn I'.J.,~'cLaren 7~.D.: ]~.t~57.

Heeting

/6/ U u s s o n

S.:

Y.icroprogramming

~icroprogramming:

Principles

revisited.-

Proc.

and P r a c t i c e s . -

ACI~ N a t ' l .

Prentice

Hall,

1967,

1970.

/7/ I Z

Corn. : ~.n I n t r o C u c t J o n to ' . i c r o p r o g r a r ~ i n g . ~o. "U:' 2 0 - 0 3 t 5 - 0 , IL~ ~ C o r p o r a t i o n ,

/t/

J o r A a i n P.~,., 1969.

/9/

n o , i n P.F. : C o n t e m p o r a r y C o n c e p t s of M i c r o p r o g r a m m i n g C o m p u t i n g S u r v e y s , vol. I (Iq69), pp. 197 - 212.

/1'~/

Breslau

71.: Cond~;nsec] C o m p u t e r

Encyclopedia.-

Book

Comp.

and E m u l a t i o n . -

! osin

T~. r . : The s i g n i f i c a n c e of "~icronrograru~dng.- in: C(~nther A., l,evrat B . , L i p p s [[. (ecis.), ~roc. Int. C o m p u t i n g Sym.~ 1n73, Davos, m. 237. North-Holland Publ.

<:oT~.

197-'I.

/1 I/ r'en.~t Z. : Zur s y ~ t e m a t i k von 1 3 ( 1 9 7 1 ) , ['.I, p. 22-26.

"'ikroprogrammwerksstru]:turen.-

/I 2/ <'ilkes "'.~'." The b e s t ',~ay to c!esign an a u t o m a t i c "'anchest Univ. C o m n u t e r I n a u g u r a l C o n f e r e n c e , /13/

~'cr,raw-IIill

Pechenanl.

calculating machine.p. 16-18, (July 1951).

~'Jlkes "l.v. : The ~ro~:th of I n t e r e s t in ~ i c r o p r o q r a m m i n g , Cor,:p. ~ u r v e y s , vol. 1, no. 3, S e p t 69.

/It~/ Z e m a n e k ]'., C h r o u s t

Elektron.

A Literature

Survey.-

C., N o w o t n y E. : L o g i s c h e A l g e b r a u n d T h e o r i e d e r Schaltnetzwerke.in: S t e i n b u c h K., U e b e r W. (eds.): T a s c h e n b u c h der I n f o r m a t i k , vol. 2, D. I - 63, S p r i n g e r V e r l a g Lerlin, IIeidelberg, N e w Y o r k 197LI.