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Monolithic integration using differential Si-MBE
458
Journal of Crystal Growth 81 (1987) 458—462 North-Holland, Amsterdam
MONOLITHIC INTEGRATION USING DIFFERENTIAL Si-MBE E. KASPER and H.J. HERZOG A EG A ktiengesellschaft, Forschungsinstitut U/rn, Sedanstrasse 10, D-7900 U/rn, Fed. Rep. of Germany
and K. WORNER Telefunken E/ectronic, Heilbronn, Fed. Rep. of Germany
Molecular beam epitaxy of silicon on substrates with patterned oxide overlayers results in single-crystalline films in the oxide windows (differential Si-MBE). A concept for fabrication of monolithically integrated circuits using differential Si-MBE is given. We report about properties of differential Si-MBE films grown at temperatures between 550 and 7500 C. For the first time integrated bipolar transistors in differential Si-MBE films were fabricated and characterized. Transit frequencies up to 5 GHz could be realized with this first design.
I. Introduction In standard silicon technology integrated bipolar circuits are realized using epitaxial films, But also for CMOS circuits an increasing usage of epitaxial layers to avoid latch up problems is applied. In this standard approach epitaxial layers without lateral structure are used. As an example fig. 1 shows the principal scheme of an integrated ______________________________ ~
____________
bipolar transistor. Such a structure will be obtained, e.g., by the following process sequences. (i) Epitaxy of uniform n-layer on top of a p-substrate with n k-buried layer (sub-collector) zones. (ii) Oxide isolation of the device area and of the later collector contact. (iii) Definition of the collector contact, base contact, base and emitter region by ion implantation/diffusion. With respect to epitaxy, this process sequence suffers from the temperature cycles needed for postepitaxial processing, especially for isolation ditionalMBE steps. profiling process and with lowvariations. its high We temperature potential started for growth an offers investidopant adgation of process sequences based on differential Si-MBE.
______________
Fig. 1. Scheme of an integrated bipolar transistor (E, emitter; B, base; C, collector contact area). Electrical isolation of the device and of the collector contact is obtained by selective oxidation (Si0 2). An epitaxial layer of thickness d is grown on the substrate. The effective thickness d6ff is decreased by postepitaxial processing.
2. Differential epitaxy
L
MBE on substrates with prepatterned oxide over-layers results in single-crystalline film islands in the oxide windows and in high resistivity polycrystalline films on the oxide [1]. This growth mode was termed differential epitaxy [2]. The film structure depends on thickness ratio oxide/film
0022-0248/87/$03.50 © Elsevier Science Publishers B.V. (North-Holland Physics Publishing Division)
LI
E. Kasper et al.
/ Monolithic integration using differential Si-MBE
and on growth temperature [3]. At high temperatures (a 1000°C)usually not employed with MBE the incoming Si reacts with the oxide to form volatile silicon monoxide (fig. 2a). At typical SiMBE temperatures (550—750°C) this chemical reaction can be neglected. The structure of the polycrystalline/single-crystalline boundary depends on the thickness ratio between film and oxide (figs, 2b and 2c). For films thinner than the oxide (fig. 2b) there is not direct contact between singlecrystalline and polycrystalline regions. The poiycrystalline region can be lifted off by etching the oxide (patterned epitaxy [4]). In this approach we use oxides thinner than the film (fig. 2c) for utilizing the isolation properties of the oxide/poly-Si structure. The growth of such layers is described in detail in ref. [5].Here we want to examine the crystal structure and lattice perfection of differential Si-MBE films. One can clearly distinguish Si-MBE Film
Si beam
~
5l~~2 Si
substrate
Cc) ow temperature, tow oxide thickness
t~,< t~
_____
3
Si beam
3
____________
Si - MBE Film
~
\
so, Si__~
between three regions (figs. 3—5):. (i) The singlecrystalline film inside the oxide windows. (ii) The interlock of poly-Si and single-crystalline film at the window edge. (iii) The high resistivity poly-Si on top of the oxide. Differential Si MBE layers are characterized by transmission electron microscopy (TEM) and scanning electron microscopy (SEM). A top view TEM micrograph with a diffraction in-set showing the poly-Si structure on an oxide overlayer with a thickness of 0.7 ~&mgrown at 550°C on a 0.45 ~.tm thick oxide is given in fig. 3. It is found that the grain size depends on deposition temperature and also, though weak, on layer thickness. Some values determined by means of dark-field TEM are listed in table 1. Within the oxide windows perfect crystal growth takes place as indicated by the top view TEM micrograph in fig. 4a. In the 0.9 /.tm thick epilayer grown at 750°Cthere are no crystal defects within theOf detection limit of this method 10” cm2). particular importance is the (~ epitaxial/polycrystalline transition at the edges of the masking oxide. There is no facet growth and the oxide pattern is almost perfectly reproduced as well in lateral as in vertical direction. For the case of oxide thinner than MBE layer some dislocations and planar defects (as stacking faults and twin lamellae) are found at the epitaxial/polycrystalline boundary. This is demonstrated by the top
poty Si t~
459
tf
Si substrate
(b) tow temperature, high oxide thickness t,.,
>
s,~
1,
Si beam
111
____
temperature reaction
__________________
______
________
Si. Si0 2 Cs) —‘-2SiO(g)
Fig. 2. Principal structures of differential Si-MBE layers. Dcposition of a Si beam onto a patterned oxide on a Si substrate.
Fig. 3. TEM micrograph with a diffraction in-set of the polycrystalline structure of an oxide overlayer. Marker represents 0.5 ~m.
LI LI
E. Kasper et al.
460
/
Monolithic integration using differential Si-MBE
EPI
~~flt~ara-~
Fig. 4. (a) TEM micrograph of the epitaxial layer part within an oxide window. (b) TEM micrograph of the epi/poly boundary for MBE thickness> oxide thickness showing some dislocations and planar defects. Marker represents 1 tim.
Table 1 Values of layer thickness and grain size determined by means of dark-field TEM MBE temperature (°C)
Layer thickness (gm)
Grain sizeQ~m)
550 550 750 750
0.2 0.7 0.2 0.8
0.03 0.0.4 0.1 0.3
________
view TEM in fig. 4b of a 0.9 ~.Lmlayer grown at 750°Con a 0.45 ~tm thick patterned oxide. However, the defect density and range into the epitaxial layer decreases with decreasing epitaxy ternperature. The surface morphology of the epi/poly transition of a 0.2 ~tm thick MBE layer on a 0.45 ~tm thick oxide is documented by the SEM micrograph in fig. 5. Before microscopy the sample has been shortly treated by Secco-etch. This caused the grainy surface structure of the poly Si layer on the oxide. On the other hand, the absence of etch pits in the epitaxial layer part proves the good crystal quality of the differential Si MBE material. 3. Concept of monolithic integration using differential MBE films
Fig. 5. SEM micrograph of an cpi/polv transition at an oxide edge. The grainy structure of the poly-Si layer on the oxide is due to the Secco-etch treatment of the sample. Marker represents 1 ~ni.
This concept is based on three basic process sequences (fig. 6). (i) The substrate with buried layer zones is covered by a patterned thin oxide layer (— 0.2 ~tm) with windows in the later areas .
.
..
of collector and base/emitter (fig. 6a). (ii) Differential epitaxy creates in one process step single crystalline regions in the transistor area and isolat.
/ Monolithic integration using differential Si-MBE
E. Kasper eta!.
rZ,Z/Z,ZZZZZ.~
a)
-
461
J’77—oxid
substrate
____________________________________________
-~
~
~n-epi
coUecto:
~
itter
~
______________________________ Fig. 6. Concept of monolithic integration using differential Si-MBE. (a) Substrate with patterned oxide. (b) Differential epitaxy on patterned substrate. (c) Postepitaxial processing for collector contact and base/emitter definition.
ing oxide/poly-Si regions outside (fig. 6b). (iii) Definition of transistor contacts and base/emitter by conventional methods, e.g. ion implantation/diffusion (fig. 6c). The main advantage of this process sequence is given by omitting the separate isolation process. Postepitaxial heat treatment is reduced from which profile definition and reproducibility may benefit.
Fig. 7. Micrograph of an integrated bipolar transistor in a frequency divider circuit fabricated using differential Si-MBE.
6 0Hz
1
UCB •
2V
d~~o,75 ,~m
~
\ \~ 2 ~
~ “‘
~
20
25
1,!5~umCW 3499) 1 2Opm(W3477C
Ic mA
4. High frequency operation of an integrated hi polar transistor As test vehicle we have chosen a medium scale integrated circuit (frequency divider). Apart from differential Si-MBE all processes run on a production line with 2 ~tm emitter width [61.Fig. 7 shows a micrograph of an integrated bipolar transistor inside of the frequency divider circuit. Additionally poly silicon resistors were created by high dose implantation and etching of polycrystalline regions. But this will not be treated in this paper. Fig. 8 shows the transit frequency as function of the current for integrated bipolar transistors with various thickness of the differential Si-MBE layers. Transit frequencies up to 5—6 GHz were observed
Fig. 8. Transit frequencies fT of integrated transistors versus collector current J~ for various layer thickness dE of the differential Si-MBE-films.
with thicknesses dE ranging from 0.75 to 1.2 ~tm. The submicron layer (dE = 0.75 ~tm) exhibits improved frequency behaviour for a wide dynamic current range.
5. Conclusion A concept for monolithic integration based on differential Si-MBE films was developed. Integrated bipolar transistors were realized using apart from Si-MBE production line equipment.
462
E. Kasper eta!.
/
Monolithic integration using differential Si-MBE
High frequency results (6 GHz) demonstrate the capability of this technique.
References [1] A.Y. Cho and W.C. Ballamy, J. AppI. Phys. 46 (1975) 783. [2] Y. Ota, Thin Solid Films 106 (1983) 3.
[3] E. Kasper and K. Wörner, in: Proc. 2nd Intern. Symp. on VLSI Science and Technology, Electrochem. Soc. Proc. 84-7, Eds. K.E. Bean and GA. Rozgonyi (Electrochem. Soc., Pennington, PA, 1984) p. 429. [4] J.C. Bean and GA. Rozgonyi, Appi. Phys. Letters 41 (1982) 752. [5] H.J. Herzog and E. Kasper, J. Electrochem. Soc. 132 (1985) 2227. [6] E. Kasper and K. Wörner, J. Electrochem. Soc. 132 (1985) 2481.
Journal of Crystal Growth 81 (1987) 458—462 North-Holland, Amsterdam
MONOLITHIC INTEGRATION USING DIFFERENTIAL Si-MBE E. KASPER and H.J. HERZOG A EG A ktiengesellschaft, Forschungsinstitut U/rn, Sedanstrasse 10, D-7900 U/rn, Fed. Rep. of Germany
and K. WORNER Telefunken E/ectronic, Heilbronn, Fed. Rep. of Germany
Molecular beam epitaxy of silicon on substrates with patterned oxide overlayers results in single-crystalline films in the oxide windows (differential Si-MBE). A concept for fabrication of monolithically integrated circuits using differential Si-MBE is given. We report about properties of differential Si-MBE films grown at temperatures between 550 and 7500 C. For the first time integrated bipolar transistors in differential Si-MBE films were fabricated and characterized. Transit frequencies up to 5 GHz could be realized with this first design.
I. Introduction In standard silicon technology integrated bipolar circuits are realized using epitaxial films, But also for CMOS circuits an increasing usage of epitaxial layers to avoid latch up problems is applied. In this standard approach epitaxial layers without lateral structure are used. As an example fig. 1 shows the principal scheme of an integrated ______________________________ ~
____________
bipolar transistor. Such a structure will be obtained, e.g., by the following process sequences. (i) Epitaxy of uniform n-layer on top of a p-substrate with n k-buried layer (sub-collector) zones. (ii) Oxide isolation of the device area and of the later collector contact. (iii) Definition of the collector contact, base contact, base and emitter region by ion implantation/diffusion. With respect to epitaxy, this process sequence suffers from the temperature cycles needed for postepitaxial processing, especially for isolation ditionalMBE steps. profiling process and with lowvariations. its high We temperature potential started for growth an offers investidopant adgation of process sequences based on differential Si-MBE.
______________
Fig. 1. Scheme of an integrated bipolar transistor (E, emitter; B, base; C, collector contact area). Electrical isolation of the device and of the collector contact is obtained by selective oxidation (Si0 2). An epitaxial layer of thickness d is grown on the substrate. The effective thickness d6ff is decreased by postepitaxial processing.
2. Differential epitaxy
L
MBE on substrates with prepatterned oxide over-layers results in single-crystalline film islands in the oxide windows and in high resistivity polycrystalline films on the oxide [1]. This growth mode was termed differential epitaxy [2]. The film structure depends on thickness ratio oxide/film
0022-0248/87/$03.50 © Elsevier Science Publishers B.V. (North-Holland Physics Publishing Division)
LI
E. Kasper et al.
/ Monolithic integration using differential Si-MBE
and on growth temperature [3]. At high temperatures (a 1000°C)usually not employed with MBE the incoming Si reacts with the oxide to form volatile silicon monoxide (fig. 2a). At typical SiMBE temperatures (550—750°C) this chemical reaction can be neglected. The structure of the polycrystalline/single-crystalline boundary depends on the thickness ratio between film and oxide (figs, 2b and 2c). For films thinner than the oxide (fig. 2b) there is not direct contact between singlecrystalline and polycrystalline regions. The poiycrystalline region can be lifted off by etching the oxide (patterned epitaxy [4]). In this approach we use oxides thinner than the film (fig. 2c) for utilizing the isolation properties of the oxide/poly-Si structure. The growth of such layers is described in detail in ref. [5].Here we want to examine the crystal structure and lattice perfection of differential Si-MBE films. One can clearly distinguish Si-MBE Film
Si beam
~
5l~~2 Si
substrate
Cc) ow temperature, tow oxide thickness
t~,< t~
_____
3
Si beam
3
____________
Si - MBE Film
~
\
so, Si__~
between three regions (figs. 3—5):. (i) The singlecrystalline film inside the oxide windows. (ii) The interlock of poly-Si and single-crystalline film at the window edge. (iii) The high resistivity poly-Si on top of the oxide. Differential Si MBE layers are characterized by transmission electron microscopy (TEM) and scanning electron microscopy (SEM). A top view TEM micrograph with a diffraction in-set showing the poly-Si structure on an oxide overlayer with a thickness of 0.7 ~&mgrown at 550°C on a 0.45 ~.tm thick oxide is given in fig. 3. It is found that the grain size depends on deposition temperature and also, though weak, on layer thickness. Some values determined by means of dark-field TEM are listed in table 1. Within the oxide windows perfect crystal growth takes place as indicated by the top view TEM micrograph in fig. 4a. In the 0.9 /.tm thick epilayer grown at 750°Cthere are no crystal defects within theOf detection limit of this method 10” cm2). particular importance is the (~ epitaxial/polycrystalline transition at the edges of the masking oxide. There is no facet growth and the oxide pattern is almost perfectly reproduced as well in lateral as in vertical direction. For the case of oxide thinner than MBE layer some dislocations and planar defects (as stacking faults and twin lamellae) are found at the epitaxial/polycrystalline boundary. This is demonstrated by the top
poty Si t~
459
tf
Si substrate
(b) tow temperature, high oxide thickness t,.,
>
s,~
1,
Si beam
111
____
temperature reaction
__________________
______
________
Si. Si0 2 Cs) —‘-2SiO(g)
Fig. 2. Principal structures of differential Si-MBE layers. Dcposition of a Si beam onto a patterned oxide on a Si substrate.
Fig. 3. TEM micrograph with a diffraction in-set of the polycrystalline structure of an oxide overlayer. Marker represents 0.5 ~m.
LI LI
E. Kasper et al.
460
/
Monolithic integration using differential Si-MBE
EPI
~~flt~ara-~
Fig. 4. (a) TEM micrograph of the epitaxial layer part within an oxide window. (b) TEM micrograph of the epi/poly boundary for MBE thickness> oxide thickness showing some dislocations and planar defects. Marker represents 1 tim.
Table 1 Values of layer thickness and grain size determined by means of dark-field TEM MBE temperature (°C)
Layer thickness (gm)
Grain sizeQ~m)
550 550 750 750
0.2 0.7 0.2 0.8
0.03 0.0.4 0.1 0.3
________
view TEM in fig. 4b of a 0.9 ~.Lmlayer grown at 750°Con a 0.45 ~tm thick patterned oxide. However, the defect density and range into the epitaxial layer decreases with decreasing epitaxy ternperature. The surface morphology of the epi/poly transition of a 0.2 ~tm thick MBE layer on a 0.45 ~tm thick oxide is documented by the SEM micrograph in fig. 5. Before microscopy the sample has been shortly treated by Secco-etch. This caused the grainy surface structure of the poly Si layer on the oxide. On the other hand, the absence of etch pits in the epitaxial layer part proves the good crystal quality of the differential Si MBE material. 3. Concept of monolithic integration using differential MBE films
Fig. 5. SEM micrograph of an cpi/polv transition at an oxide edge. The grainy structure of the poly-Si layer on the oxide is due to the Secco-etch treatment of the sample. Marker represents 1 ~ni.
This concept is based on three basic process sequences (fig. 6). (i) The substrate with buried layer zones is covered by a patterned thin oxide layer (— 0.2 ~tm) with windows in the later areas .
.
..
of collector and base/emitter (fig. 6a). (ii) Differential epitaxy creates in one process step single crystalline regions in the transistor area and isolat.
/ Monolithic integration using differential Si-MBE
E. Kasper eta!.
rZ,Z/Z,ZZZZZ.~
a)
-
461
J’77—oxid
substrate
____________________________________________
-~
~
~n-epi
coUecto:
~
itter
~
______________________________ Fig. 6. Concept of monolithic integration using differential Si-MBE. (a) Substrate with patterned oxide. (b) Differential epitaxy on patterned substrate. (c) Postepitaxial processing for collector contact and base/emitter definition.
ing oxide/poly-Si regions outside (fig. 6b). (iii) Definition of transistor contacts and base/emitter by conventional methods, e.g. ion implantation/diffusion (fig. 6c). The main advantage of this process sequence is given by omitting the separate isolation process. Postepitaxial heat treatment is reduced from which profile definition and reproducibility may benefit.
Fig. 7. Micrograph of an integrated bipolar transistor in a frequency divider circuit fabricated using differential Si-MBE.
6 0Hz
1
UCB •
2V
d~~o,75 ,~m
~
\ \~ 2 ~
~ “‘
~
20
25
1,!5~umCW 3499) 1 2Opm(W3477C
Ic mA
4. High frequency operation of an integrated hi polar transistor As test vehicle we have chosen a medium scale integrated circuit (frequency divider). Apart from differential Si-MBE all processes run on a production line with 2 ~tm emitter width [61.Fig. 7 shows a micrograph of an integrated bipolar transistor inside of the frequency divider circuit. Additionally poly silicon resistors were created by high dose implantation and etching of polycrystalline regions. But this will not be treated in this paper. Fig. 8 shows the transit frequency as function of the current for integrated bipolar transistors with various thickness of the differential Si-MBE layers. Transit frequencies up to 5—6 GHz were observed
Fig. 8. Transit frequencies fT of integrated transistors versus collector current J~ for various layer thickness dE of the differential Si-MBE-films.
with thicknesses dE ranging from 0.75 to 1.2 ~tm. The submicron layer (dE = 0.75 ~tm) exhibits improved frequency behaviour for a wide dynamic current range.
5. Conclusion A concept for monolithic integration based on differential Si-MBE films was developed. Integrated bipolar transistors were realized using apart from Si-MBE production line equipment.
462
E. Kasper eta!.
/
Monolithic integration using differential Si-MBE
High frequency results (6 GHz) demonstrate the capability of this technique.
References [1] A.Y. Cho and W.C. Ballamy, J. AppI. Phys. 46 (1975) 783. [2] Y. Ota, Thin Solid Films 106 (1983) 3.
[3] E. Kasper and K. Wörner, in: Proc. 2nd Intern. Symp. on VLSI Science and Technology, Electrochem. Soc. Proc. 84-7, Eds. K.E. Bean and GA. Rozgonyi (Electrochem. Soc., Pennington, PA, 1984) p. 429. [4] J.C. Bean and GA. Rozgonyi, Appi. Phys. Letters 41 (1982) 752. [5] H.J. Herzog and E. Kasper, J. Electrochem. Soc. 132 (1985) 2227. [6] E. Kasper and K. Wörner, J. Electrochem. Soc. 132 (1985) 2481.