New Microprocessor System Easies Custom Controls Building-Up

New Microprocessor System Easies Custom Controls Building-Up

CDpyriath e IFAC Motion Control for Inldligenl Automation reruP. Italy. Oaober 27-29. 1992 NEW MICROPROCESSOR SYSTEM EASIES CUSTOM CONTROLS BUILDING-...

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CDpyriath e IFAC Motion Control for Inldligenl Automation reruP. Italy. Oaober 27-29. 1992

NEW MICROPROCESSOR SYSTEM EASIES CUSTOM CONTROLS BUILDING-UP P.L.G. MALAPELLE ISE S_P..A v. Soas&ene 18. Brendola, Italy Abstract_ The paper describes a nev microprocessor-based system especially suited for lov cost or distributed industrial controls. It is based on a variety of single board computers that C2n be used in stand alone mode or in ~bus mod e" , together vith &any interface cards. The most important point of innovation is that the bus is not a traditional microprocessor or computer one, but ab original analog/digital bus. The syste~ i suited for improving the performance of drives: dedicated routines with special hardvare resources solve the most diffuse problematics of motion control, vhile high level languages are available for custom programs_ Performance are misured on the paper taking in consideration a control for an high speed flying shear for steel industry. Ieyvords_ Steel industry; microcomputer based control; multiprocessing systems; man-machine systems; drives; posistion control; speed control.

certain complexity and cost. Therefore, many producers of electronic equipements are using dedicated solutions, based on custom microprocessor cards.

1. INTRODUCTION The principal aim of Motion Control is the design of control systems able to make true automatical the moviments of a machine. This performance must be reached opti&izing the productivity of the machinery, i. e. achieving higher working speed, minimizing the energy required, reducing the wear of the mechanical elements, ecc. The usual application of a PLC is not sufficient for achieving these performances, because such systems are employed mainly for realizing the automatic sequences of . operations. So, in terms of performance, there is not a great difference between a machinery equipped wi t:, a logic controller and a machinery piloted by an expert operator. This problem regards especially the optimization of the movements, that needs the use of complex algorithms and the real time measurement of the behaviour trough s~nsors.

In this vay, they can obtain a good reduction of the cost/performances rate, but there are almost tvo problems for the tecnical and trading growth of this type of products . First, the development costs are too much if the field of application is not generalized; in fact the equation : Cost

= {material+labourl

+

(develo~ment/deall

is rarely optimized, because a general purpose solution decreases the second term but incr eases the first one, a dedicated solution vic~versa. So only very lov cost syste~s are valid, but they cannot be tecnologically advanced beca us e the reduced investerro ent allowed .

In most cases, the PLCs cannot solve in an optimal way the problematics related to motion control, because they require high computing pover and specialized sensor interfacing for real time operation. This is achievable trough big PLCs but the cost increases too much and feasiblity decreases if there are Ilultiple moviments and high dina~ lc s.

Th e second problem is due to the typical closed architecture of a dedicated card. A sing1< ~ oard computer cannot have all the fu ~cLi ons desiderable by a generic user, bEc au se th€r~ are limits to the dimensions of the el ectronic cards. However a traditional bus so : ·i on may be too much expensive not only for the cost of the connection parts, but also for the cost of development in case of specialize~ functions needed. Thus also in this way it is difficult the growth of these products in terms of updating, modularity and functional choice .

So there are many industrial applications in vhich a microprocesor-based control is locally useful to solve the problems related to the motion control of a machine. Unfortunatly, the world of the microprocessor systems has not industry (or trade) standards like the PLCs one. There are some standards for the busses (like VKE), but they always regards systems of a

In order to overcome these problematics, we have products, vhose developed a nev family of philosophy is the object of this paper.

355

MALAPE11.E P. true interface board. In fact, the electrical spec; : ications of the signals allow the direct conn E -tion with optoinsulators; thus only a simple custoaized transition aodule is needed in order to obtain a coaplete very low cost system.

2. THE BUS ARCHITECTURE The philosophy of the system is based on the concept that aost of the hardware solutions for aotion control have three characteristics: - custoaization - low cost - belonging to a distributed systea

Finally, it is possible to siaulate some coaputer and PLC bus.es. or course, this feature does not achieve the maxiaal troughput of the system in teras of speed and perforaance, but it is useful in case of recovering of standard I/O hardware. Moreover, the siaulation of the PC-bus makes a lot of computer peripheral functions available. So it is possible to drive devices like aass storage or graphic video without the need of developing specialized circuits.

Thus the fa-ily is based on a variety of single board computers taht can be used in stand alone aode or in "bus aode" , together with custoa interface cards. The systea respects the three requireaents above because the bus is not a traditional aicroprocessor or computer one, but an original analog/digital bus. It allows each user to build every kind of interface boards in a very easy way. In fact it needs no I/O cards for connecting to the field (like the traditional coaputer or PLC busses), but only signal conditioners. If a special pre-elaboration of the signal is required, the user can introduce easily dedicated analog or digital circuits directly drived by the bus, without the need of interface logics.

2.2. The analog channel As shown in fig. I, the bus has also 8 + 8 lines of analog inputs an outputs (specified for 0 to ± 10 Volt signals) plus a voltage reference line (Vref). The choice to impleaent the D to A ond the A to D conversion logic on the CPU instead of using the traditional analog interface boards allcws some advantages in case of motion control applications in spite of the obvious loss of aodularity.

In fig. 1. we can see the block diagram of the bus. Of course the signals adopted are chosen on the basis of the requirements due to the application (the motion control requires analog and frequency signals for transducers, for example) and the best fitting with the structural capability (a double eurocard allows two DIN 41612 c type connectors, therefore 128 or 192 connections are available).

First. the troughput is higer, because the aicroprocessor on the CPU can drive directly the conversion devices: this is strictly important as regard the conversion speed if the application requires a DSP on the CPU board. Moreover, the user can interface various type of analog trasducers without the need of realyzing - an

The signals can be divided into two families: general purpose digital lines and special signals. The first group could be sufficient for simple applications and it is essential for communications with the field . The second group consist of signals that carry not only a status, but a complex information; so they are analog signals, frequencies, time related digital signals, etc.

CPU

INTERFACE

---

32 g. p. digital inputs

2.1. The digital channel The general purpose digiatl bus consists of a double 32 bit digital channel. The data flow in this ch annel is unidirectional, so it is fully diffe re nt from a traditional "data bus". In fact, the aim of this bus in not the data sharing between mUltiple cards, like in conventional microprocessor systems, but the one-to-one connection to the field. In this way, more immediate and the communications are flexibility is such that it is possible to consider a computer bus like a particular reconfiguration of this channel (in fact, the "field" may be, for example, the PC BUS).

-I

1==

I -I

32 g. p. digital outputs

Vref

8

a n a log

1=

8

a n a log

1==

~ =1

inputs

outputs

-----

3 x 3 encoder

Let we see now tbe principal advantages of this architecture, considering the typical requirements of the field of application.

inputs

---

1

---

10 timer /counte r inputs

-I

First , th e speed and the law of the transitions are software determined, so it is possibl~ to accomodate the needs of a distribuited i/o system (like a PLC) or the needs of a computer system. In every case the user can choose the type of protocol and this is a double advantage. In fact, it is possible to optimize the resources thus reducing the cost of the system. Moreover there is not the need of particular interface logic on the I/O cards; so the user can customize his i/o system without a specific know-how regards the microprocessor bus.

._ - ---

1

5 timer/counter outputs

Clock

---

=1 8

HIgh speed

-==1 8

HIgh speed

- --

inputs

1--

-- -

outputs

LJ

Another characteristic of the double channel is the possibility to simulate directly two 32 bit input-output ports; so in smaller application the user can connect a CPU to the field without a

Fig.

356

1.

Bus block

diagraa.

---

INTERFACE

NEW MICROPROCESSOR SYSTEM EASIES CUSTOM CONlROLS BUll..OING-UP

board (which is often a analog interface difficult design)_ Yith a traditional ~ ..alogical user can acco~oda-e every circui try, the specification thus reducing the cost of the system.

3. CPU ARCHITECTURE

Last, if more cannels are required, it is possible the multiplexing of the signals with the help of the high speed outputs. In this case, speed is reduced. but we observe that most of the commercial analog boards have aultiplexed channels •

As explained in the previous chapters, the CPU cards are single board computers equipped with the interface circuits required for the generation of the bus. Although the design of these cards does not present particular difficulties, it is better to give the outlines of a tipical architecture, well suited for motion control applications. So we are describing two types of CPU already realized and used in industrial systems.

2.3. The frequency channels

3. 1. Single chip based CPU

Kany trasducers provide digital outputs in order to achieve higher precision. Although many of these signals can be read trough high speed digital inputs, frequency signals must be processed by special hardware in order to reduce the work of the microprocessor. So, a number of frequency channels are provided on the bus, connecting the field to specialized hardware on the CPU.

The first implementation is shown in fig. 2. It is a CPU based on the well known single chip ,icroprocessor INTEL 80C196KC. This design is fully representative for two reasons. First, the microcomputer employed is quite similar to a lot of other devices produced by many silicon houses; so the solutions adopted are applicable also in case of choice of other chips. Second this type of chip allows a good fitting with the bus requirements; thus it is well suited for low cost systems.

A first group of signals are typical of incremental encoders (the trasducer always used in motion controls). Three signals are n~eded in order to detect the speed, the direction and the position: frequency. up-down, reset. Since there are some integrated devices incorporating all the functions required for the direct interfacing of an incremental encoder, the channels can be used to carry directly the three usual tracks.

It is important to notice that there are some functions that must be implemented on the CPU card. although they are not required by the bus. This is the case of the communication ports. that are realized on the card by a dedicated chip in order to accomodate the typical standard specification withouth overloading the microcontroller. Since most of the communications are between the systea and Personal Computers (for supervisory functions or for development requirement). in this case the serial ports are fully compatible with PC standards. A serie of piggy-back modules adapts the ports to other industrial standards.

A second group of signals is organized as five general purpose I/O frequency channels. Each channel has three dedicated lines: one line is the input of a hardware counter, 50 it can be a frequency input. Another line is used as input for a conditioning signal: it can be the reset of the timer, or the count enable, or the strobe for the count capture, etc. depending on the nature of the hardware inplemented on the CPU. The last line is the output of the counting system: thus it can be a timer overflow signal, or a comparator output, or a frequency output. etc.

Another circuitry all contained on the board is the video controller. It is able to drive a VGA-like monitor and is very useful for implementing a low cost user-friendly operator interface. of course. the video ram and the CRT controller are connected to the microprocessor bus in order to achieve the highest speed of data block exchange and the best synchronization required by this type of devices.

A special frequency line carries out the base clock used by the CPU counting system. So the user can handle the frequency signals also with dedicated synchrounus circuitry. Nevertheless in most cases only signal conditioners. like opto-insulators and analog filters, are required for a correct transducers connection.

As shown in fig. 2. the general purpose digital channel is generated by a parallel port that extend to 32 bits the data bus of the microprocessor and accomodate the electrical specifications of the bus.

2.4. The high speed input/output The analog inputs can be realized through the ADC subsystem contained in the 80C196, only simple impedence adaptors are required. For the analog outputs, there are some difficulties: the chip has three PVM generators that, with a fEW compo l . ~ nts, ca n generate three analog outputs. In this case the resolution is not sufficient for the typical applications of motion control (i. e. the generation of the speed reference for a drive). Thus a double 12 bit DAC is added in order to improve performances (in term of resolution and speed) and increase the number of channels available.

The last group of lines used in the bus carries all those signals that must be connected to the CPU with particular require~~nts as regard the timing. Since the architecture of the system is designed in order to avoid the need of critical or high frequency signals, there are no lines on the bus with special transition timing. Howewer, in generic applications, may be useful utilizing special inputs of the microprocessor, like for example the interrupt lines. This solution easies the software in case of strictly time related algorithms.

Many frequency channels can be implemented through the special functions contained in the microcontroller. Ye do not talk at length aboct the internal structure of the chip, but briefly we say that the dedicated timer I/Os perform a complete encoder channel. Vhile the so called "high speed inputs" and "high speed outputs" can partially imple~ent four timer/counter channels.

Last, the special outputs are suited for helping the user to manage the other general purpose lines. For example. they can be used for the multiplexing of the analog channels or for the time-related redefinition of the general purpose digital lines. Thanks to these signals. the bus may be more versatile, so that also the simulation of standard computer or PLC busses is possible.

Clearly this card is applications and does

357

low cost suited for not implE:ments all the

MALAPElLE P. As shown in fig. 3. , all the bus signals are generated by interfac ~ '. evices . In fact a direct transduction of the c : croprocessor data bus is quite impossible, since the commutation speed is very high (40 MHz) . Also in this case, the CPU board contains various functions like the communication ports, but the bigh throughput of the general purpose digital channel, allows the decentralizement of certain functions. For example there is not a video controller , because it is possible to connect a standard PC VGA card.

specification of the bus. But a system can be realized correctly also if any signals are missing. On the basis of this project, it is easy increase the functions by adding dedicated devices, like other timer-counters or DACs. It is difficult to evaluate the performance of tbis type of board, because tbe computing power of tbe microprocessor is integrated by the hardware resources. For example, a typical benchmark is based on tbe PID performance. Tbe algorithm is based on tbe well known formula: C(k)=lp elk) + li I(k) + ld/T le(k)-e(k-1»

The most important advantage of this type of CPU is that the high computational speed permi ts the software implementation of all the functions required for motion control, without the need of specialized hardware. For example, an incremental encoder could be connected to a parallel port, since tbe processor can perform thousands of instructions during a single pulse. High accuracy can be achieved using tbe real time precision interrupt lines (typical of this family of chips) .

(1)

Where: C(k) is tbe torque requested to tbe drive - elk) is tbe speed error I(k) is tbe trapezoidal integrating function : I(k) = I(k-1) + T/2 le(k)+e(k- 1» The time required is about 21 ps .

hardware devices are allocated on the board in order to fit with the bus specif i cations and to semplify the software architecture. So we can see in fig. 3 many devices like a multiple 12 bit DAC, a 13 bit ADC SUbsystem, three 32 bit bidirectional counters , etc. In this way it is very easy the software migration form a traditional microcomputer system to tbis innovative RISC structure. But the most important feature is the same facility in the interfacing design. Of course all the boards designed for the previous CPU can be used also with this one . Nevert~eless

3.2 . RISC based CPU Another approach used for implementing a high performance CPU is based on a RISC chip, the HIPS R3051 , that allows a good fitting with the bus specification and permit to solve many typical problems of motion control witbout requiring complex ancillary hardware or difficult specialized software . The skill of tbe design of tbis type of CPU consists in reducing the device count required for tbe engine building up, so that in a single board the space is enought to implement theinterface circui try . Thus the HIPS chip has been chosen , becouse it has a double internal cache memory that allows a simple connection with standard memory devices.

VIDEO

POVER

Performance will be examined in the next chapter, on the basis of a specific application. For a comparison with the 80C196 based CPU, this card can perform a PID algorithm in 1 ps .

SERIAL 1

SERIAL 2

CENTRONICS D B 25

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Fig. 2. Single chip based CPU

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connector

NEW MKltOI'ROCESSOR SYSrnM EASIES CUSTOM N1ROLS BUILDING-UP

4. U lPPLIClTIOII SlIIPLE In order to saaple the general perfor.ances of the syste.. the control for an high speed flying shear for steel industry is taken in consideration. This application requires sophisticated software because the aotion control of the shear is based on a thyristor bigh power (500-1000 IY) d. c. drive treated like a serYo.otor. In fact the working cycle .ainly consist in a on fly pointing of 240· and a positioning of 180°. Koreoyer. syste. considerations. related to the connection to the rest of the plant. requires a custa. hardware iD order to autoaatizate the operation sequence and adequate the process paraaeters to the various type of production in a co.plete autoaatic aanner. Thus two interface cards are added to the RISC CPU: one card has only the signals conditioners for 64 digital I/O. and two incre.ental encoders; tbe second card bas also an elaborative logic (contained in a PLO) for tbe aanage.ent of .any special signals. The software is divided iD tbree type of task: -iterative calculations (PlO = 1 ps. LlG or LEAD co.p. = 1.3 ps. 1 pole notcb f. = 2.4 ps); -integrative calculations (A to 0 ~ 11 ps. tacboaet-e r z 14 ps); -spare functions (co..unications. diagnostics). Only tbe first type of task are executed continously. wbile tbe other ones are sbared; so. tbe prograa scanning cycle is about 20 ps. 5. CONCLUSIONS

A new microprocessor based architecture solves in an inexpensive mode many problems of machine

POWER

-easy to custo.ize: tbanks to tbe software-driven bus. user can design yarions interfaces without specialized knowlwdge of microprocessor bus -easy to update: thanks to the S.B.C. based architecture. it is possible the partial redesign of a syste. with s.all inyestaent -large choice of functions: besides the functions available on the CPUs. card belonging to other systeas (i. e. PC-bus) can be used -s.art prograaaability. depending on the high perforwance .icroprocessors chosen (C language and a resident eaulator are always available) -high reliability. s i nce no bigh signals are carried out the CPU boards

REFERENCES De Carli. A. (1992). La scelta per un'autosazione iPtelliaente. Tecnologie .eecanicbe. Staaaer. Schafer. T. Cbevalier. K. (1989). Distributed aotor control usina 80c196lB . Intel corporation. De CarH. A. (1987). llaoritsi per hItri diaitali. Azion. a vel contr.. vol It. Kilano. pp. 543-573. hne. G. (1988) !lIPS RISC Architecture. Prentice-Ball Inc. Katz. P. (1981). Digital control using microprocessors. Prentice/Ball. New York. Kultlllel . r. (1971) Elektrische Antriebstechnik . Springer. Berlin.

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359

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-low ~ost. because tbe user can utilize directly only the functions required by using si.ple transition aodules.

SERIAL 2

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autoaation. The syste. is well suited for an easy building-up of custoa solutions for aotion control . The aost i.portant features of tbis syste. are:

connector