- Email: [email protected]
NiSi integration in a non-selective base SiGeC HBT process
ARTICLE IN PRESS
Materials Science in Semiconductor Processing 8 (2005) 245–248
NiSi integration in a non-selective base SiGeC HBT process Erik Haralson, Erdal Suvar, B. Gunnar Malm, Henry Radamson, Yong-Bin Wang, Mikael O¨stling Department of Microelectronics and Information Technology, Royal Institute of Technology-KTH, P.O. Box Electrum 229, SE-164 40 Kista-Stockholm, Sweden Available online 30 November 2004
Abstract A self-aligned nickel silicide (salicide) process is integrated into a non-selective base SiGeC HBT process. The device features a unique, fully silicided base region that grows laterally under the emitter pedestal. This Ni(SiGe) formed in this base region was found to have a resistivity of 23–24 mO cm. A difference in the silicide thickness between the borondoped SiGeC extrinsic base region and the in situ phosphorous-doped emitter region is observed and further analyzed and confirmed with a blanket wafer silicide study. The silicided device exhibited a current gain of 64 and HF device performance of 39 and 32 GHz for ft and fMAX, respectively. r 2004 Elsevier Ltd. All rights reserved. PACS: 85.30.De; 85.30.Pq Keywords: SiGeC HBT; Nickel silicide
1. Introduction SiGe:C HBTs have seen rapid progress in the past several years in the area of vertical and lateral device scaling and optimization. The two main HBT architectures are the selectively grown base [1,2] design and the non-selectively grown base [3–5] design which sometimes features a raised extrinsic base region. Record highfrequency performance [3] and gate delay [5] have been demonstrated on the non-selectively grown base with raised extrinsic base design. At the same time CMOS continues to scale rapidly and much effort is being put into finding a silicide solution that minimizes the silicon consumption in the S/D regions, has thermal stability, and has low junction leakage [6]. It appears that Ni Corresponding author. Tel.: +46 8 790 4324; +46 8 752 7850. E-mail address: [email protected] (E. Haralson).
fax:
silicide is becoming the silicide of choice for this application. Therefore, it is important to investigate how this Ni silicide will be integrated into SiGe HBTs for BiCMOS applications. This work relies on previous experience in Ni silicide formation on poly-SiGeC layers [7] and demonstrates the integration of a Ni salicide process into a SiGeC HBT with a non-selectively grown base. Part of the integration included forming a fully silicided extrinsic base that grows laterally towards the active device area. The silicide formation was studied by electrical measurements and TEM cross sections.
2. Device structure and fabrication Fig. 1 is a TEM cross section of the completed device. Key features include a selectively grown collector polished by CMP, a Si0.82Ge0.18C0.002 base grown by
1369-8001/$ - see front matter r 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2004.09.024
ARTICLE IN PRESS 246
E. Haralson et al. / Materials Science in Semiconductor Processing 8 (2005) 245–248
Fig. 1. TEM of a HBT with a fully silicided extrinsic base region. Fig. 2. TEM of active device region showing fully silicided base with lateral growth and the silicided IDP emitter.
non-selective epitaxy, an in situ phosphorous-doped polysilicon(IDP) emitter, and a nickel salicide process. The collector and SiGeC base were grown at reduced pressure and temperature in an ASM Epsilon 2000 RPCVD system. A CMP process was used to planarize the collector to the isolation oxide before the base deposition. After the IDP emitter was deposited and the emitter pedestal formed, an extrinsic base implant was performed and an RTA of 925 1C for 10 s was done to drive in the emitter. At this point the nickel film, nominally 300 A˚ thick, was deposited by electron-beam evaporation. The cleaning process prior to deposition was a 10% HF solution for 10 s to remove any native oxide. The silicidation process conditions were 500 1C for 30 s in nitrogen. This temperature has been previously shown to be in the temperature range that the low-resistivity NiSi phase is formed on SiGeC polysilicon while avoiding agglomeration [7]. Excess nickel was removed by a H2SO4:H2O2=4:1 chemical solution. The device was completed by low-temperature oxide deposition, contact hole formation, and Al/TiW metallization.
3. Results and discussion 3.1. Silicidation integration Fig. 2 shows a TEM cross-section of the active region. The NiSi formation on the IDP emitter surface and in the extrinsic base region can be observed. Moreover, the nickel has completely consumed the SiGeC base poly in the vertical direction and has begun to grow laterally under the emitter pedestal. It can also be seen that the NiSi thickness formed on the IDP is about 330 A˚ while in the extrinsic base region it is about 650 A˚. A transfer line method (TLM) structure was used to determine the sheet resistance and when combined with the silicide thickness determined by TEM the resistivity of the silicide was found to be 23–24 mO cm, which compares well with reported values for Ni(Si,Ge) [8]. This is compared to the resistivity of the non-silicided poly-SiGeC that was measured on another wafer to have a resistivity of 3200 mO cm.
One of the challenges to overcome when integrating Ni silicide into a SiGeC HBT that has been identified in this work is the difference in silicide formation on the n+-doped IDP emitter/collector and the silicide formation on the p+-doped poly-SiGeC extrinsic base. As mentioned before, the silicide thickness on the polySiGeC was almost twice as thick as on the IDP and it even has almost 2000 A˚ of lateral growth under the emitter pedestal. One explanation for this behavior is that the melting points for the germanide phases are lower when compared to their similar silicide phases. This is related to the fact that germanium has a higher mobility than silicon. Therefore, the silicide growth rate on the poly-SiGeC will be higher than on the crystallized IDP. In addition, another possibility may be the effect that the difference in dopants is having on the silicidation process since these polysilicon films are highly doped n+ or p+. It has been previously shown that the presence of dopants will increase the temperature at which the low-resistivity phase is formed on silicon with arsenic having a larger impact compared to boron [9]. To further investigate this difference in silicide formation, blanket wafers with roughly 2000 A˚ of IDP and poly-SiGeC, respectively, were deposited with a nickel film, nominally 300 A˚ thick, and annealed at 500 1C for 30 s, the same process conditions as the device wafers. TEM analysis in Figs. 3 and 4 shows that the Ni(Si,Ge) formed on the poly-SiGeC layer is 20% thicker than the NiSi formed on the IDP layer. Also notice the difference in the poly grains between the samples that will affect the silicide formation, as well as the roughness of the Ni(Si,Ge) formed on the polySiGeC compared to the NiSi on the IDP sample. This difference in polysilicon grain size is a result of the large difference in deposition conditions. The SiGeC base region is deposited at 600 1C and a pressure of 40 Torr while the IDP is deposited amorphous at 480 1C and a pressure of 280 mTorr and then crystallized at 650 1C and atmospheric pressure. While the silicide thickness difference is not as large as on the actual devices it follows the trend of thicker silicide on the poly-SiGeC
ARTICLE IN PRESS E. Haralson et al. / Materials Science in Semiconductor Processing 8 (2005) 245–248
Ni diffusion
247
IDP Emitter Pedestal
SiGeC Poly Base
Field Oxide +
Fig. 3. TEM of NiSi growth on n -doped IDP.
Fig. 5. Top-down schematic of nickel silicide formation on exposed poly regions.
more than with a traditional silicide integration scheme. In our integration scheme we have also shown that by keeping the silicide formation temperature low enough, we have avoided the formation of voids between the silicide and the polysilicon that have been previously observed for lateral silicide formation [7,11]. The presence of these voids would prove fatal to the functioning of the device.
3.2. Device results Fig. 4. TEM of Ni(Si,Ge) growth on p+-doped poly-SiGeC.
film. One reason that the thickness difference is not as large as it may be because the samples were blanket wafers. If one considers the top-down HBT device layout shown in Fig. 5, the extrinsic base area is not that great and there is a lot of excess nickel surrounding it that can diffuse from the field oxide region and continue to react with the extrinsic base. In the case of the IDP emitter pedestal there is a limited amount of nickel available because the pedestal is isolated from the rest of the surrounding extrinsic base region and surrounding field oxide. The resistivity of the two blanket samples was calculated to be 16–17 and 24–25 mO cm for the IDP and poly-SiGeC, respectively. One advantage of using this nickel silicidation method where the whole extrinsic base is reacted is that, unlike Co, the low-resistivity Ni monosilicide phase easily forms a ternary solution with the corresponding Ge monosilicide. This allows us to silicide the whole extrinsic base region and stop on the underlying oxide instead of just forming silicide with the cap region. By siliciding the whole base region we also avoid the morphological stability problems of Ni(Si,Ge) on polysilicon [8,10] and lower the series resistance slightly
Fig. 6 shows the Gummel plot for a typical device. The DC current gain is calculated to be 64. The nonideal base behavior in the low-current region was also observed for the non-silicided device [12], therefore it is not a result of the silicide integration. Fig. 7 shows the RF characteristics for a device with an emitter size of AE ¼ 0:4 10 mm2 : It shows peak fT and fMAX values of 39 and 32 GHz, respectively. The roll-off at high currents indicates a presence of a potential barrier at the base-collector junction due to an insufficient SiGe spacer thickness. This is confirmed by the measured early voltage being lower than the reference device and the IC vs. VCE plot intercepting the x-axis at a VCE value larger than zero. Another problem that leads to the observed roll-off at high currents was the contact hole etch. The contact resistance between the silicide and the TiW metal was calculated to be 5.4 106 O cm2. This increase in the contact resistance will show up as a series resistance in the device and have a negative effect at higher currents. The problem was traced back to carbon compounds being left over after the contact hole etch and has since been resolved with the contact resistance shown to be 1.8 107 O cm2. The total base resistance was extracted by using the input impedance semi-circle method and was found to be 50 O compared to 150 O for a similar non-silicided reference device.
ARTICLE IN PRESS E. Haralson et al. / Materials Science in Semiconductor Processing 8 (2005) 245–248
248
VCB 0.5 V VCB 1.0 V
Base, collector current (A)
10-2
for fruitful discussions and to Mikael Jargelius, Infineon Technologies for TEM analysis.
Ic
10-4 Ib
References
10-6 10-8 10-10 10-12
0.4
0.6 0.8 1.0 Base-emitter voltage (V)
1.2
Fig. 6. Gummel plot at two collector bias points.
40
Frequency (GHz)
35 30
fT fMAX AE=0.4x10µm2 VCB=1V
25 20 15 10 5 10-4
10-3 10-2 Collector current (A)
Fig. 7. fT and fmax versus AE=0.4 10 mm2 device.
collector
current
for
a
4. Conclusions A nickel salicide process has been integrated into a SiGeC HBT with a non-selectively grown base. A difference in the monogermanosilicide thickness on the IDP emitter and poly-SiGeC extrinsic base regions is observed. This difference in silicide formation is further examined and confirmed by TEM analysis of silicidation on blanket wafers. HF device performance of 39 and 32 GHz for ft and fMAX, respectively, is shown.
Acknowledgements This work was sponsored by the Swedish Agency for Innovation Systems (VINNOVA) in the MEDEA+ T204 ASGBT program. Special thanks to Shi-Li Zhang
[1] Hashimoto T, Nonaka Y, Tominari T, Fujiwara H, Tokunaga K, Arai M, Wada S, Udo T, Seto M, Miura M, Shimamoto H, Washio K, Tomioka H. Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS. IEDM Technical Digest, 2003. p. 129–32. [2] Meister TF, Scha¨fer H, Aufinger K, Stengl R, Boguth S, Schreiter R, Rest M, Knapp H, Wurzer M, Mitchell A, Bo¨ttner T, Bo¨ck J. SiGe bipolar technology with 3.9ps gate delay. Proceedings of BCTM ’03; 2003. p.103–6. [3] Rieh J-S, Jagannathan B, Chen H, Schonenberg KT, Angell D, Chinthakindi A, Florkey J, Golan F, Greenberg D, Jeng S-J, Khater M, Pagette F, Schnabel C, Smith P, Stricker A, Vaed K, Volant R, Ahlgren D, Freeman G, Stein K, Subbana S. SiGe HBTs with cut-off frequency of 350 GHz. IEDM Technical Digest, 2002. p.771–4. [4] Xu MW, Decoutere S, Sibaja-Hernandez A, Van Wichelen K, Witters L, Loo R, Kunnen E, Knorr C, Sadovnikov A, Bulucea C. Ultra low power SiGe:C HBT for 0.18 mm RFBiCMOS. IEDM Technical Digest, 2003. p. 125–8. [5] Ru¨cker H, Heinemann B, Barth R, Bolze D, Drews J, Haak U, Ho¨ppner W, Knoll D, Ko¨pke H, Marschmeyer S, Richter HH, Schley P, Schmidt D, Scholz R, Tillack B, Winkler W, Wulf H-E, Yamamoto Y. SiGe:C BiCMOS technology with 3.6 ps gate delay. IEDM Technical Digest, 2003. p.121–4. [6] Kittl JA, Lauwers A, Chamirian O, Van Dal M, Akheyar A, De Potter M, Lindsay R, Maex K. Ni- and Co-based silicides for advanced CMOS applications. Microelectron Eng 2003;70:158–65. [7] Haralson E, Jarmar T, Seger J, Radamson HH, Zhang SL, O¨stling M. Ni silicide formation on polycrystalline SiGe and SiGeC layers. Mater Res Soc Symp Proc 2003;745:111–6. [8] Seger J, Mangelinck D, Radamson HH, Zhang S-L. Increased nucleation temperature of NiSi2 in the reaction of Ni thin films with Si1xGex. Appl Phys Lett 2002;81(11): 1978–80. [9] Lauwers A, Steegen A, de Patter M, Lindsay R, Satta A, Bender H, Maex K. Materials aspects, electrical performance, and scalability of Ni silicide towards sub-0.13 um technologies. J Vac Sci Technol B 2001;19(6):2026–37. [10] Jarmar T, Seger J, Ericson F, Mangelinck D, Smith U, Zhang S- L. Morphological and phase stability of nickelgermanosilicide on Si1xGex under thermal stress. J Appl Phys 2002;92:7193–9. [11] Chen SH, Zheng LR, Carter CB, Mayer JW. Transmission electron microscopy studies on the lateral growth of nickel silicides. J Appl Phys 1985;57:258–63. [12] Suvar E, Haralson E, Radamson HH, Wang Y-B, Grahn JV, Malm BG, O¨stling M. Characterization of leakage current related to a selectively grown collector in SiGeC heterojunction bipolar transistor structure. Appl Surf Sci 2004;224:336–40.
Materials Science in Semiconductor Processing 8 (2005) 245–248
NiSi integration in a non-selective base SiGeC HBT process Erik Haralson, Erdal Suvar, B. Gunnar Malm, Henry Radamson, Yong-Bin Wang, Mikael O¨stling Department of Microelectronics and Information Technology, Royal Institute of Technology-KTH, P.O. Box Electrum 229, SE-164 40 Kista-Stockholm, Sweden Available online 30 November 2004
Abstract A self-aligned nickel silicide (salicide) process is integrated into a non-selective base SiGeC HBT process. The device features a unique, fully silicided base region that grows laterally under the emitter pedestal. This Ni(SiGe) formed in this base region was found to have a resistivity of 23–24 mO cm. A difference in the silicide thickness between the borondoped SiGeC extrinsic base region and the in situ phosphorous-doped emitter region is observed and further analyzed and confirmed with a blanket wafer silicide study. The silicided device exhibited a current gain of 64 and HF device performance of 39 and 32 GHz for ft and fMAX, respectively. r 2004 Elsevier Ltd. All rights reserved. PACS: 85.30.De; 85.30.Pq Keywords: SiGeC HBT; Nickel silicide
1. Introduction SiGe:C HBTs have seen rapid progress in the past several years in the area of vertical and lateral device scaling and optimization. The two main HBT architectures are the selectively grown base [1,2] design and the non-selectively grown base [3–5] design which sometimes features a raised extrinsic base region. Record highfrequency performance [3] and gate delay [5] have been demonstrated on the non-selectively grown base with raised extrinsic base design. At the same time CMOS continues to scale rapidly and much effort is being put into finding a silicide solution that minimizes the silicon consumption in the S/D regions, has thermal stability, and has low junction leakage [6]. It appears that Ni Corresponding author. Tel.: +46 8 790 4324; +46 8 752 7850. E-mail address: [email protected] (E. Haralson).
fax:
silicide is becoming the silicide of choice for this application. Therefore, it is important to investigate how this Ni silicide will be integrated into SiGe HBTs for BiCMOS applications. This work relies on previous experience in Ni silicide formation on poly-SiGeC layers [7] and demonstrates the integration of a Ni salicide process into a SiGeC HBT with a non-selectively grown base. Part of the integration included forming a fully silicided extrinsic base that grows laterally towards the active device area. The silicide formation was studied by electrical measurements and TEM cross sections.
2. Device structure and fabrication Fig. 1 is a TEM cross section of the completed device. Key features include a selectively grown collector polished by CMP, a Si0.82Ge0.18C0.002 base grown by
1369-8001/$ - see front matter r 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2004.09.024
ARTICLE IN PRESS 246
E. Haralson et al. / Materials Science in Semiconductor Processing 8 (2005) 245–248
Fig. 1. TEM of a HBT with a fully silicided extrinsic base region. Fig. 2. TEM of active device region showing fully silicided base with lateral growth and the silicided IDP emitter.
non-selective epitaxy, an in situ phosphorous-doped polysilicon(IDP) emitter, and a nickel salicide process. The collector and SiGeC base were grown at reduced pressure and temperature in an ASM Epsilon 2000 RPCVD system. A CMP process was used to planarize the collector to the isolation oxide before the base deposition. After the IDP emitter was deposited and the emitter pedestal formed, an extrinsic base implant was performed and an RTA of 925 1C for 10 s was done to drive in the emitter. At this point the nickel film, nominally 300 A˚ thick, was deposited by electron-beam evaporation. The cleaning process prior to deposition was a 10% HF solution for 10 s to remove any native oxide. The silicidation process conditions were 500 1C for 30 s in nitrogen. This temperature has been previously shown to be in the temperature range that the low-resistivity NiSi phase is formed on SiGeC polysilicon while avoiding agglomeration [7]. Excess nickel was removed by a H2SO4:H2O2=4:1 chemical solution. The device was completed by low-temperature oxide deposition, contact hole formation, and Al/TiW metallization.
3. Results and discussion 3.1. Silicidation integration Fig. 2 shows a TEM cross-section of the active region. The NiSi formation on the IDP emitter surface and in the extrinsic base region can be observed. Moreover, the nickel has completely consumed the SiGeC base poly in the vertical direction and has begun to grow laterally under the emitter pedestal. It can also be seen that the NiSi thickness formed on the IDP is about 330 A˚ while in the extrinsic base region it is about 650 A˚. A transfer line method (TLM) structure was used to determine the sheet resistance and when combined with the silicide thickness determined by TEM the resistivity of the silicide was found to be 23–24 mO cm, which compares well with reported values for Ni(Si,Ge) [8]. This is compared to the resistivity of the non-silicided poly-SiGeC that was measured on another wafer to have a resistivity of 3200 mO cm.
One of the challenges to overcome when integrating Ni silicide into a SiGeC HBT that has been identified in this work is the difference in silicide formation on the n+-doped IDP emitter/collector and the silicide formation on the p+-doped poly-SiGeC extrinsic base. As mentioned before, the silicide thickness on the polySiGeC was almost twice as thick as on the IDP and it even has almost 2000 A˚ of lateral growth under the emitter pedestal. One explanation for this behavior is that the melting points for the germanide phases are lower when compared to their similar silicide phases. This is related to the fact that germanium has a higher mobility than silicon. Therefore, the silicide growth rate on the poly-SiGeC will be higher than on the crystallized IDP. In addition, another possibility may be the effect that the difference in dopants is having on the silicidation process since these polysilicon films are highly doped n+ or p+. It has been previously shown that the presence of dopants will increase the temperature at which the low-resistivity phase is formed on silicon with arsenic having a larger impact compared to boron [9]. To further investigate this difference in silicide formation, blanket wafers with roughly 2000 A˚ of IDP and poly-SiGeC, respectively, were deposited with a nickel film, nominally 300 A˚ thick, and annealed at 500 1C for 30 s, the same process conditions as the device wafers. TEM analysis in Figs. 3 and 4 shows that the Ni(Si,Ge) formed on the poly-SiGeC layer is 20% thicker than the NiSi formed on the IDP layer. Also notice the difference in the poly grains between the samples that will affect the silicide formation, as well as the roughness of the Ni(Si,Ge) formed on the polySiGeC compared to the NiSi on the IDP sample. This difference in polysilicon grain size is a result of the large difference in deposition conditions. The SiGeC base region is deposited at 600 1C and a pressure of 40 Torr while the IDP is deposited amorphous at 480 1C and a pressure of 280 mTorr and then crystallized at 650 1C and atmospheric pressure. While the silicide thickness difference is not as large as on the actual devices it follows the trend of thicker silicide on the poly-SiGeC
ARTICLE IN PRESS E. Haralson et al. / Materials Science in Semiconductor Processing 8 (2005) 245–248
Ni diffusion
247
IDP Emitter Pedestal
SiGeC Poly Base
Field Oxide +
Fig. 3. TEM of NiSi growth on n -doped IDP.
Fig. 5. Top-down schematic of nickel silicide formation on exposed poly regions.
more than with a traditional silicide integration scheme. In our integration scheme we have also shown that by keeping the silicide formation temperature low enough, we have avoided the formation of voids between the silicide and the polysilicon that have been previously observed for lateral silicide formation [7,11]. The presence of these voids would prove fatal to the functioning of the device.
3.2. Device results Fig. 4. TEM of Ni(Si,Ge) growth on p+-doped poly-SiGeC.
film. One reason that the thickness difference is not as large as it may be because the samples were blanket wafers. If one considers the top-down HBT device layout shown in Fig. 5, the extrinsic base area is not that great and there is a lot of excess nickel surrounding it that can diffuse from the field oxide region and continue to react with the extrinsic base. In the case of the IDP emitter pedestal there is a limited amount of nickel available because the pedestal is isolated from the rest of the surrounding extrinsic base region and surrounding field oxide. The resistivity of the two blanket samples was calculated to be 16–17 and 24–25 mO cm for the IDP and poly-SiGeC, respectively. One advantage of using this nickel silicidation method where the whole extrinsic base is reacted is that, unlike Co, the low-resistivity Ni monosilicide phase easily forms a ternary solution with the corresponding Ge monosilicide. This allows us to silicide the whole extrinsic base region and stop on the underlying oxide instead of just forming silicide with the cap region. By siliciding the whole base region we also avoid the morphological stability problems of Ni(Si,Ge) on polysilicon [8,10] and lower the series resistance slightly
Fig. 6 shows the Gummel plot for a typical device. The DC current gain is calculated to be 64. The nonideal base behavior in the low-current region was also observed for the non-silicided device [12], therefore it is not a result of the silicide integration. Fig. 7 shows the RF characteristics for a device with an emitter size of AE ¼ 0:4 10 mm2 : It shows peak fT and fMAX values of 39 and 32 GHz, respectively. The roll-off at high currents indicates a presence of a potential barrier at the base-collector junction due to an insufficient SiGe spacer thickness. This is confirmed by the measured early voltage being lower than the reference device and the IC vs. VCE plot intercepting the x-axis at a VCE value larger than zero. Another problem that leads to the observed roll-off at high currents was the contact hole etch. The contact resistance between the silicide and the TiW metal was calculated to be 5.4 106 O cm2. This increase in the contact resistance will show up as a series resistance in the device and have a negative effect at higher currents. The problem was traced back to carbon compounds being left over after the contact hole etch and has since been resolved with the contact resistance shown to be 1.8 107 O cm2. The total base resistance was extracted by using the input impedance semi-circle method and was found to be 50 O compared to 150 O for a similar non-silicided reference device.
ARTICLE IN PRESS E. Haralson et al. / Materials Science in Semiconductor Processing 8 (2005) 245–248
248
VCB 0.5 V VCB 1.0 V
Base, collector current (A)
10-2
for fruitful discussions and to Mikael Jargelius, Infineon Technologies for TEM analysis.
Ic
10-4 Ib
References
10-6 10-8 10-10 10-12
0.4
0.6 0.8 1.0 Base-emitter voltage (V)
1.2
Fig. 6. Gummel plot at two collector bias points.
40
Frequency (GHz)
35 30
fT fMAX AE=0.4x10µm2 VCB=1V
25 20 15 10 5 10-4
10-3 10-2 Collector current (A)
Fig. 7. fT and fmax versus AE=0.4 10 mm2 device.
collector
current
for
a
4. Conclusions A nickel salicide process has been integrated into a SiGeC HBT with a non-selectively grown base. A difference in the monogermanosilicide thickness on the IDP emitter and poly-SiGeC extrinsic base regions is observed. This difference in silicide formation is further examined and confirmed by TEM analysis of silicidation on blanket wafers. HF device performance of 39 and 32 GHz for ft and fMAX, respectively, is shown.
Acknowledgements This work was sponsored by the Swedish Agency for Innovation Systems (VINNOVA) in the MEDEA+ T204 ASGBT program. Special thanks to Shi-Li Zhang
[1] Hashimoto T, Nonaka Y, Tominari T, Fujiwara H, Tokunaga K, Arai M, Wada S, Udo T, Seto M, Miura M, Shimamoto H, Washio K, Tomioka H. Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS. IEDM Technical Digest, 2003. p. 129–32. [2] Meister TF, Scha¨fer H, Aufinger K, Stengl R, Boguth S, Schreiter R, Rest M, Knapp H, Wurzer M, Mitchell A, Bo¨ttner T, Bo¨ck J. SiGe bipolar technology with 3.9ps gate delay. Proceedings of BCTM ’03; 2003. p.103–6. [3] Rieh J-S, Jagannathan B, Chen H, Schonenberg KT, Angell D, Chinthakindi A, Florkey J, Golan F, Greenberg D, Jeng S-J, Khater M, Pagette F, Schnabel C, Smith P, Stricker A, Vaed K, Volant R, Ahlgren D, Freeman G, Stein K, Subbana S. SiGe HBTs with cut-off frequency of 350 GHz. IEDM Technical Digest, 2002. p.771–4. [4] Xu MW, Decoutere S, Sibaja-Hernandez A, Van Wichelen K, Witters L, Loo R, Kunnen E, Knorr C, Sadovnikov A, Bulucea C. Ultra low power SiGe:C HBT for 0.18 mm RFBiCMOS. IEDM Technical Digest, 2003. p. 125–8. [5] Ru¨cker H, Heinemann B, Barth R, Bolze D, Drews J, Haak U, Ho¨ppner W, Knoll D, Ko¨pke H, Marschmeyer S, Richter HH, Schley P, Schmidt D, Scholz R, Tillack B, Winkler W, Wulf H-E, Yamamoto Y. SiGe:C BiCMOS technology with 3.6 ps gate delay. IEDM Technical Digest, 2003. p.121–4. [6] Kittl JA, Lauwers A, Chamirian O, Van Dal M, Akheyar A, De Potter M, Lindsay R, Maex K. Ni- and Co-based silicides for advanced CMOS applications. Microelectron Eng 2003;70:158–65. [7] Haralson E, Jarmar T, Seger J, Radamson HH, Zhang SL, O¨stling M. Ni silicide formation on polycrystalline SiGe and SiGeC layers. Mater Res Soc Symp Proc 2003;745:111–6. [8] Seger J, Mangelinck D, Radamson HH, Zhang S-L. Increased nucleation temperature of NiSi2 in the reaction of Ni thin films with Si1xGex. Appl Phys Lett 2002;81(11): 1978–80. [9] Lauwers A, Steegen A, de Patter M, Lindsay R, Satta A, Bender H, Maex K. Materials aspects, electrical performance, and scalability of Ni silicide towards sub-0.13 um technologies. J Vac Sci Technol B 2001;19(6):2026–37. [10] Jarmar T, Seger J, Ericson F, Mangelinck D, Smith U, Zhang S- L. Morphological and phase stability of nickelgermanosilicide on Si1xGex under thermal stress. J Appl Phys 2002;92:7193–9. [11] Chen SH, Zheng LR, Carter CB, Mayer JW. Transmission electron microscopy studies on the lateral growth of nickel silicides. J Appl Phys 1985;57:258–63. [12] Suvar E, Haralson E, Radamson HH, Wang Y-B, Grahn JV, Malm BG, O¨stling M. Characterization of leakage current related to a selectively grown collector in SiGeC heterojunction bipolar transistor structure. Appl Surf Sci 2004;224:336–40.