On the profile of frequency dependent series resistance and dielectric constant in MIS structure

Microelectronic Engineering 84 (2007) 180–186 www.elsevier.com/locate/mee

On the profile of frequency dependent series resistance and dielectric constant in MIS structure _ Yu¨cedag˘, S I. ß . Altındal *, A. Tatarog˘lu Department of Physics, Faculty of Arts and Sciences, Gazi University, 06500 Ankara, Turkey Received 31 July 2006; accepted 7 October 2006 Available online 3 November 2006

Abstract In this study, the frequency dependent of the forward and reverse bias capacitance–voltage (C–V) and conductance–voltage (G/x – V) measurements of Al/SiO2/p-Si (MIS) structures are carried out in frequency range of 10 kHz–10 MHz. The frequency dependence of series resistance (Rs), density of surface states (Nss), dielectric constant (e 0 ), dielectric loss (e00 ), dielectric loss tangent (tan d) and the ac electrical conductivity (rdc) are studied for these structure at room temperature. Experimental results show that both electrical and dielectric parameters were strongly frequency and voltage dependent. The e 0 and e00 are found to decrease with increasing frequency while rac is increased. Also, both the effects of surface states Nss and Rs on C–V and G/x – V characteristics are investigated. It has been seen that the measured C and G decrease with increasing frequency due to a continuous distribution of Nss in frequency range of 10 kHz– 1 MHz. The effect of Rs on the C and G are found noticeable at high frequencies. Therefore, the high frequencies C and G values measured under both reverse and forward bias were corrected for the effect of series resistance Rs to obtain real MIS capacitance Cc and conductance Gc using the Nicollian and Goetzberger technique. The distribution profile of Rs–V gives a peak in the depletion region at low frequencies and disappears with increasing frequencies.  2006 Elsevier B.V. All rights reserved. Keywords: MIS diode; Electrical and dielectric properties; Frequency dependence; Insulator layer; Surface states; Series resistance

1. Introduction In MIS and MOS structures, metal and semiconductor remain separated by an interfacial insulator layer such as SiO2, SnO2, Si3N4 and there is a continuous distribution of surface states at metal/insulator interfaces with energies located in the band gap of semiconductor. This interfacial insulator layer cannot only prevent inter-diffusion between metal and semiconductor substrate, but also alleviate the electric field reduction issue in MIS and MOS structures. When a voltage is applied across the MIS or MOS structure, the combination of the interfacial insulator layer, depletion layer and series resistance (Rs) of the device will share applied voltage, the magnitude of which depends on insulator layer thickness and (Rs). The values of the C and *

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0167-9317/$ - see front matter  2006 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2006.10.071

G depend on various parameters, such as density of surface states (Nss), series resistance (Rs), insulator layer thickness and barrier height formation between metal and semiconductor. Among than both Nss and Rs significantly alters the device C and G characteristics from their ideal behavior and makes the measured C and G strongly frequency dependent. Although MS, MIS and MOS devices have been studied extensively, satisfactory understanding in all details has still not been achieved [1–23]. An idealized capacitance–voltage (C–V) characteristic is independent frequency and shows an increase in capacitance with increasing forward bias voltage [1]. In recent years, some investigations [7–10,19,24] have reported an anomalous peak in the forward bias (C–V) characteristics. Among these very interesting work is presented by Chattopadhyay and Raychaudhuri, [19] and they have been shown that, in the presence of a series resistance, the C–V characteristics should exhibit a peak. The peak value of the C and its

_ Yu¨cedag˘ et al. / Microelectronic Engineering 84 (2007) 180–186 I.

position depends on a number of various parameters such as surface state density Nss, doping concentration, series resistance of device, and the thickness of the interfacial insulator layer [7,19,25]. When localized interface states exist at the semiconductor–insulator interface and the device behavior is different than ideal case due to their presence. This behavior is obtained at low and intermediate frequencies. In contrary, at high frequencies the charges at the surface states cannot follow an ac signal. The surface states can easily follow the ac signal, at low frequencies and yield an excess capacitance, which depends on the relaxation time of the surface states and the frequency of ac signal. These interface states usually cause a bias shift and frequency dispersion of the capacitance–voltage (Cm–V) and conductance–voltage (Gm–V) curves [2]. Therefore, it is important to include the effect of the frequency and examine detail the frequency dispersion of capacitance and conductance characteristic. The frequency response of the dielectric constant (e 0 ), dielectric loss (e00 ) and dielectric tangent (tan d) is dominated by a low frequency dispersion, whose physical origin has long been in question [3]. We reported the electrical and dielectric properties of MIS structure are studied frequency range of 10 kHz–10 MHz. by using impedance measurement methods (C–V and G/x – V). The aim of this study is to investigate experimentally the frequency dependence of the forward and reverse bias C–V and G/x – V characteristics of MIS structures by considering the series resistance (Rs) and density of surface states (Nss) effect. Therefore, to achieve a better understanding the effects of Nss and Rs on the C–V and G/x – V characteristics, we have measured the forward and reverse bias C–V and G/x – V characteristics of device in the wide range of frequency (10 kHz–10 MHz). To determine accurate values of Nss and Rs, we have applied the method by Nicollian and Goetzberger [1] and Hill–Coleman method [26], respectively. Experimental results show that both Nss and Rs are important parameters that influence the electrical characteristics of MIS structures. 2. Experimental procedure The metal–insulator–semiconductor (Al/SiO2/p-Si) structure used in this study were fabricated using p-type (boron-doped) single crystals silicon wafer with h1 0 0i surface orientation, having thickness of 280 lm, 200 diameter and 8 X cm resistivity. For the fabrication process, Si wafer was degreased in organic solvent of CHClCCl2, CH3COCH3 and CH3OH, etched in a sequence of H2SO4 and H2O2, 20% HF, a solution of 6HNO3:1HF:35H2O, 20% HF and finally quenched in de-ionized water of resistivity of 18 MX cm for a prolonged time. High purity ˚ was ther(99.999%) aluminum with a thickness of 2000 A mally evaporated from the tungsten filament onto the whole backside of in half wafer at a pressure of 2 · 106 Torr in oil vacuum pump system. The ohmic contacts were prepared by sintering the evaporated Al back contact at

181

650 C for 60 min in flowing dry nitrogen ambient at rate of 2 l/min. This process served both to the sinter the aluminum and to form the required insulator layer (SiO2) on the upper surface of the Si wafer. The wafer was placed in the vacuum system immediately after the thermal treatment ˚ were and Al rectifier contacts with thickness of 2000 A ˚ deposited at a rate of 4 A/s through a metal shadow masks with circular dots of 1 mm diameter. The metal thickness layer and the deposition rates were monitored with the help of quartz crystal thickness monitor. In this way, metal– semiconductor (MS) diode with thin interfacial insulator layer (SiO2) was fabricated on p-type Si. The interfacial ˚ from high layer thickness was estimated to be about 32 A frequency (1 MHz) measurement of the oxide capacitance in the strong accumulation. The frequency dependent of the reverse and forward bias capacitance–voltage (C–V) and conductance–voltage (G/x – V) measurements of MIS structures are carried out in frequency range of 10 kHz–10 MHz by using a HP 4192A LF impedance analyzer (5 Hz–13 MHz) and a small sinusoidal signal of 40 mVp–p from the external pulse generator is applied to the sample in order to meet the requirement [1]. All measurements were carried out with the help of a microcomputer through an IEEE-488 ac/dc converter card. 3. Results and discussions 3.1. Electrical characteristics To extract the series resistance of MIS structures, several method have been suggested [1,27,28]. In our calculation we have applied the method by Nicollian and Goetzberger [1]. The frequency dependent capacitance– voltage (C–V) and conductance–voltage (G/x – V) characteristics of MIS structure at room temperature is given in Fig. 1a and b, respectively. The real series resistance of MIS structure can be subtracted from the measured capacitance (Cma) and conductance (Gma) in strong accumulation region at high frequency (P1 MHz) [1]. In addition to voltage dependence of the series resistance can be obtained from the measurements of frequency dependent C–V and G/w–V data. At sufficiently high frequency, to determine series resistance Rs, the MIS structures are biased into strong accumulation. Then the admittance using the parallel RC circuit [1,18] is equivalent to the total circuit admittance Yma in strong accumulation as Y ma ¼ 1=Z ma ¼ Gma þ jxC ma

ð1Þ

Comparing the reel and imaginary parts, Rs can be obtain as Rs ¼

Gma G2ma

þ ðxC ma Þ2

ð2Þ

where Cma and Gma represent the measured capacitance and conductance in strong accumulation region. The

_ Yu¨cedag˘ et al. / Microelectronic Engineering 84 (2007) 180–186 I.

182 1.3E-10

and

a

1.0E-10

C (F)

2

1 - 200 kHz 2 - 300 kHz 3 - 500 kHz 4 - 700 kHz 5 - 1 Mhz 6 - 2 Mhz 7 - 3 Mhz 8 - 5 Mhz 9 - 7 MHz

7.0E-11

Gc ¼ 1

a ¼ Gm  ½G2m þ ðxC m Þ2 Rs

4.0E-11

10 -4

-3

-2

-1

0

1

2

3

4

5

2

3

4

5

V (V) 3.5E-10

b 1 - 200kHz 1

2 - 300kHz

2.8E-10

3 - 500kHz 4 - 700kHz

G/ω (F)

5 - 1 MHz 2.1E-10

6 - 2 MHz 7 - 3 MHz 8 - 5 MHz 9 - 7 MHz

1.4E-10

10 - 10 MHz 10 7.0E-11

0.0E+00 -5

-4

-3

-2

-1

0

1

V (V) Fig. 1. The frequency dependent plot of: (a) the C–V and (b) G/x – V characteristics of the MIS structure.

capacitance of insulator layer Cox is obtained by substituting Rs into the relation: C ma ¼

C ox ð1 þ x2 R2s C 2ox Þ

From this relation, Cox is obtained as "  2 # Gma ei e0 A C ox ¼ C ma 1 þ ¼ d ox xC ma

ð3Þ

ð4Þ

where ei = 3.8, eo [1] and eo (= 8.85 · 1014 F/cm) are the permittivities of the interfacial insulator layer and free space, respectively. Finally, by comparing the imaginary and real part of corrected admittance (Yc = Gc + jxCc) one obtains the corrected capacitance (Cc) and conductance (Gc) as 2

Cc ¼

½G2m þ ðxC m Þ C m a2 þ ðxC m Þ2

a2 þ ðxC m Þ2

ð6Þ

where

10 - 10 MHz

1.0E-11 -5

G2m þ ðxC m Þ a

ð5Þ

ð7Þ

As shown in Fig. 1a and b, the C–V and G/x – V characteristics of MIS structure which was measured at a frequency range of 10 kHz–10 MHz with a small ac signal of 40 mVrms peak to peak amplitude at room temperature. The applied voltage range was between 5 V and +5 V. The C–V and G/x – V curves show that both the C and G/x varies from the inversion region to the accumulation region. The insulator layer (SiO2) thickness dox was obtained from high frequency (f = 1 MHz) C–V curve using ˚ . Fig. 1a and b show the the Eq. (4) was found to be 32 A measured C–V and G/x – V characteristics as a function of the frequency. As has been seen from Fig. 1a, the measured C and G remained almost constant up to a certain value of the frequency. The higher values of C at low frequencies are due to excess capacitance (Co) resulting from the surface states (Nss) in equilibrium with Si. In order words, at low frequencies, the Nss can follow the ac signal and consequently do contribute appreciably to the MIS capacitance. As the frequency was increased further, the MIS capacitance first decrease and than become almost constant. As shown in Fig. 1a, the peak value of the capacitance has been found strongly dependent on the values of Rs, Nss and frequency of the ac signal superimposed on the dc bias. This peak position of C is shifting toward reverse bias region with increasing frequency. In recently, there are a number of experimental results on metal–insulator– semiconductor MIS structure [10,19,24,30]. The G/x – V characteristics of MIS structure at different frequencies (Fig. 1b) increase with increasing applied voltage, but decreases with increasing frequencies. These behaviors may be different at low and intermediate frequencies, depending on the relaxation time and of Nss and the frequency of the ac signal [1,2,5–7]. The series resistance is calculated according to Eq. (2) and shown in Fig. 2 for various frequencies. These very significant values demanded that special attention be given to effects of the series resistance in the application of the admittance-based measured methods (C–V and G/x – V). As seen in Fig. 2, the series resistance gives a peak about 1.5 V depending on frequency and disappears at sufficiently high frequencies From Fig. 2, it is clearly seen that the series resistance is dependent both frequency and voltage and changes from region to region. These behaviors considered that the trap charges have enough energy to escape from the traps located at metal/semiconductor interface in the Si band gap. The insulator layer thickness calculated from the Eq. (4) ˚ . The surface states for the sample was found to be 32 A (Nss) between Si/SiO2 at Si band-gap are estimated from the combination of various frequencies C–V and G/x – V

_ Yu¨cedag˘ et al. / Microelectronic Engineering 84 (2007) 180–186 I.

183

4,E+04

5000 1 - 200 kHz 2 - 300 kHz 3 - 500 kHz 4 - 700 kHz 5 - 1 MHz 6 - 2 MHz 7 - 3 MHz 8 - 5 MHz 9 - 7 MHz 10 - 10 MHz

Rs (Ω)

3000

1V 2V 3V 4V

3,E+04

Rs (Ω)

4000

2,E+04

2000 1,E+04

1

1000 10

0 -5

0,E+00 10

-4

-3

-2

-1

0

1

2

3

4

5

V (V) Fig. 2. The variation of the series resistance of the MIS structure as a function of bias voltage for various frequencies at room temperature.

characteristics (Fig. 1a and b) using Hill’s method [26]. According to this method, density of surface states is given by N ss ¼

2 ðGm =xÞmax qA ððGm =xÞmax C ox Þ2 þ ð1  C m =C ox Þ2 Þ

ð8Þ

where, A is the area of the diode, x is the angular frequency, (Gm/x)max is the measured maximum conductance in the G/x – V plot with its corresponding measured capacitance Cm and Cox is the capacitance of insulator layer. The values of various parameters for MIS structures with thin interfacial layer determined from C–V and G/x – V characteristics at various frequencies at room temperature and are given in Table 1. As can be seen in Table 1., as the frequency increases further, the peak value of the capacitance (Cm) is found to decrease with an increasing series resistance (Rs) value. These experimental results are in good agreement with the theoretical results given by Chattopadhyay et al. [19,24,29]. As a result we

100

1000

10000

f (kHz)

Fig. 3. The frequency dependence of the series resistance for various forward bias voltage at room temperature.

can say that in the low frequencies the Nss in equilibrium with the semiconductor can follow the ac signal at low frequencies and yield an excess capacitance, and thus Rs effect cannot observe, because the Nss are more pronounced. In other word, the values of Nss is given in Table 1, which is high enough and consequently, The Nss can prevent the construction of MIS type Schottky diode. In contrary to the low frequencies in the high frequency limit (f P 1 MHz), the Nss cannot follow the ac signal. This makes the contribution of interface state capacitance to the total capacitance negligibly small [1,21,29]. Therefore, at sufficiently high frequencies, the Rs effect beings to be more pronounced. Also we obtained the frequency dependent Rs at various forward bias and is given in Fig. 3. It is clearly seen in Fig. 3, that the series resistance is independent of voltage at high frequencies (f P 500 kHz). As a result we can say that at enough high frequencies the Nss cannot follow the ac signal and consequently cannot contribute to the MIS capacitance.

Table 1 The values of various parameters for of MIS structure determined from C–V and G/x – V characteristics at various frequencies at room temperature f (kHz) 10 20 30 50 100 200 300 500 700 1000 2000 3000 5000 7000 10000

Vm (V) 1.8 1.8 1.9 2.0 2.0 0.9 0.8 0.8 0.8 0.8 0.6 0.5 0.2 0.0 0.3

C (F)

G/x (F) 09

4.88 · 10 2.80 · 1009 1.86 · 1009 9.60 · 1010 3.23 · 1010 1.12 · 1010 9.57 · 1011 8.43 · 1011 7.56 · 1011 6.53 · 1011 4.43 · 1011 3.35 · 1011 2.41 · 1011 2.09 · 1011 1.89 · 1011

09

1.6 · 10 1.11 · 1009 1.02 · 1009 7.23 · 1010 4.00 · 1010 4.53 · 1011 2.52 · 1011 1.79 · 1011 1.48 · 1011 1.26 · 1011 7.07 · 1012 5.03 · 1012 2.61 · 1012 1.08 · 1012 4.61 ·1013

Nss (eV1 cm2)

Rs (X)

3.70 · 1012 1.96 · 1012 1.68 · 1012 1.16 · 1012 6.36 · 1011 7.21 · 1010 4.01 · 1010 2.85 · 1010 2.36 · 1010 2.01 · 1010 1.13 · 1010 8.01 · 1009 4.16 · 1009 1.72 · 1009 7.34 · 1008

1700 986 765 674 599 2430 2440 1820 1470 1200 899 790 613 254 146

_ Yu¨cedag˘ et al. / Microelectronic Engineering 84 (2007) 180–186 I.

184

To obtained the real MIS capacitance and conductance or correction capacitance (Cc) and conductance (Gc/x), at three different high frequencies both C–V and G/x – V measured under forward and reverse biases were corrected for the effect of series resistance using Eqs. (5)–(7) and given in Fig. 4a and b, respectively. When the correction was made on the C–V plot for the effect of series resistance, the values of the corrected capacitance increased with increasing voltage, especially under forward bias, as seen in Fig. 4a. On the other hand, the plot of the corrected conductance gives a peak, proving that the charge transfer can take place through the interface.

determined in the frequency and applied voltage range of 10 kHz–10 MHz and 5 V – +5 V at room temperature. The dielectric constant e 0 and dielectric lose e00 were evaluated from the knowledge of the measured capacitance Cm and conductance Gm using insulator layer thickness, area of the diode and free space permittivity eo. The variation of the e 0 , e00 and tan d with frequency at different voltage are presented in Fig. 5a–c, respectively. Experimental

a

2.0

1.6

Frequency and applied voltage dependence of dielectric constant e 0 , dielectric loss e00 , dielectric loss tangent tan d and dc electrical conductivity rdc MIS structures were

1.2

2.0E-10

2.5 V 1.5 V 1V 0.5 V

ε'

3.2. Dielectric properties

0.8

0.4

a 0.0

Cm - 500 kHz

10

Cm -1MHz

1.5E-10

100

1000

10000

f (kHz)

Cm -2MHz Cc - 500kHz

b

C (F)

Cc - 1MHz

1.80

Cc - 2MHz

1.0E-10

1.50

2.5 V 1.5 V 1V 0.5 V

1.20

ε''

5.0E-11

0.90 0.60

0.0E+00 -5

-4

-3

-2

-1

0

1

2

3

4

5

0.30

V (V) 0.00 10

2.E- 10

b

100

1000

10000

1000

10000

f (kHz) Gm - 500kHz

1.E- 10

c

Gm - 1MHz

2.5

2.5 V 1.5 V 1V 0.5 V

Gm - 2MHz Gc - 500kHz

9.E- 11

2.0

Gc (F)

Gc - 1MHz

tan δ

Gc - 2MHz

6.E- 11

1.5

1.0

0.5

3.E- 11

0.0 10

0.E+ 00 -5

-4

-3

-2

-1

0

1

2

3

4

5

V (V)

Fig. 4. The voltage dependent plot of the corrected Cc–V and Gc/x – V for three high frequencies, respectively, at room temperature.

100

f (kHz) Fig. 5. The frequency dependence of dielectric constant (e 0 ), dielectric loss (e00 ) and dielectric tangent tan d, respectively, at room temperature for Al/ SiO2/p-Si (MIS) structure.

_ Yu¨cedag˘ et al. / Microelectronic Engineering 84 (2007) 180–186 I.

e0 ¼

C ox Co

d ox Gm Gm ¼ e ¼ Aeo x Cox

ð10Þ

ð11Þ

It is seen that the measured capacitance Cm, dielectric constant e 0 and dielectric loss e00 decrease as the frequency is increased. These increases towards to lower frequency region may be attributed to the presence of interfacial polarization mechanism, which could be effective at low frequency [31]. It is clearly seen in Fig. 5a and b, that the dielectric constant e 0 and dielectric loss e00 , respectively, are independent of voltage at high frequencies (f P 500 kHz). As a result we can say that at enough high frequencies the Nss cannot follow the ac signal and not existence any interfacial polarization mechanism, consequently cannot contribute to the C, e 0 and e00 . In general, four possible mechanisms may contribute to low-frequency dielectric behavior of MIS or MOS structures; electrode interface, dc conductivity, dipole-orientation and charge carriers [33]. In addition, the dc conductivity is evaluated from the knowledge of the measured conductance Gm, using the relation rdc ¼

Gm d ox A

1 - (2,5V) 2 - (1,5V) 3 - (1V) 4 - (0,5V)

1,0E- 08

5,0E- 09

4

where Gm is the conductivity of MIS structure and x is the angular frequency. The dielectric loss tangent tan d was calculated from the relation: tan d ¼ e00 =e0

1

ð9Þ

where C0 = e0(A/dox); A is the area of the sample, dox is the interfacial insulator layer thickness and e0 is the permittivity of free space charge (eo = 8.85 · 1014 F/cm). In the strong accumulation region, the maximal capacitance of MIS structure correspond to the oxide capacitance 00 (Cm = Cox). The imaginary part of the dielectric loss e is determined from the relation, 00

1,5E- 08

-1 σdc(Scm )

results show that the values of the e 0 , e00 , tan d and rdc showed a strong dependence on the frequency and applied voltage. The capacitance of the MIS structure at high frequencies in accumulation region is controlled basically by the dielectric properties of the bulk insulator [10]. Therefore, it is possible to calculate the real part of the dielectric 0 constant (e ) at the various frequency at the strong accumulation region from the relation:

185

ð12Þ

The variation of rdc with frequency at different voltage is presented in Fig. 6. It is noticed that the dc conductivity is generally increased with increasing the frequency. This dc conductivity contributes only to the dielectric loss, which becomes infinite at zero frequency and important at high frequencies [32]. As shown in Fig. 5c, while the dielectric loss tangent (tan d) increase with increasing frequency about 300 kHz, after that decrease with increasing frequency and gives a peak at high forward bias but this peak disappears at low forward biases. This behavior of

0,0E+00 10

100

1000

10000

f (kHz)

Fig. 6. The frequency dependence of the dc electrical conductivity rdc for Al/SiO2/p-Si (MIS) structure at room temperature.

peak can be attributed to the fact that in this frequency and applied voltage range e 0 = e00 . 4. Conclusion The forward and reverse bias capacitance–voltage– frequency (C – V – f) and conductance-voltage-frequency (G/x – V – f) characteristics of the MIS structures were measured in the frequency range of 10 kHz–10 MHz at room temperature. The forward and reverse bias (C – V – f) and (G/x – V – f) characteristics of the MIS structures show that both capacitance and conductance were quite sensitive to frequency, especially at relatively low frequency. This behavior is attributed to the surface states can easily follow the ac signal, at low frequencies and yield an excess capacitance, which depends on the relaxation time of the surface states and the frequency of ac signal. The effects of the series resistance and (Rs) and interface state density (Nss) of the sample on C–V characteristics are investigated. The peak values of capacitance especially at low frequencies have been found to be strongly dependent on the values of interface state density (Nss) and series resistance (Rs). It can be explained that the Nss can follow the ac signal and yield an excess capacitance and conductance, which depends on the relaxation time of Nss and frequency of the applied ac signal. Experimental results show that both capacitance and conductance were quite sensitive to temperature and frequency. It can be concluded that the values of Rs are significant only in the downward curvature of the forward bias C–V characteristics and accumulation region, but the values of Nss are significant in both the inversion and depletion region. In conclusion that at high frequency where the influence of Nss decreases, the peak value of the capacitance decreased and the peak position shifted towards lower voltages with increasing the Rs. References [1] E.H. Nicollian, J.R. Brews, MOS (Metal-Oxide-Semiconductor) Physics and Technology, John Wiley & Sons, New York, 1982.

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