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Optimization of a complex flow line for printed circuit board fabrication by computer simulation
Op"tnnizafionof a Complex Flow Line for Printed Circuit Board Fabrication by Computer Simulation Li Lin, deffery K. Cochran, Arizona State University, Tempe, Arizona
importance. This is especially true for the electronics industry because of the constant technological advances, engineering changes, product updates and new product development strategies facing them in today's highly competitive market. Printed circuit board manufacturing is highly capital and labor intensive, and therefore is a highly risky business. The cornerstone to successful system development, design and incorporation is effective planning. t In the design and development of an electronics manufacturing facility such as a PCB fabrication line, the design must be evaluated for makeability in the production quantities required. As pointed out by MacCarron, 2 a flow process analysis is absolutely necessary to achieve production flow line balancing and efficiency. The F l o w Line Problem. The production oriented flow line balancing and efficiency problem has historically evolved from the mass production line where work tasks required in the process are assigned to workers in equalized portions such that a specified production rate can be maintained and the number of workers can be minimized3 For the design of a simple or deterministic flow line (which means it is based on the assumption that all work task elements and associated process times are constant), line balancing is stated by Wild 4 to find the solution for the following problems:
Abstract The complex operations and considerable process time variability of printed circuit board (PCB) fabrication create difficulties in finding effective and efficient planning techniques for today's PCB production management. A great deal of money is involved. By modeling and testing a real world PCB fabrication facility, this paper shows that computer simulation can provide a viable planning tool to estimate production capacity and to explore optimum arrangement in batch work size of key bottleneck machines to minimize product throughput time. Many simulation experiments are performed and the results analyzed as a response surface. The general characteristic of product throughput time is found to be that its minimal value exists when batch job numbers of subsequential key machines are matched in batch size or in multiples thereof. A nonlinear empirical equation to estimate product throughput time has been derived from the simulation results.
Keywords: Printed Circuit Board Fabrication, Batch Size, Throughput Time, Computer Simulation, Optimization, Response-Surface Methodology.
Introduction As manufacturing industries move into the computer integrated manufacturing era, the need for systematic production planning becomes of vital
1. Allocation of work elements; 2. Necessity of duplicating work stations and multiple manning employment; and
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Journal ok/"Manufacturing Systems Volume 6 / N o . I
tion processes, a unique characteristic of PCB fabrication is batch work. Individual boards have to be accumulated into batches for lamination and drill and separated afterwards for other operations. This further complicates production and reduces product flow visibility to production management. Because of the unique characteristics and complexity of PCB fabrication, traditional flow line balancing techniques are not applicable. According to Training 'n' Technology (TNT), a consulting company specialized in PCB fabrication," of the approximate 2,200 PCB manufacturers in the U.S. today, most plants rely solely on management experience or guesswork as their primary design planning tool. This can be a costly mistake. Some PCB manufacturing managements use simple capacity planning as a tool to estimate the time required to finish an order of a certain type of PCB. In this method, process times of all individual machines on the fabrication line are estimated and used to work out the production capacities in terms of product quantities per machine per shift. The lowest capacity of all machines is estimated as the capacity of the line. This method always overestimates the production line capacity, because it is clone on the basis of individual machines, instead of on the entire facility as a system consisting of a series of machines working in specified sequence. In an attempt to respond to this problem, considerable effort has been made by a number of computer software companies to develop application programs specializing in the PCB industry. '2 For example, the Advanced Integrated Manufacturing System (AIMS), developed by Martek Inc., ~ includes a subprogram production planning system (PPS) which can provide a projection on a day-today dynamic department loading schedule for the management. Undoubtedly, this is a strong aide to production planning. Nevertheless, this program does not portray the dynamic production flow on a PCB fabrication line on the basis of real process time. Variability on process times is not reflected, and product throughput time, waiting times between processes and key machine utilization are not presented. Computer Simulation. The use of computer simulation is a systematic approach to production planning. 14.~5 It can provide a system components balance treatment, a system's dynamic portrait in detail, and a means for evaluating the system's ran-
3. Appropriate production cycle times, that is, time available at each station for the performance of the work. Since 1955, many researchers have worked on the complex and important flow line balancing problem and a number of techniques and procedures have been developed in the effort of finding optimal solution to the above problems. 5-~ Line balancing computer programs have also been written to ease tedious manual calculation) These techniques attack the problem of minimizing product throughput time and improve line efficiency with different approaches, but their c o m m o n prerequisite for applicability is the loose restriction on operation precedence and work zoning (grouping). This is because these techniques are developed mainly to handle network type assembly line balancing problems, in which the order of performing considerable amounts of work is not important to the subsequent work. For production flow lines with strictly designed operation sequence, Hira and Pandey, s cite a number of researchers who have developed analytical models to solve the flow line balancing problem and obtain closed form expressions for parameters such as production rate. However, due to the a m o u n t of computational work involved, these results could only be applied to relatively short flow lines with from two to six stages a n d / o r operations. There are also models to approximate the production rate of a line consisting of any number of similar or identical work stations with a wide range of process times (see Knott 9 and MuthZ°). The analysis approach we develop in this paper allows complex flow lines, dissimilar work stations, variable process times, and batch work. PCB Fabrication. The PCB fabrication is a very complex production involving mechanical techniques, chemical and photographic processes. There are as many as 50 single processes along the line. The requirement on operation precedence is very strict and, therefore, very inflexible in arranging process equipment and work locations. For instance, the order from etch, strip, lay-up, lamination to drill has to be followed. Very few alternative routings exist along the line. In PCB fabrication, there is considerable variability in process times due to the complex chemical and photomechanical processes and other factors such as complexity of circuits, etc. In addition to the complexity in fabrica-
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Journal of Manufacturing Systems Volume 6/No. I
d o m behavior, I* including variability in process times. For the flow line problem, Hillier and Roling, ~7 and Hira and Pandey s have developed multistage models with simulation and derived empirical equations from the simulation results to quantitatively describe the production rate and line efficiency as a function of the number of work stations and process times. Their results are applicable to single route flow lines where there is no batch work or complex flow patterns including multiple sublines joining together as an assembly process. In this paper, we extend the previous models to a complex flow line and focus on o p t i m u m selection of batch sizes. There is a practical benefit to utilizing simulation in the analysis of industrial projects, namely, that the use of simulation can eliminate risk. ts An advantage of simulation is the ability to evaluate a proposed system in design without building it, or test a system's behavior without disturbing or destroying it." Therefore, simulation is an extremely valuable tool to resolve the PCB fabrication production planning problem.
Modeling of the System In this paper, we use the computer simulation language S L A M II to model and test a real world PCB fabrication facility to discover and optimize its flow line behavior. The system's physical structure and associated data have been provided by TNT.It The generalized process flow diagram of the PCB fabrication line in Figure 1 shows that there is one mainline (bare board) and three sublines (prepreg, plate and copper foil). All four lines are joined (assembled) together for lamination and drill. This assembly point is the key area in the line. Boards, after being laid-up, have to be accumulated into batches for lamination, and batched again for the drilling operation. Figure 2 shows this area in more detail. In Figure 2, N~ and N~ are the numbers of boards accumulated for batch work of lamination and drilling, respectively. The lamination press usually has five openings with each holding from 4 to 18 boards. Single-opening presses are also used by some manufacturers with the intention of reducing
.ece,vin,< Process: 1. Plate Preparation 2. Prefabrication 3. Prepreg Punch 4. Cu Foil Punch 5. Inner Layer
rl 6. Lamination 7, Drill 8. Electroless 9. Image 10. Electroplating
Figure 1 PCB Fabrication Process Flow
49
1 1. Screening 12. Gold Plate 13. Final Fabrication * R w k --- Rework * * S c p --- Scrap
Journal oJ ManuJm'turing Systems
Volume6~No. I
Plate ~ Bare Prepreg~
N1 ~ ~ "~ O-".O-"O--"O . .'0 Strip ~ Lay-up Batch Lamination Unbatch
/ No
Batch= 0 Drill~ 0
UnbatchO
Figure 2 Bottleneck Area Lamination and Drill Batch
equipment investment and operating cost. Thus, the range of N~ is: 4 < = N, < = 18
for single-opening press
20 < = N~ < = 90
for five-opening press.
X-ray-'-0
~- ---
Work
between the selection of N, and product throughput time for different types of boards and exploring the o p t i m u m arrangement of N, to minimize throughput time. The entire PCB fabrication line for a typical four layer product is modeled as a basis for the study and the S L A M II simulation network of this key area is shown in Figure 3. In the analysis to follow, it is assumed that other portions of the line are already balanced and there is a sufficient number of key machines in lamination and drill. The board waiting is only for being accumulated to a specified number for batch work.
and On most of the PCB lines, four-head drills are used. Depending upon the PCB circuitry complexity and board size, one to four boards can be put under each drill head. Thus, Na= 4, 8, 12, 16. It also has been realized that for a certain type of PCB, which means for a certain N~, the selection of N, significantly impacts the product throughput time and production rate. Thus, management is always challenged by this selection when estimating the production capacity in production planning. Another production oriented problem facing management is when PCB product changes, how the product throughput time is going to change correspondingly. This is the sensitivity problem of the system outputs over the inputs. To resolve these problems, we have focused on this bottleneck area with a major research effort aimed at finding the quantitative relationship
Simulation Runs We know the product throughput time can be written as:
T : f ( K b, N,, Na)
(1)
where Ko is the PCB type which determines the process times in etch/strip, bake and drill operations and N~ and N~ are the same as before. The shape of f will be defined through simulation experimentation. In determining the optimum conditions of a system's output in simulation, Law and Kelton z°
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Journal of Manufacturing Systems
Volume6/No. 1
Plate~
~
\
__0.03Rework~ / ~ ;~Bake ~ ~
Baraed---~ E t c h /
\\ /~X'-~Lpy~~'~
Prepreg~l~~~~~~'~~/// CuFoi~l
~
All(2) I
All(2)
nation
1) Figure 3
SLAMI1Networkof the BottleneckArea size must be established by running a sufficient number of boards through the system. With this sufficient number, we still cannot use the obtained mean value for data analysis and draw our conclusions because of the randomness involved in a single simulation run. In order to obtain reliable results and characterize the system behavior, simulation run replications with different random number seeds must be made. Hence, we can establish a confidence interval on the results obtained. Consider the following notations:
and S h a n n o n z~ suggest the r e s p o n s e - s u r f a c e methodology (RSM) be used when there are two or more factors or input variables. The concept is to make simulation runs on all significant combinations of the factors and by looking at the responding outputs, often plotted as response contours, to find the optimum input factor condition for the system. We have employed this idea and made many simulation runs by changing N, and process times determined by board types to study the problem. Through conferences with T N T y five types of typical boards, from type 1 to type 5, ranging from the simplest to the most complex, have been identified and the associated process times in etch/strip, bake and drill have been estimated. A goodness-of-fit procedure using the Kolmogorov-Smirnov test was performed on some sample data also provided by TNT. These process times are well fitted as triangular distributions. The results are presented in Table 1. Due to the process time variability and the batch/unbatch works, the product throughput time of an individual board is distributed in a relatively large range. In order to estimate the product throughput time by the mean value from the throughput times of all boards, a reasonable sample
n ti t, S,~ gl
Number of boards in one single run. Throughput time on the i'* board. Mean value of ti in one single run. Standard deviation oft i in one single run. Half-length of desired range for t, in a single run. N Number of replications. T Mean value of t, in N runs. S,, Standard deviation of t,. g, Half-length of desired range for T in N runs. ta~p~=/~,v., Critical value at 1 - alpha confidence level for N-1 degree of freedom.
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Journal of ManuJacturing Systems VoLume 6 / N o . I
Table 1 Process Times in the Bottleneck Area
Process Board Type 1 2 3 4 5
Etch/Strip
Bake
Drill
(2.0,3.0,5.0) (4.0,6.0,9.0) (6.0,9.0,13.0) (9.0,12.0,18.0) (12.0,16.0,24.0)
(3.0,6.0,8.0) (6.0,11.0,15.0) (9.0,17.0,24.0) (14.0,24.0,30.0) (21.0,32.0,38.0)
(4.0,6.0,12.0) (5.0,8.0,16.0) (7.0,10.0,21.0) (9.0,13.0,26.0) (11.0,16.0,31.0)
* Unit = Minute ** Triangular distribution in (min, mode, max.)
The required n and N can be calculated by using Pritsker's formula: ~s
N
= (t,tpha/1,N. I S,/g)2
Simulation Results Analyses Simulation Results. The simulation results for the five-opening lamination press and for the singleopening press for a typically complex four layer P C B with Na = 12 are presented in Tables 2 and 3. It should be pointed out that the simulation runs for N~ - 24, 36, 48, 72 and 84 were made after finding that the throughput time Treduces drastically when Nj = N a = 12 and with the intention of examining any similar behavior of T w h e n N~ 's are multiples ofNa. Figures 4 and 5 depict the simulation results T. Response contours for each case are plotted with throughput time on board type vs. the c o m m o n abssisa N~. The plots of T vs. N~ clearly show that the general tendency of T on Nt is linearly increasing. At every N~ being a multiple of N~, irregular decrease of throughput time exists. Simulation runs
(2)
First we make a sample run with n boards and calculate t, and S,i for all ti's. Then use alpha - 0.1 for a 90% confidence level and find t,lph,/z.,.~ = 1.96 and desired gi - 12 (minutes). Use Eq. (2) to obtain n and if n is less than the left side of Eq. (2), repeat this process with increased n until it is greater than or equal to the left-hand side. The calculation of N is the same by making a couple of trial runs and substituting Sx with S,, and g with g,. The results for our system are: n = 300
giving 90% confidence of all t,.'s being within the range of plus/ minus 12 minutes of t,.
N = 20
giving 90% confidence of all t,'s being within the range of plus/ minus 8 minutes of T.
and Table 2 Throughput Time (5-opening lamination press)
Board Type
By running 300 boards in each run and making 20 replications, the Tvalue we have under one specified condition can be interpreted as: all realistic throughput time values are within plus/minus (12 + 8) " 20 minutes of the simulation result T with a confidence level,
1
2
3
4
5
527 512 572 575 628 645 681 712 812 786 854 860 906
540 527 579 592 639 655 690 724 824 792 874 863 918
548 536 595 598 653 669 706 740 830 810 883 877 936
563 547 607 614 656 680 717 754 849 827 893 894 953
582 567 622 631 684 698 732 768 866 841 914 910 962
N I
20 (24) 30 (36) 40 (48) 50 (60) 70 (72) 80 (84) 90
1 -(0.I) (0.1) = 0.99 " 99%. All simulation runs are made on an IBM mainframe c o m p u t e r at the Center for A u t o m a t e d Engineering and Robotics at Arizona State University. The total number of simulation mcdel runs required for one study is, (5 board types) (21 N, values) (20 replications) - 2,100.
* Unit = Minute. ** ( ) indicates multiples of N d, N d = 12
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Journal~Man~acturing Systems Volume6/No.I
Table 3
Throughput Time (single-opening lamination press)
Board Type
Board Type
1
2
3
4
5
461 459 471 491 457 508 509 510
472 470 483 505 472 516 522 525
480 479 496 515 481 530 535 535
496 493 506 526 497 542 547 548
514 512 525 547 511 558 562 564
5
14
N I
4 6 8 10 12 14 16 18 * Unit = Minute
made for Na = 4, 8 and 16and the results showed the same pattern. In order to utilize the simulation results to find the general characteristic of our system and provide a planning tool for the PCB production management in dealing with product changes and batch size selection, the simulation results analyses are made in two aspects. The between type analysis explores the relationship of throughput times and board type changes, and the within type analysis studies the effect of changing N~ on throughput time T. B e t w e e n T y p e Analysis. The differences of the sum of most likely (mode) values of etch/strip, bake and drill process times between two adjacent board types la(i.i.t~,j = 1,2, 3, 4, are calculated from the data in Table 1:
N d = 12
= 20
:
: 30
24
: 40 " :"50 36 48
' 60
:: : = "="N,90 70 80 72 84
(a)
Board Type 95O
5
4
Between types j,j÷l
ta
I ,2
2,3
3,4
4,5
11
11
13
15 3
F r o m the simulation results, the mean values of throughput time differences T~i~.,, j = 1, 2, 3, 4, and their standard deviation are also calculated for all 21 N t conditions used as the following: Between types j,j÷l
Ta S.D.
1,2
2,3
3,4
4,5
11.7 3.3
12.2 3.7
13.8 3.0
16.4 2.8
2
1
,
, 00, 650 700 750 800 8?0 900
2030405060708090 (b)
A linear regression analysis is made and the calculated correlation coefficient between T~ and t~ is,
Figure 4 Response Contour of Throughput Time for Five-opening Lamination Press
r = 0.993
53
N,
Journal oJ Manufi~cturing Systems V o l u m e 6,, No. I
and the coefficient of determination is,
Board Type
r 2 " 0.986.
1=,
This indicates a strong linear relationship between the two system parameters T~ and t~. The least square regression line is calculated as, T~ = -0.163 + 1.095 td.
(3)
W i t h i n T y p e Analysis. F r o m Figures 4(a) and 5(a), the general linear tendency between T a n d N,
can be clearly seen. F r o m the simulation results, we can derive an empirical equation to approximate this near linear relationship. Consider that line, T~ + S ( N t - iV,)
I
I
!
I
4
6
8
10
t 12
t 14
t 16
as the envelope of the throughput time response contours, which describe the general increasing tendency of T. By multiplying a nonlinear corrector K to characterize the irregularities occurring at N, = M*Nd. M = 1, 2, 3 .... the following equation emerges:
: ~N 1
18
T " K [ T , + S(N, - N,)]
(a)
•
520 530 540
510
(5)
where T, is the t h r o u g h p u t time at a referencing starting point, which is used as the basis to estimate T a t other Nj 's; and S is a calculated constant serving as the general slope of T o n N, for all five types of boards. It can be seen from Figures 4(a) and 5(a) that the closer N I is to the multiples of Na, the farther T goes below the envelope line. The envelope line is tangent to the simulation results curve at all the midpoints between multiples of N~. If we pick T values from two such points, say N~ = 30 (midpoint of 24 and 36) and 90 (midpoint of 84 and 96) and calculate the slope between the two points, we can obtain the S / v a l u e s , j = 1, 2, 3, 4, 5 for all five types of board. Since these values are very close, we can use the mean,
Board Type )
(4)
3,
2,
S - 5.66 1'
460
as a general slope for all five types of boards. Based on the same midpoint tangency property, a nonlinear corrector is considered to be a parabolic equation with its m a x i m u m value occurring at all midpoints where K= 1 with no correction. We next use the distance ratio,
4901 p 6 0 480 470
I
I
I
I
I
I
;
4
6
8
10
12
14
16
18
(b) Figure 5 Response Contour of Throughput Time for Single-opening Lamination Press
R a = m i n {N~(mod N d, N a - N t
(mod N.)}/ N.
54
(6)
Journal of Manufacturing Systems Volume 6 / N o . 1
which is the distance of NI to the closest adjacent multiple of N~, over N~. It ranges from 0 to 0.5. Since the m a x i m u m value of K occurs at R~ = 0.5, we have the parabolic equation that is graphically shown in Figure 6: a (K-1) = (R a -0.5) 2
K 1
(7)
/('~
where a is a constant. K equals to its smallest value, Kmi,, when R~ = 0. To find Kml. and then calculate the constant a to obtain the corrector K equation, we need to use our simulation results and examine the m a x i m u m a m o u n t of Tat multiples o f N a caused by this nonlinear corrector. We use the slope S developed earlier and calculate the following ratio, T a t N I = (M) (N~) from simulation results T if without nonlinear irregularity
(8)
0
M = 1, 2, 3, 4.
Figure 6 The Nonlinear Corrector K
When the numerator is read from the simulation results for N I is equal to (M) (N~), the denominator can be calculated as, T. = S [N, - (M) (Na)]
work station) or multiple batch sizes in between the two key machines and this will minimize boards waiting time. Verification of this empirical Eq. (5) on the simulation results shows that calculated Tvalues by the equation are within 5% of those from the simulation. P o t e n t i a l Applications. Depending on PCB type, with chosen N,, Nd, N, and calculated T~, the product throughput time can be estimated from the derived empirical equation. The procedure for the PCB manufacturing management to estimate T without actually making simulation runs is as follows:
(9)
where T is the Tvalue at a starting reference point, which is preferred to be a midpoint. When the ratio in Eq. (8) for all five types of boards are found, their mean is taken as the simplified K,.i. for all five board types, yielding, K,~,~ = 0.95. In Eq. (7), if we substitute,
R =0 and K = K,.i. = 0.95,
Step l: Estimate the sum of the most likely (mode) process times of etch/strip, bake and drill for the PCB in interest. Step 2: Based on the process times used in the base model in this paper, find the difference t~ between the new PCB and an appropriate type in the model. Step 3: Use the linear regression line Eq. (3) to find the corresponding increment of throughput time T~. Step 4: Add this increment to the throughput time of the PCB type used in step 2. The result is T~ in the empirical equation for estimating T. Step 5: Choose Aft, use the general empirical
then the constant a can be calculated, a = -5. Rearrange Eq. (7) and substitute the above values in the nonlinear corrector in Eq. (5) gives, K= I-(R~-0.5)2/5
0.5
(10)
By putting this nonlinear corrector into Eq. (5), the equation is completely derived. The empirical equation characterizes our system's behavior on batch sizing for the key machines. The physical interpretation for the characteristic is that the equal and multiple batching sizes will leave either no residual boards (less than the batch size for the next
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Journal oJ"Manufacturing Systems Volume 6/No. I
Eq. (5) and calculate the estimated throughput time T. Step 6: If it is to obtain optimum condition N t for minimizing T under certain physical or process limitations, repeat step 5 for various Nt until a satisfactory solution is found. In doing this, key machines in use or proposed to be used and associated investment and operating cost should be taken into account to make the system economicallyjustifiable. Step 7: Other system parameters, such as the total time to finish an order, can be calculated from the results of steps 5 and 6 by adding the average throughput time to the product of raw material input feed rate times the number of boards of the order. An example is presented to illustrate the above procedure:
Concluding Remarks The simulation results show that on a complex PCB fabrication flow line, m i n i m u m product throughput time can be achieved by choosing the number of boards to be accumulated in a batch work lamination station as multiples of the accumulated board number in the subsequent batch work drill station. Simple empirical equations derived from between type and within type analyses on the simulation results can be used by the PCB manufacturing management in production planning to estimate product throughput time of PCB in interest. The 5% relative error of the empirical equation provides reasonable accuracy. Not limited to the results of this important base model, the simulation runs can be expanded by using the same approach to cover all identified basic PCB types. Any incoming PCB order will be estimated in real time by such a system requiring no human intervention. Our results are going to be used to establish a computerized knowledge base as a PCB production planning system which can be easily implemented on a personal computer.
Step 1: The most likely process time of a new four layer PCB for the bottleneck area is estimated by a trial as about 19 minutes, which is between board type 1 and type 2. Step 2: The time difference between the new PCB and type 1 PCB ta
= 19 -15 = 4 minutes.
Step 3: Use Eq. (3) and find that the increment in throughput time is
References 1. G.T. Mackulak, D.D. Bedworth. "Modeling Method For Automation Evaluation", Proceedings of the Technical Programs, National
T, = -0.163 + (1.095) (4) "- 4.2 minutes.
Electronic Packaging and Production Conference, NEPCON EAST,
Step 4: Add T a to the base time of type 1 board at N, = 20 (for Na = 12)
Boston, Massachusetts, ,iune 19-21, 1985, p. 83. 2. ,i. M. McCarron. "Setting Up an Electronics Manufacturing Plant", Electronic Packaging and Production, March 1985, p. 132. 3. D.D. Bedworth, .I.E. Bailey. Integrated Production Systems, ,iohn Wiley & Sons, New York, 1982. 4. R. Wild. Mass-Production Management, The Design and Operation of Production Flow-Line System, J o h n Wiley & Sons, London, 1972. 5. D.D. Bedworth. Industrial Systems: Planning. Analysis, Control, John Wiley & Sons, New York, 1973. 6. M.D. Helgeson, D.P. Birnie. "Assembly Line Balancing Using the Ranked Positional Weight Technique", The Journal of Industrial Engineering, Volume 12, No. 6, 1961. 7. E.M. Mansoor. "Assembly Line Balancing- An Improvement on the Ranked Positional Weight Technique", The Journal of Industrial Engineering, Volume 15, No. 2, 1964. 8. D.S. Hira, P.C. Pandey. "A Computer Simulation Study of Manual Flow Lines", Journal of Manufacturing Systems, Volume 2, No. 2, 1983, p. 117. 9. A.D. Knott. "The Inefficiency of a Series of Work Stations--A Simple Formula", International Journal of Production Research, Volume 8, No. 2, 1970, D. 109. 10. E.J. Muth. "The Production Rate of a Series of Work Stations with Variable Service Times", InternationalJournalofProduction Research, Volume 1 I, No. 2, 1973, p. 155. 11. V. Allies, ,I.M. MacCarron. Personal Communication, Training 'n' Technology, Tempe, Arizona, 1986. 12. M. Brody. "Computerization for the PC Fabricator", Printed Circuit Fabrication, Volume 6, No. 3, 1984, p. 85. 13. M.,I. Dave, "Computerized Information Management for Printed Circuit Board Production", Circuit World, Volume 10, No. 3, 1984, p. 15.
T new board NI = 20 = 527 + 4.2 -- 531.2 minutes. Steps 5 and 6: Calculate T f o r a few N t 's:
N,
T (minutes)
24 30 36 40
526.1 573.2 564.5 590.6
Step 7: If N~ = 24 is chosen for an order of 500 boards with input feed rate of 5.8 minutes (which is the value used in our model), the total time expected to finish the order is estimated as, (5.8) (500) + 526 = 3426 minutes = 57 hours 6 minutes.
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Journal of Manufacturing Systems Volume 6/No. I
14. N.E. Glenny, G.T. Mackulak. "Modeling and Simulation Provide Key to CIM Implementation Philosophy", Industrial Engineering, May 1985, p. 76. 15. K. Tumay. "Evaluation of PCB Assembly Through Simulation',
lg. M.W. Hichens. "'Simulation: The Key to Automation Without Risk", CAD~CAM Technology, Fall, 1984. 19. A.A.B. Pritsker. Introduction to Simulation and SLAM II, John Wiley & Sons, New York and Systems Publishing Corporation, West Lafayette, Indiana, 1984. 20. A.M. Law, W.D. Kelton. Simulation Modeling and Analysis, McGraw-Hill, New York, 1982. 21. R.E. Shannon,. Systems Simulation, Prentice-Hall, Inc., Englewood Cliffs, New Jersey, 1975.
Proceedings of the Technical Programs, National Electronics Packaging and Production Conference. NEPCON EAST, Boston, Massachusetts, June 19-21, 1985, p. 337. 16. K.J. Musselman. "Computer Simulation: A Design Tool for FMS", Manufacturing Engineering, September 1984, p. 117. 17. F.S. Hillier, R.W. Roling. "Finite Queues in Series with Exponential or Erlang Service Times--A Numerical Approach", Operation Research, Volume 14, 1967, p. 286.
Author(s) Biography Li Lin received his B.S. degree in Mechanical Engineering in 1982 from the Beijing Institute of Printing Technology, Beijing, China. Since 1983, he has studied at Arizona State University, Tempe, Arizona where he earned a M. Tech. degree in 1984, and is currently a doctoral student in the Department of Industrial and Management Systems Engineering. Mr. Lin's research interests include modeling and simulation of manufacturing systems, group technology and computer aided process planning. Jeffery K. Cochran is an Assistant Professor of Industrial and Management Systems Engineering at Arizona State University. He received his Ph.D. in Operations Research from Purdue University in 1984. In addition to his position as an Assistant Professor, he is also joint director of the Simulation and Computer Integrated Manufacturing Laboratory in the Center for Automated Engineering and Robotics. Through this laboratory, he is pursuing research interests in artificial intelligence, statistical inference, computer graphics, and decision processes, all in the SimCIM context. Dr. Cochran's industrial experience includes work at Battelle Northwest Laboratory, Los Alamos Scientific Laboratory, and NASA's Laboratory for Application of Remote Sensing. Dr. Cochran has authored more than 20 publications. He is a member of liE, ORSA, ASEE, SIAM, and SCS, and is a Registered Professional Engineer.
57
importance. This is especially true for the electronics industry because of the constant technological advances, engineering changes, product updates and new product development strategies facing them in today's highly competitive market. Printed circuit board manufacturing is highly capital and labor intensive, and therefore is a highly risky business. The cornerstone to successful system development, design and incorporation is effective planning. t In the design and development of an electronics manufacturing facility such as a PCB fabrication line, the design must be evaluated for makeability in the production quantities required. As pointed out by MacCarron, 2 a flow process analysis is absolutely necessary to achieve production flow line balancing and efficiency. The F l o w Line Problem. The production oriented flow line balancing and efficiency problem has historically evolved from the mass production line where work tasks required in the process are assigned to workers in equalized portions such that a specified production rate can be maintained and the number of workers can be minimized3 For the design of a simple or deterministic flow line (which means it is based on the assumption that all work task elements and associated process times are constant), line balancing is stated by Wild 4 to find the solution for the following problems:
Abstract The complex operations and considerable process time variability of printed circuit board (PCB) fabrication create difficulties in finding effective and efficient planning techniques for today's PCB production management. A great deal of money is involved. By modeling and testing a real world PCB fabrication facility, this paper shows that computer simulation can provide a viable planning tool to estimate production capacity and to explore optimum arrangement in batch work size of key bottleneck machines to minimize product throughput time. Many simulation experiments are performed and the results analyzed as a response surface. The general characteristic of product throughput time is found to be that its minimal value exists when batch job numbers of subsequential key machines are matched in batch size or in multiples thereof. A nonlinear empirical equation to estimate product throughput time has been derived from the simulation results.
Keywords: Printed Circuit Board Fabrication, Batch Size, Throughput Time, Computer Simulation, Optimization, Response-Surface Methodology.
Introduction As manufacturing industries move into the computer integrated manufacturing era, the need for systematic production planning becomes of vital
1. Allocation of work elements; 2. Necessity of duplicating work stations and multiple manning employment; and
47
Journal ok/"Manufacturing Systems Volume 6 / N o . I
tion processes, a unique characteristic of PCB fabrication is batch work. Individual boards have to be accumulated into batches for lamination and drill and separated afterwards for other operations. This further complicates production and reduces product flow visibility to production management. Because of the unique characteristics and complexity of PCB fabrication, traditional flow line balancing techniques are not applicable. According to Training 'n' Technology (TNT), a consulting company specialized in PCB fabrication," of the approximate 2,200 PCB manufacturers in the U.S. today, most plants rely solely on management experience or guesswork as their primary design planning tool. This can be a costly mistake. Some PCB manufacturing managements use simple capacity planning as a tool to estimate the time required to finish an order of a certain type of PCB. In this method, process times of all individual machines on the fabrication line are estimated and used to work out the production capacities in terms of product quantities per machine per shift. The lowest capacity of all machines is estimated as the capacity of the line. This method always overestimates the production line capacity, because it is clone on the basis of individual machines, instead of on the entire facility as a system consisting of a series of machines working in specified sequence. In an attempt to respond to this problem, considerable effort has been made by a number of computer software companies to develop application programs specializing in the PCB industry. '2 For example, the Advanced Integrated Manufacturing System (AIMS), developed by Martek Inc., ~ includes a subprogram production planning system (PPS) which can provide a projection on a day-today dynamic department loading schedule for the management. Undoubtedly, this is a strong aide to production planning. Nevertheless, this program does not portray the dynamic production flow on a PCB fabrication line on the basis of real process time. Variability on process times is not reflected, and product throughput time, waiting times between processes and key machine utilization are not presented. Computer Simulation. The use of computer simulation is a systematic approach to production planning. 14.~5 It can provide a system components balance treatment, a system's dynamic portrait in detail, and a means for evaluating the system's ran-
3. Appropriate production cycle times, that is, time available at each station for the performance of the work. Since 1955, many researchers have worked on the complex and important flow line balancing problem and a number of techniques and procedures have been developed in the effort of finding optimal solution to the above problems. 5-~ Line balancing computer programs have also been written to ease tedious manual calculation) These techniques attack the problem of minimizing product throughput time and improve line efficiency with different approaches, but their c o m m o n prerequisite for applicability is the loose restriction on operation precedence and work zoning (grouping). This is because these techniques are developed mainly to handle network type assembly line balancing problems, in which the order of performing considerable amounts of work is not important to the subsequent work. For production flow lines with strictly designed operation sequence, Hira and Pandey, s cite a number of researchers who have developed analytical models to solve the flow line balancing problem and obtain closed form expressions for parameters such as production rate. However, due to the a m o u n t of computational work involved, these results could only be applied to relatively short flow lines with from two to six stages a n d / o r operations. There are also models to approximate the production rate of a line consisting of any number of similar or identical work stations with a wide range of process times (see Knott 9 and MuthZ°). The analysis approach we develop in this paper allows complex flow lines, dissimilar work stations, variable process times, and batch work. PCB Fabrication. The PCB fabrication is a very complex production involving mechanical techniques, chemical and photographic processes. There are as many as 50 single processes along the line. The requirement on operation precedence is very strict and, therefore, very inflexible in arranging process equipment and work locations. For instance, the order from etch, strip, lay-up, lamination to drill has to be followed. Very few alternative routings exist along the line. In PCB fabrication, there is considerable variability in process times due to the complex chemical and photomechanical processes and other factors such as complexity of circuits, etc. In addition to the complexity in fabrica-
48
Journal of Manufacturing Systems Volume 6/No. I
d o m behavior, I* including variability in process times. For the flow line problem, Hillier and Roling, ~7 and Hira and Pandey s have developed multistage models with simulation and derived empirical equations from the simulation results to quantitatively describe the production rate and line efficiency as a function of the number of work stations and process times. Their results are applicable to single route flow lines where there is no batch work or complex flow patterns including multiple sublines joining together as an assembly process. In this paper, we extend the previous models to a complex flow line and focus on o p t i m u m selection of batch sizes. There is a practical benefit to utilizing simulation in the analysis of industrial projects, namely, that the use of simulation can eliminate risk. ts An advantage of simulation is the ability to evaluate a proposed system in design without building it, or test a system's behavior without disturbing or destroying it." Therefore, simulation is an extremely valuable tool to resolve the PCB fabrication production planning problem.
Modeling of the System In this paper, we use the computer simulation language S L A M II to model and test a real world PCB fabrication facility to discover and optimize its flow line behavior. The system's physical structure and associated data have been provided by TNT.It The generalized process flow diagram of the PCB fabrication line in Figure 1 shows that there is one mainline (bare board) and three sublines (prepreg, plate and copper foil). All four lines are joined (assembled) together for lamination and drill. This assembly point is the key area in the line. Boards, after being laid-up, have to be accumulated into batches for lamination, and batched again for the drilling operation. Figure 2 shows this area in more detail. In Figure 2, N~ and N~ are the numbers of boards accumulated for batch work of lamination and drilling, respectively. The lamination press usually has five openings with each holding from 4 to 18 boards. Single-opening presses are also used by some manufacturers with the intention of reducing
.ece,vin,< Process: 1. Plate Preparation 2. Prefabrication 3. Prepreg Punch 4. Cu Foil Punch 5. Inner Layer
rl 6. Lamination 7, Drill 8. Electroless 9. Image 10. Electroplating
Figure 1 PCB Fabrication Process Flow
49
1 1. Screening 12. Gold Plate 13. Final Fabrication * R w k --- Rework * * S c p --- Scrap
Journal oJ ManuJm'turing Systems
Volume6~No. I
Plate ~ Bare Prepreg~
N1 ~ ~ "~ O-".O-"O--"O . .'0 Strip ~ Lay-up Batch Lamination Unbatch
/ No
Batch= 0 Drill~ 0
UnbatchO
Figure 2 Bottleneck Area Lamination and Drill Batch
equipment investment and operating cost. Thus, the range of N~ is: 4 < = N, < = 18
for single-opening press
20 < = N~ < = 90
for five-opening press.
X-ray-'-0
~- ---
Work
between the selection of N, and product throughput time for different types of boards and exploring the o p t i m u m arrangement of N, to minimize throughput time. The entire PCB fabrication line for a typical four layer product is modeled as a basis for the study and the S L A M II simulation network of this key area is shown in Figure 3. In the analysis to follow, it is assumed that other portions of the line are already balanced and there is a sufficient number of key machines in lamination and drill. The board waiting is only for being accumulated to a specified number for batch work.
and On most of the PCB lines, four-head drills are used. Depending upon the PCB circuitry complexity and board size, one to four boards can be put under each drill head. Thus, Na= 4, 8, 12, 16. It also has been realized that for a certain type of PCB, which means for a certain N~, the selection of N, significantly impacts the product throughput time and production rate. Thus, management is always challenged by this selection when estimating the production capacity in production planning. Another production oriented problem facing management is when PCB product changes, how the product throughput time is going to change correspondingly. This is the sensitivity problem of the system outputs over the inputs. To resolve these problems, we have focused on this bottleneck area with a major research effort aimed at finding the quantitative relationship
Simulation Runs We know the product throughput time can be written as:
T : f ( K b, N,, Na)
(1)
where Ko is the PCB type which determines the process times in etch/strip, bake and drill operations and N~ and N~ are the same as before. The shape of f will be defined through simulation experimentation. In determining the optimum conditions of a system's output in simulation, Law and Kelton z°
50
Journal of Manufacturing Systems
Volume6/No. 1
Plate~
~
\
__0.03Rework~ / ~ ;~Bake ~ ~
Baraed---~ E t c h /
\\ /~X'-~Lpy~~'~
Prepreg~l~~~~~~'~~/// CuFoi~l
~
All(2) I
All(2)
nation
1) Figure 3
SLAMI1Networkof the BottleneckArea size must be established by running a sufficient number of boards through the system. With this sufficient number, we still cannot use the obtained mean value for data analysis and draw our conclusions because of the randomness involved in a single simulation run. In order to obtain reliable results and characterize the system behavior, simulation run replications with different random number seeds must be made. Hence, we can establish a confidence interval on the results obtained. Consider the following notations:
and S h a n n o n z~ suggest the r e s p o n s e - s u r f a c e methodology (RSM) be used when there are two or more factors or input variables. The concept is to make simulation runs on all significant combinations of the factors and by looking at the responding outputs, often plotted as response contours, to find the optimum input factor condition for the system. We have employed this idea and made many simulation runs by changing N, and process times determined by board types to study the problem. Through conferences with T N T y five types of typical boards, from type 1 to type 5, ranging from the simplest to the most complex, have been identified and the associated process times in etch/strip, bake and drill have been estimated. A goodness-of-fit procedure using the Kolmogorov-Smirnov test was performed on some sample data also provided by TNT. These process times are well fitted as triangular distributions. The results are presented in Table 1. Due to the process time variability and the batch/unbatch works, the product throughput time of an individual board is distributed in a relatively large range. In order to estimate the product throughput time by the mean value from the throughput times of all boards, a reasonable sample
n ti t, S,~ gl
Number of boards in one single run. Throughput time on the i'* board. Mean value of ti in one single run. Standard deviation oft i in one single run. Half-length of desired range for t, in a single run. N Number of replications. T Mean value of t, in N runs. S,, Standard deviation of t,. g, Half-length of desired range for T in N runs. ta~p~=/~,v., Critical value at 1 - alpha confidence level for N-1 degree of freedom.
51
Journal of ManuJacturing Systems VoLume 6 / N o . I
Table 1 Process Times in the Bottleneck Area
Process Board Type 1 2 3 4 5
Etch/Strip
Bake
Drill
(2.0,3.0,5.0) (4.0,6.0,9.0) (6.0,9.0,13.0) (9.0,12.0,18.0) (12.0,16.0,24.0)
(3.0,6.0,8.0) (6.0,11.0,15.0) (9.0,17.0,24.0) (14.0,24.0,30.0) (21.0,32.0,38.0)
(4.0,6.0,12.0) (5.0,8.0,16.0) (7.0,10.0,21.0) (9.0,13.0,26.0) (11.0,16.0,31.0)
* Unit = Minute ** Triangular distribution in (min, mode, max.)
The required n and N can be calculated by using Pritsker's formula: ~s
N
= (t,tpha/1,N. I S,/g)2
Simulation Results Analyses Simulation Results. The simulation results for the five-opening lamination press and for the singleopening press for a typically complex four layer P C B with Na = 12 are presented in Tables 2 and 3. It should be pointed out that the simulation runs for N~ - 24, 36, 48, 72 and 84 were made after finding that the throughput time Treduces drastically when Nj = N a = 12 and with the intention of examining any similar behavior of T w h e n N~ 's are multiples ofNa. Figures 4 and 5 depict the simulation results T. Response contours for each case are plotted with throughput time on board type vs. the c o m m o n abssisa N~. The plots of T vs. N~ clearly show that the general tendency of T on Nt is linearly increasing. At every N~ being a multiple of N~, irregular decrease of throughput time exists. Simulation runs
(2)
First we make a sample run with n boards and calculate t, and S,i for all ti's. Then use alpha - 0.1 for a 90% confidence level and find t,lph,/z.,.~ = 1.96 and desired gi - 12 (minutes). Use Eq. (2) to obtain n and if n is less than the left side of Eq. (2), repeat this process with increased n until it is greater than or equal to the left-hand side. The calculation of N is the same by making a couple of trial runs and substituting Sx with S,, and g with g,. The results for our system are: n = 300
giving 90% confidence of all t,.'s being within the range of plus/ minus 12 minutes of t,.
N = 20
giving 90% confidence of all t,'s being within the range of plus/ minus 8 minutes of T.
and Table 2 Throughput Time (5-opening lamination press)
Board Type
By running 300 boards in each run and making 20 replications, the Tvalue we have under one specified condition can be interpreted as: all realistic throughput time values are within plus/minus (12 + 8) " 20 minutes of the simulation result T with a confidence level,
1
2
3
4
5
527 512 572 575 628 645 681 712 812 786 854 860 906
540 527 579 592 639 655 690 724 824 792 874 863 918
548 536 595 598 653 669 706 740 830 810 883 877 936
563 547 607 614 656 680 717 754 849 827 893 894 953
582 567 622 631 684 698 732 768 866 841 914 910 962
N I
20 (24) 30 (36) 40 (48) 50 (60) 70 (72) 80 (84) 90
1 -(0.I) (0.1) = 0.99 " 99%. All simulation runs are made on an IBM mainframe c o m p u t e r at the Center for A u t o m a t e d Engineering and Robotics at Arizona State University. The total number of simulation mcdel runs required for one study is, (5 board types) (21 N, values) (20 replications) - 2,100.
* Unit = Minute. ** ( ) indicates multiples of N d, N d = 12
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Journal~Man~acturing Systems Volume6/No.I
Table 3
Throughput Time (single-opening lamination press)
Board Type
Board Type
1
2
3
4
5
461 459 471 491 457 508 509 510
472 470 483 505 472 516 522 525
480 479 496 515 481 530 535 535
496 493 506 526 497 542 547 548
514 512 525 547 511 558 562 564
5
14
N I
4 6 8 10 12 14 16 18 * Unit = Minute
made for Na = 4, 8 and 16and the results showed the same pattern. In order to utilize the simulation results to find the general characteristic of our system and provide a planning tool for the PCB production management in dealing with product changes and batch size selection, the simulation results analyses are made in two aspects. The between type analysis explores the relationship of throughput times and board type changes, and the within type analysis studies the effect of changing N~ on throughput time T. B e t w e e n T y p e Analysis. The differences of the sum of most likely (mode) values of etch/strip, bake and drill process times between two adjacent board types la(i.i.t~,j = 1,2, 3, 4, are calculated from the data in Table 1:
N d = 12
= 20
:
: 30
24
: 40 " :"50 36 48
' 60
:: : = "="N,90 70 80 72 84
(a)
Board Type 95O
5
4
Between types j,j÷l
ta
I ,2
2,3
3,4
4,5
11
11
13
15 3
F r o m the simulation results, the mean values of throughput time differences T~i~.,, j = 1, 2, 3, 4, and their standard deviation are also calculated for all 21 N t conditions used as the following: Between types j,j÷l
Ta S.D.
1,2
2,3
3,4
4,5
11.7 3.3
12.2 3.7
13.8 3.0
16.4 2.8
2
1
,
, 00, 650 700 750 800 8?0 900
2030405060708090 (b)
A linear regression analysis is made and the calculated correlation coefficient between T~ and t~ is,
Figure 4 Response Contour of Throughput Time for Five-opening Lamination Press
r = 0.993
53
N,
Journal oJ Manufi~cturing Systems V o l u m e 6,, No. I
and the coefficient of determination is,
Board Type
r 2 " 0.986.
1=,
This indicates a strong linear relationship between the two system parameters T~ and t~. The least square regression line is calculated as, T~ = -0.163 + 1.095 td.
(3)
W i t h i n T y p e Analysis. F r o m Figures 4(a) and 5(a), the general linear tendency between T a n d N,
can be clearly seen. F r o m the simulation results, we can derive an empirical equation to approximate this near linear relationship. Consider that line, T~ + S ( N t - iV,)
I
I
!
I
4
6
8
10
t 12
t 14
t 16
as the envelope of the throughput time response contours, which describe the general increasing tendency of T. By multiplying a nonlinear corrector K to characterize the irregularities occurring at N, = M*Nd. M = 1, 2, 3 .... the following equation emerges:
: ~N 1
18
T " K [ T , + S(N, - N,)]
(a)
•
520 530 540
510
(5)
where T, is the t h r o u g h p u t time at a referencing starting point, which is used as the basis to estimate T a t other Nj 's; and S is a calculated constant serving as the general slope of T o n N, for all five types of boards. It can be seen from Figures 4(a) and 5(a) that the closer N I is to the multiples of Na, the farther T goes below the envelope line. The envelope line is tangent to the simulation results curve at all the midpoints between multiples of N~. If we pick T values from two such points, say N~ = 30 (midpoint of 24 and 36) and 90 (midpoint of 84 and 96) and calculate the slope between the two points, we can obtain the S / v a l u e s , j = 1, 2, 3, 4, 5 for all five types of board. Since these values are very close, we can use the mean,
Board Type )
(4)
3,
2,
S - 5.66 1'
460
as a general slope for all five types of boards. Based on the same midpoint tangency property, a nonlinear corrector is considered to be a parabolic equation with its m a x i m u m value occurring at all midpoints where K= 1 with no correction. We next use the distance ratio,
4901 p 6 0 480 470
I
I
I
I
I
I
;
4
6
8
10
12
14
16
18
(b) Figure 5 Response Contour of Throughput Time for Single-opening Lamination Press
R a = m i n {N~(mod N d, N a - N t
(mod N.)}/ N.
54
(6)
Journal of Manufacturing Systems Volume 6 / N o . 1
which is the distance of NI to the closest adjacent multiple of N~, over N~. It ranges from 0 to 0.5. Since the m a x i m u m value of K occurs at R~ = 0.5, we have the parabolic equation that is graphically shown in Figure 6: a (K-1) = (R a -0.5) 2
K 1
(7)
/('~
where a is a constant. K equals to its smallest value, Kmi,, when R~ = 0. To find Kml. and then calculate the constant a to obtain the corrector K equation, we need to use our simulation results and examine the m a x i m u m a m o u n t of Tat multiples o f N a caused by this nonlinear corrector. We use the slope S developed earlier and calculate the following ratio, T a t N I = (M) (N~) from simulation results T if without nonlinear irregularity
(8)
0
M = 1, 2, 3, 4.
Figure 6 The Nonlinear Corrector K
When the numerator is read from the simulation results for N I is equal to (M) (N~), the denominator can be calculated as, T. = S [N, - (M) (Na)]
work station) or multiple batch sizes in between the two key machines and this will minimize boards waiting time. Verification of this empirical Eq. (5) on the simulation results shows that calculated Tvalues by the equation are within 5% of those from the simulation. P o t e n t i a l Applications. Depending on PCB type, with chosen N,, Nd, N, and calculated T~, the product throughput time can be estimated from the derived empirical equation. The procedure for the PCB manufacturing management to estimate T without actually making simulation runs is as follows:
(9)
where T is the Tvalue at a starting reference point, which is preferred to be a midpoint. When the ratio in Eq. (8) for all five types of boards are found, their mean is taken as the simplified K,.i. for all five board types, yielding, K,~,~ = 0.95. In Eq. (7), if we substitute,
R =0 and K = K,.i. = 0.95,
Step l: Estimate the sum of the most likely (mode) process times of etch/strip, bake and drill for the PCB in interest. Step 2: Based on the process times used in the base model in this paper, find the difference t~ between the new PCB and an appropriate type in the model. Step 3: Use the linear regression line Eq. (3) to find the corresponding increment of throughput time T~. Step 4: Add this increment to the throughput time of the PCB type used in step 2. The result is T~ in the empirical equation for estimating T. Step 5: Choose Aft, use the general empirical
then the constant a can be calculated, a = -5. Rearrange Eq. (7) and substitute the above values in the nonlinear corrector in Eq. (5) gives, K= I-(R~-0.5)2/5
0.5
(10)
By putting this nonlinear corrector into Eq. (5), the equation is completely derived. The empirical equation characterizes our system's behavior on batch sizing for the key machines. The physical interpretation for the characteristic is that the equal and multiple batching sizes will leave either no residual boards (less than the batch size for the next
55
Journal oJ"Manufacturing Systems Volume 6/No. I
Eq. (5) and calculate the estimated throughput time T. Step 6: If it is to obtain optimum condition N t for minimizing T under certain physical or process limitations, repeat step 5 for various Nt until a satisfactory solution is found. In doing this, key machines in use or proposed to be used and associated investment and operating cost should be taken into account to make the system economicallyjustifiable. Step 7: Other system parameters, such as the total time to finish an order, can be calculated from the results of steps 5 and 6 by adding the average throughput time to the product of raw material input feed rate times the number of boards of the order. An example is presented to illustrate the above procedure:
Concluding Remarks The simulation results show that on a complex PCB fabrication flow line, m i n i m u m product throughput time can be achieved by choosing the number of boards to be accumulated in a batch work lamination station as multiples of the accumulated board number in the subsequent batch work drill station. Simple empirical equations derived from between type and within type analyses on the simulation results can be used by the PCB manufacturing management in production planning to estimate product throughput time of PCB in interest. The 5% relative error of the empirical equation provides reasonable accuracy. Not limited to the results of this important base model, the simulation runs can be expanded by using the same approach to cover all identified basic PCB types. Any incoming PCB order will be estimated in real time by such a system requiring no human intervention. Our results are going to be used to establish a computerized knowledge base as a PCB production planning system which can be easily implemented on a personal computer.
Step 1: The most likely process time of a new four layer PCB for the bottleneck area is estimated by a trial as about 19 minutes, which is between board type 1 and type 2. Step 2: The time difference between the new PCB and type 1 PCB ta
= 19 -15 = 4 minutes.
Step 3: Use Eq. (3) and find that the increment in throughput time is
References 1. G.T. Mackulak, D.D. Bedworth. "Modeling Method For Automation Evaluation", Proceedings of the Technical Programs, National
T, = -0.163 + (1.095) (4) "- 4.2 minutes.
Electronic Packaging and Production Conference, NEPCON EAST,
Step 4: Add T a to the base time of type 1 board at N, = 20 (for Na = 12)
Boston, Massachusetts, ,iune 19-21, 1985, p. 83. 2. ,i. M. McCarron. "Setting Up an Electronics Manufacturing Plant", Electronic Packaging and Production, March 1985, p. 132. 3. D.D. Bedworth, .I.E. Bailey. Integrated Production Systems, ,iohn Wiley & Sons, New York, 1982. 4. R. Wild. Mass-Production Management, The Design and Operation of Production Flow-Line System, J o h n Wiley & Sons, London, 1972. 5. D.D. Bedworth. Industrial Systems: Planning. Analysis, Control, John Wiley & Sons, New York, 1973. 6. M.D. Helgeson, D.P. Birnie. "Assembly Line Balancing Using the Ranked Positional Weight Technique", The Journal of Industrial Engineering, Volume 12, No. 6, 1961. 7. E.M. Mansoor. "Assembly Line Balancing- An Improvement on the Ranked Positional Weight Technique", The Journal of Industrial Engineering, Volume 15, No. 2, 1964. 8. D.S. Hira, P.C. Pandey. "A Computer Simulation Study of Manual Flow Lines", Journal of Manufacturing Systems, Volume 2, No. 2, 1983, p. 117. 9. A.D. Knott. "The Inefficiency of a Series of Work Stations--A Simple Formula", International Journal of Production Research, Volume 8, No. 2, 1970, D. 109. 10. E.J. Muth. "The Production Rate of a Series of Work Stations with Variable Service Times", InternationalJournalofProduction Research, Volume 1 I, No. 2, 1973, p. 155. 11. V. Allies, ,I.M. MacCarron. Personal Communication, Training 'n' Technology, Tempe, Arizona, 1986. 12. M. Brody. "Computerization for the PC Fabricator", Printed Circuit Fabrication, Volume 6, No. 3, 1984, p. 85. 13. M.,I. Dave, "Computerized Information Management for Printed Circuit Board Production", Circuit World, Volume 10, No. 3, 1984, p. 15.
T new board NI = 20 = 527 + 4.2 -- 531.2 minutes. Steps 5 and 6: Calculate T f o r a few N t 's:
N,
T (minutes)
24 30 36 40
526.1 573.2 564.5 590.6
Step 7: If N~ = 24 is chosen for an order of 500 boards with input feed rate of 5.8 minutes (which is the value used in our model), the total time expected to finish the order is estimated as, (5.8) (500) + 526 = 3426 minutes = 57 hours 6 minutes.
56
Journal of Manufacturing Systems Volume 6/No. I
14. N.E. Glenny, G.T. Mackulak. "Modeling and Simulation Provide Key to CIM Implementation Philosophy", Industrial Engineering, May 1985, p. 76. 15. K. Tumay. "Evaluation of PCB Assembly Through Simulation',
lg. M.W. Hichens. "'Simulation: The Key to Automation Without Risk", CAD~CAM Technology, Fall, 1984. 19. A.A.B. Pritsker. Introduction to Simulation and SLAM II, John Wiley & Sons, New York and Systems Publishing Corporation, West Lafayette, Indiana, 1984. 20. A.M. Law, W.D. Kelton. Simulation Modeling and Analysis, McGraw-Hill, New York, 1982. 21. R.E. Shannon,. Systems Simulation, Prentice-Hall, Inc., Englewood Cliffs, New Jersey, 1975.
Proceedings of the Technical Programs, National Electronics Packaging and Production Conference. NEPCON EAST, Boston, Massachusetts, June 19-21, 1985, p. 337. 16. K.J. Musselman. "Computer Simulation: A Design Tool for FMS", Manufacturing Engineering, September 1984, p. 117. 17. F.S. Hillier, R.W. Roling. "Finite Queues in Series with Exponential or Erlang Service Times--A Numerical Approach", Operation Research, Volume 14, 1967, p. 286.
Author(s) Biography Li Lin received his B.S. degree in Mechanical Engineering in 1982 from the Beijing Institute of Printing Technology, Beijing, China. Since 1983, he has studied at Arizona State University, Tempe, Arizona where he earned a M. Tech. degree in 1984, and is currently a doctoral student in the Department of Industrial and Management Systems Engineering. Mr. Lin's research interests include modeling and simulation of manufacturing systems, group technology and computer aided process planning. Jeffery K. Cochran is an Assistant Professor of Industrial and Management Systems Engineering at Arizona State University. He received his Ph.D. in Operations Research from Purdue University in 1984. In addition to his position as an Assistant Professor, he is also joint director of the Simulation and Computer Integrated Manufacturing Laboratory in the Center for Automated Engineering and Robotics. Through this laboratory, he is pursuing research interests in artificial intelligence, statistical inference, computer graphics, and decision processes, all in the SimCIM context. Dr. Cochran's industrial experience includes work at Battelle Northwest Laboratory, Los Alamos Scientific Laboratory, and NASA's Laboratory for Application of Remote Sensing. Dr. Cochran has authored more than 20 publications. He is a member of liE, ORSA, ASEE, SIAM, and SCS, and is a Registered Professional Engineer.
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