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Quantum simulation of a junctionless carbon nanotube field-effect transistor with binary metal alloy gate electrode
Superlattices and Microstructures 128 (2019) 252–259
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Superlattices and Microstructures journal homepage: www.elsevier.com/locate/superlattices
Quantum simulation of a junctionless carbon nanotube field-effect transistor with binary metal alloy gate electrode
T
Khalil Tamersit Department of Electronics and Telecommunications, University 8 May 1945 - Guelma, Guelma, 24000, Algeria
A R T IC LE I N F O
ABS TRA CT
Keywords: Carbon nanotube field-effect transistor (CNTFET) Non-equilibrium Green's function (NEGF) Gate work function engineering Binary metal alloy Junctionless Switching
In this paper, a quantum simulation study that highlights the role of linearly graded binary metal alloy (LGBMA) gate in improving the performance of coaxially gated junctionless carbon nanotube field-effect transistor (JL CNTFET) is presented. The computational approach is based on solving the Schrödinger equation using the non-equilibrium Green's function (NEGF) formalism self-consistently coupled with the Poisson equation in the ballistic limit. The proposed device is called junctionless work function engineered gate carbon nanotube field-effect transistor (JL WFEG CNTFET). The simulation results reveal that the proposed design improves the ambipolar property, tunneling leakage current, and subthreshold swing in comparison to the conventional structure. It has also been found that the proposed JL WFEG CNTFET exhibits an improved switching behavior than that of the conventional JL CNTFET, where an enhancement in terms of on-state to off-state current ratio, intrinsic delay, and power-delay product has been recorded. The obtained results make the JL CNTFET with coaxial LGBMA gate as a promising candidate for futuristic ultra-scaled, high-speed, and low-power applications.
1. Introduction The involvement of emerging nanomaterials in modern nanoelectronics has been more than essential to overcome the limitations encountered by silicon-based nanodevices, in particular the issue of the transistor miniaturization limits [1]. The semiconducting armchair-edge graphene nanoribbon (A-GNR) and zigzag carbon nanotube (Z-CNT) are promising nanomaterials to keep pace with continual shrinking of transistors [1,2], due to their beneficial characteristics such as the atomistic scale, high sensitivity to the electrostatic environment, high mobility, symmetric bands, tunable direct bandgap, and near-ballistic transport property [1–4]. Moreover, the advancements in fabrication processes of transistors based on these carbon-based nanomaterials boost increasingly their development, note that CNT and GNR field-effect transistors with sub-10 nm gate lengths have been successively fabricated, where unprecedented performances have been recorded [5,6]. In particular, the carbon nanotube field-effect transistors (CNTFETs) endowed with coaxial gate have been widely investigated in literature due to their promising performances especially in terms of scalability and gate controllability [7,8]. In fact, most research works have been focused on two main types of coaxial gate CNTFETs: Schottky barrier CNTFETs (SB-CNTFETs) and MOSFET like CNTFETs (MOS-CNTFETs) [9,10]. The second type, which is endowed with ohmic contacts with source and drain metal electrodes by means of an appropriate doping near the source and drain contact [10], has exhibited high-performance than that of SB-CNTFETs particularly in terms of ambipolar behavior and on-state to off-state current ratio (ION/IOFF) [7–10]. For this reason, huge simulation works on MOS-CNTFETs have been reported aiming multi-objective optimizations of MOS-CNTFETs at nanoscale domain while paving the way to the experiment and industry [11].
E-mail addresses: [email protected], [email protected]. https://doi.org/10.1016/j.spmi.2019.02.001 Received 4 December 2018; Received in revised form 10 January 2019; Accepted 2 February 2019 Available online 04 February 2019 0749-6036/ © 2019 Elsevier Ltd. All rights reserved.
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The non-equilibrium Green's function (NEGF) approach, which is the most used quantum simulation to accurately investigate the emerging nanotransistors [12], has also been widely employed to propose new designs and structures to boost the MOS-CNTFET's performances [11]. A number of these proposed designs includes the application of doping engineering on CNT channel such as single and double halo [13,14], stepwise doping CNT channel [15], linearly doped CNT [16], graded double halo [17], lightly doped source/drain [18,19], and linearly doped drain/source [18,20]. However, with the continual miniaturization of FETs, the doping engineering (including the doping of source and drain reservoirs in inversion mode FETs) at nanoscale with ultra-sharp doping changes is remained an unavoidable challenge that makes difficult the embodiment of these approaches [21]. With the emergence of junctionless (JL) transistors [22], which own uniformly doped source, channel, and drain, the constraint of the abrupt source and drain junction at nanoscale domain can be avoided leading to a significant decrease in limitations especially in terms of the cost and complexity of manufacturing [22–25]. Therefore, the JL CNTFET can be considered as a promising candidate for futuristic highperformance and low-cost nanotransistors [21,26]. However, the electrical characteristics (excepting the on-current) of JL CNTFET have been found poor in comparison to a silicon nanowire JL FET [26]. In addition, the ambipolar behavior and high leakage current are two detrimental effects in JL CNTFETs [21]. In this context, it has been revealed that the application of a specific uniaxial strain, which alters the CNT bandgap, can be considered as an effective approach to improve the electrical characteristics of the JL CNTFETs [21]. However, the precise use of strain engineering at nanoscale domain is not an easy routine process, and tradeoffs between various performance metrics can be imposed [27]. Therefore, new structures, designs, and approaches should be proposed in order to improve the characteristics of these promising transistors while keeping the junctionless aspect. In this paper, we propose a new nanodevice, called a junctionless work function engineered gate CNTFET (JL WFEG CNTFET) through a rigorous quantum simulation. The computational method is based on solving the Schrödinger equation via the mode space NEGF formalism coupled self-consistently with the Poisson equation in the ballistic limit [8–10]. The proposed transistor is endowed with linearly graded binary metal alloy (LGBMA) gate in order to alleviate the band to band tunneling (BTBT) effects, which adversely affect the CNTFET performance [21]. The possibility to fabricate a LGBMA-based gate is established through several reported methods [31], among other we cite a suggested technique for a continuous compositional spread thin film, which is mainly based on pulsed laser deposition. In comparison to the conventional JL CNTFET, the proposed design exhibits better switching behavior, where an improvement in terms of subthreshold swing, ION/IOFF ratio, intrinsic delay, and power-delay product (PDP), has been recorded. The obtained results make the proposed JL WFEG CNTFET as a promising candidate for high-speed and low-power electronics applications. The rest of this paper is organized as follows. In Section 2, we introduce the structure of the proposed JL WFEG CNTFET. In Section 3, we briefly describe the quantum simulation approach, which is based on self-consistent solutions of the Poisson equation (electrostatics) coupled with the non-equilibrium Green's function formalism in the ballistic limit. In Section 4, we discuss the numerical results while emphasizing the improvements attributed to the suggested design. Finally, we summarize the conclusions in Section 5.
2. Device structure Fig. 1 shows the lengthwise cut view of the proposed n-type JL WFEG CNTFET including the device's constituents and the geometrical parameters. The channel is a (16,0) Z-CNT, which corresponds to a radius of 0.63 nm and a bandgap (EG) of approximately 0.667 eV. The CNT throughout the device is uniformly n-type doped with a concentration (NCNT) of 2 nm−1. The whole Z-CNT is coaxially sandwiched by the hafnium oxide (HfO2) as the dielectric layer with a thickness (tOX) of 2 nm and a relative dielectric constant of εOX = 16. Unlike the conventional device that possesses an ordinary gate, the proposed device is endowed with coaxial linearly graded binary metal alloy (LGBMA) gate having a linearly graded work function. Note that the CNT length LS (LD) near the source (drain) is not covered by the coaxial gate that have a length LG. In fact, the linearly graded gate work function is inspired by extending the concept of multi-metal gate structures (e.g. dual-material and tri-material gate design) up to extremely dissimilar levels [28,29]. This concept can be concretized via a binary metal alloy (AγB1-γ) gate electrode, which is characterized by a continuous
Fig. 1. Lengthwise cut view of the proposed JL WFEG CNTFET with coaxial gate. 253
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concentration change from the left metal alloy side (100% A) to its right side (100% B) [29–31]. Note that many research efforts have been reported on the fabrication of such kind of metal alloys as well as on its use to multi-objective optimization of different FETs [29–41]. In this work, we attempt to alleviate the undesirable effects of band to band tunneling in JL CNTFET using the LGBMA-based coaxial gate (see Fig. 1) by adjusting the potential profile via the electrostatic gating. In this context, the LGBMA gate work function at the source side (ΦGA) is specified at the same value as the standard JL CNTFET, which is taken to be equal to ΦCNT, while the work function at the drain side (ΦGB) is taken to be less than ΦGA (ΦGA > ΦGB) with a difference of ΔΦG = 0.4 eV (ΔΦG = ΦGA-ΦGB). 3. Simulation approach The computational approach used in this work is based on solving the Schrödinger equation using the non-equilibrium Green's function formalism coupled self-consistently with the Poisson's equation. The ballistic transport is considered by neglecting the scattering self-energy (ΣSCAT = 0). The mode space (MS) representation is employed in order to avoid the computational burden [42,43], where only the relevant modes have been considered. The Hamiltonian (H) is based on the atomistic nearest neighbor pzorbital tight-binding approximation [8–10], and it can be expressed in the MS approach as follows [10].
⎡ U1 b2q ⎤ ⎢ b2q U2 t ⎥ 0 ⎢ ⎥ t U b 3 2q ⎥ H=⎢ ⎢ ⎥ ⋱ ⎢ 0 t UN − 1 b2q ⎥ ⎢ ⎥ ⎢ b2q UN ⎥ ⎣ ⎦N × N
(1)
where UN is the electrostatic potential at the Nth carbon ring, t ≈ 3 eV is the nearest neighbor hopping parameter, b2q = 2tcos(πq/n), and N is the number of carbon rings along the x-direction. After the establishment of the Hamiltonian matrix, the retarded Green's function can be computed as [12].
G (E ) = [(E + iη+) I − H − ΣS − ΣD]−1
(2)
where E, η , I, and ΣS(D) are the energy, infinitesimal positive value, identity matrix, and the source (drain) self-energy, respectively. The local density of states (LDOS) can be written as [12]. +
DS (D) = GΓS (D) G †
(3)
†
where G represents the Hermitean conjugate of G, and ΓS(D) is the energy level broadening, which is defined by the following relation [12].
ΓS (D) = i (ΣS (D) − ΣS†(D) )
(4)
Based on the described equations, the charge density in the CNT channel can be computed as [8–10].
Q (x ) = (−q)
+∞
∫−∞
dE ⋅ sgn[E − EN (x )] × {DS (E , x ) f (sgn[E − EN (x )](E − EFS )) + DD (E , x ) f (sgn[E − EN (x )](E − EFD ))} (5)
where sgn is the sign function and f(sgn[E−EN].(E−EFS(FD))) is the source (drain) Fermi function corresponding to the Fermi level EFS(FD). The charge neutrality level EN is at the midgap energy because the conduction and valence bands are symmetric in carbon nanotube. At this stage, in order to evaluate the device electrostatics, the computed charge density is inserted in the two-dimensional Poisson equation for the cylindrical FET geometry given by Refs. [8–10].
∇2 U (x , r ) = −
ρ (x , r ) ε
(6)
where ρ(r, x) is the net charge density distribution including the doping concentration, ε is the dielectric constant, and U is the electrostatic potential. All external boundaries are obeyed to the Neumann boundary condition [43], excepting the gate contacts that consider the Dirichlet boundary condition (DBC) using the following expression [41]. (7)
V = VG + ΦCNT − ΦGEFF
where VG is the gate voltage, ΦGEFF is the effective work function of the LGBMA gate electrode that varies linearly, and ΦCNT is CNT work function. Here, the LGBMA work function quantity decreases linearly (node by node) from ΦA to ΦB in transport direction (X), and hence the potential distribution on DBC nodes can be fixed using (7) and the following relation [30–35].
ΦGEFF = (x / LG ) ΦB + (1 − x / LG ) ΦA
(8)
Applying the boundary conditions, we obtain
ΦGEFF = ΦA (ΦB ) when
x = 0(LG )
(9)
The Poisson equation is normally solved using the finite difference method, and the obtained on-site electrostatic potential will update the NEGF solver until a convergence. After the achievement of self-consistency, the drain current can be computed using the 254
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Fig. 2. (a) The IDS-VGS transfer characteristics (in linear and logarithmic scale) of the proposed JL WFEG CNTFET and the conventional JL CNTFET. (b) The subthreshold swing versus ΔΦG for the two structures.
Landauer-Büttiker formula given by Refs. [8–10]. +∞
I=
4e dE T (E )[f (E − EFS ) − f (E − EFD )] ℏ −∞
∫
(10)
where e is the electron charge, h is Planck's constant, and T(E) is the transmission coefficient given by
T (E ) = Tr [ΓS GΓD G †]
(11)
where Tr is the trace operator. For a detailed description and a deeper view about the NEGF quantum simulation and its implementation, we refer to the classics in the field [12,44–46]. It is worth mentioning that the simulations are carried out at room temperature (T = 300 K). The simulation program is developed in MATLAB 7.2 and all computations are carried out on an Intel (R) core (TM) i7–3770 Processor (3.4 GHz) 8–GB–RAM computer operating under Windows 7. 4. Results and discussion Fig. 2(a) shows the transfer characteristics of the proposed and conventional JL CNTFETs after the alignment of their threshold voltages for a fair comparison. Note that after applying the gate work function engineering, a shift in threshold voltage of about 0.073 V has been recorded toward the negative direction. This behavior is attributed to the graded work function engineering that makes the potential barrier weakened in front of carrier transport. Inspecting the same figure, we can clearly see that the ambipolar behavior and the minimum leakage current of the proposed device are reduced in comparison to those of the conventional device, which alludes to an improvement in terms of ION/IOFF current ratio. Fig. 2(b) shows the behavior of subthreshold swing (SS) as a function of the difference in work function between the two extremities of LGBMA gate. It is worth noting that the subthreshold swing, which is defined as the necessitated variation in effective gate voltage that leads to an order-of-magnitude change in the subthreshold current [43], has been numerically drawn within the subthreshold domain as (ΔVGS/Δlog (IDS)). Inspecting the same figure, we can see that the increase in ΔΦG improves the swing factor, where the best value is recorded at ΔΦG = 0.4 eV. As one can see that the improvement in subthreshold swing decreases for ΔΦG > 0.4 eV. This behavior is probably attributed to the decrease in barrier width, which supports the source-to-drain direct tunneling components through channel potential barrier. In order to understand the obtained improvements, we plot Fig. 3 that shows the electron density per unit energy (dn/dE) in function of the longitudinal position for both structures, where the biasing conditions were intentionally chosen in subthreshold domain (at VDS = 0.5 V and VGS = −0.45 V). In both figures, the valence and conduction band edges are clearly seen by the solid white lines, note that the bandgap region can be identified with quite weak electron population between the bands. In addition, we can see that the electron population near the source (drain) is filled up to the source (drain) Fermi level, where the interference patterns are clearly observed. Fig. 3(a) shows that the conventional JL CNTFET exhibits a BTBT of carriers between the valance band of the channel (under gate) and the conduction band of the drain (the CNT part near the drain). This pronounced BTBT is the main origin of the ambipolar behavior and its detrimental effects. It is to note that the so-called hole-induced barrier lowering (HIBL) is the responsible effect for the degradation of subthreshold swing, especially when high drain-to-source voltage is applied [47]. We can see in Fig. 3(b) that the proposed device benefits from the linearly graded gate work function, which makes the BTBT distances wider (see 255
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Fig. 3. The carrier density versus the longitudinal position at different energy levels for (a) the conventional JL CNTFET and (b) the proposed JL WFEG CNTFET.
the surrounded regions in Fig. 3(b)) than those of the conventional device leading to a decrease in BTBT, and hence a decrease in ambipolar behavior, minimum leakage current, and subthreshold swing, as shown previously in Fig. 2. Fig. 4 shows the ION/IOFF ratio as a function of on-state current at VDS = 0.5 V for the proposed and conventional devices. Note
Fig. 4. ION/IOFF ratio versus ION for JL WFEG CNTFET and JL CNTFET at VDS = 0.5 V. 256
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Fig. 5. (a) the intrinsic delay and (b) the power-delay product, as a function of on-state current for the two considered designs.
that the curves have been drawn from IDS-VGS transfer characteristics by sweeping a window, which has as extremities VGS(ON) = VGS and VGS(OFF) = VGS-0.5 V corresponding to ION and IOFF, respectively. Note that at each sweeping step, one point of each curve is obtained. We can see that the proposed device provides a current ratio higher than that of the conventional device over a wide ION range (i.e. ION≤35 μA; see Fig. 2(a)). In addition, we can observe that the maximum reachable ratio of the JL WFEG CNTFET is greater than that of standard JL CNTFET by about one order of magnitude. In order to further study the On-Off behavior, we assess the intrinsic delay (τ) and power-delay product (PDP), which can be defined simply as the switching speed and the switching energy necessitated for an On-Off transition, respectively. These key switching parameters can be computed as [18,27].
τ = (QON − QOFF )/ ION
(12)
PDP = (QON − QOFF ) VDD
(13)
where QON(QOFF) is the total CNT charge in the On-state (Off-state) and VDD is the power-supply voltage. Note that QON and QOFF are similarly computed as ION and IOFF while considering a constant VDD-bias window (VDD = 0.5 V in our case). It is also worth indicating that the total charge is computed throughout the CNT channel from source contact to drain contact. Fig. 5 shows the intrinsic delay and the power-delay product as a function of ION at VDS = 0.5 V for the proposed and conventional devices. Note that these two figures have been plotted in the same way as Fig. 4 [18,27]. As shown in Fig. 5(a), our proposed device 257
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exhibits the shortest delay time over a wide ION range (ION≤35 μA). The same behavior is mapped in Fig. 5(b), where the JL WFEG CNTFET has the smallest energy consumption per switching event in comparison to the conventional JL CNTFET over approximately the same range. These improvements in switching behavior make the JL CNTFET with LGBMA gate as a promising candidate for future low-power and high-speed applications. 5. Conclusion In this paper, a new junctionless carbon nanotube field-effect transistor endowed with linearly graded binary metal alloy gate has been proposed, assessed, and compared with its conventional counterpart. The presented investigation is based on a rigorous quantum simulation that uses the self-consistent solutions of the couple MS NEGF-Poisson in the ballistic limit. The LGBMA-based gate, which provides a linearly graded work function, has been used in order to alleviate the band to band tunneling at drain side. It has been found that the electrostatic control of JL CNTFET using a LGBMA gate can improve the ambipolarity of the current transfer characteristic, tunneling leakage current, subthreshold swing, on-state to off-state current ratio, intrinsic delay, and power-delay product. The obtained results indicate that the LGBMA-based gate work function engineering can be considered as a potential alternative to the approaches that use the channel doping engineering and/or the gates constituted by the laterally amalgamation of multi-material to improve such nanoscale transistors. References [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35]
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Quantum simulation of a junctionless carbon nanotube field-effect transistor with binary metal alloy gate electrode
T
Khalil Tamersit Department of Electronics and Telecommunications, University 8 May 1945 - Guelma, Guelma, 24000, Algeria
A R T IC LE I N F O
ABS TRA CT
Keywords: Carbon nanotube field-effect transistor (CNTFET) Non-equilibrium Green's function (NEGF) Gate work function engineering Binary metal alloy Junctionless Switching
In this paper, a quantum simulation study that highlights the role of linearly graded binary metal alloy (LGBMA) gate in improving the performance of coaxially gated junctionless carbon nanotube field-effect transistor (JL CNTFET) is presented. The computational approach is based on solving the Schrödinger equation using the non-equilibrium Green's function (NEGF) formalism self-consistently coupled with the Poisson equation in the ballistic limit. The proposed device is called junctionless work function engineered gate carbon nanotube field-effect transistor (JL WFEG CNTFET). The simulation results reveal that the proposed design improves the ambipolar property, tunneling leakage current, and subthreshold swing in comparison to the conventional structure. It has also been found that the proposed JL WFEG CNTFET exhibits an improved switching behavior than that of the conventional JL CNTFET, where an enhancement in terms of on-state to off-state current ratio, intrinsic delay, and power-delay product has been recorded. The obtained results make the JL CNTFET with coaxial LGBMA gate as a promising candidate for futuristic ultra-scaled, high-speed, and low-power applications.
1. Introduction The involvement of emerging nanomaterials in modern nanoelectronics has been more than essential to overcome the limitations encountered by silicon-based nanodevices, in particular the issue of the transistor miniaturization limits [1]. The semiconducting armchair-edge graphene nanoribbon (A-GNR) and zigzag carbon nanotube (Z-CNT) are promising nanomaterials to keep pace with continual shrinking of transistors [1,2], due to their beneficial characteristics such as the atomistic scale, high sensitivity to the electrostatic environment, high mobility, symmetric bands, tunable direct bandgap, and near-ballistic transport property [1–4]. Moreover, the advancements in fabrication processes of transistors based on these carbon-based nanomaterials boost increasingly their development, note that CNT and GNR field-effect transistors with sub-10 nm gate lengths have been successively fabricated, where unprecedented performances have been recorded [5,6]. In particular, the carbon nanotube field-effect transistors (CNTFETs) endowed with coaxial gate have been widely investigated in literature due to their promising performances especially in terms of scalability and gate controllability [7,8]. In fact, most research works have been focused on two main types of coaxial gate CNTFETs: Schottky barrier CNTFETs (SB-CNTFETs) and MOSFET like CNTFETs (MOS-CNTFETs) [9,10]. The second type, which is endowed with ohmic contacts with source and drain metal electrodes by means of an appropriate doping near the source and drain contact [10], has exhibited high-performance than that of SB-CNTFETs particularly in terms of ambipolar behavior and on-state to off-state current ratio (ION/IOFF) [7–10]. For this reason, huge simulation works on MOS-CNTFETs have been reported aiming multi-objective optimizations of MOS-CNTFETs at nanoscale domain while paving the way to the experiment and industry [11].
E-mail addresses: [email protected], [email protected]. https://doi.org/10.1016/j.spmi.2019.02.001 Received 4 December 2018; Received in revised form 10 January 2019; Accepted 2 February 2019 Available online 04 February 2019 0749-6036/ © 2019 Elsevier Ltd. All rights reserved.
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The non-equilibrium Green's function (NEGF) approach, which is the most used quantum simulation to accurately investigate the emerging nanotransistors [12], has also been widely employed to propose new designs and structures to boost the MOS-CNTFET's performances [11]. A number of these proposed designs includes the application of doping engineering on CNT channel such as single and double halo [13,14], stepwise doping CNT channel [15], linearly doped CNT [16], graded double halo [17], lightly doped source/drain [18,19], and linearly doped drain/source [18,20]. However, with the continual miniaturization of FETs, the doping engineering (including the doping of source and drain reservoirs in inversion mode FETs) at nanoscale with ultra-sharp doping changes is remained an unavoidable challenge that makes difficult the embodiment of these approaches [21]. With the emergence of junctionless (JL) transistors [22], which own uniformly doped source, channel, and drain, the constraint of the abrupt source and drain junction at nanoscale domain can be avoided leading to a significant decrease in limitations especially in terms of the cost and complexity of manufacturing [22–25]. Therefore, the JL CNTFET can be considered as a promising candidate for futuristic highperformance and low-cost nanotransistors [21,26]. However, the electrical characteristics (excepting the on-current) of JL CNTFET have been found poor in comparison to a silicon nanowire JL FET [26]. In addition, the ambipolar behavior and high leakage current are two detrimental effects in JL CNTFETs [21]. In this context, it has been revealed that the application of a specific uniaxial strain, which alters the CNT bandgap, can be considered as an effective approach to improve the electrical characteristics of the JL CNTFETs [21]. However, the precise use of strain engineering at nanoscale domain is not an easy routine process, and tradeoffs between various performance metrics can be imposed [27]. Therefore, new structures, designs, and approaches should be proposed in order to improve the characteristics of these promising transistors while keeping the junctionless aspect. In this paper, we propose a new nanodevice, called a junctionless work function engineered gate CNTFET (JL WFEG CNTFET) through a rigorous quantum simulation. The computational method is based on solving the Schrödinger equation via the mode space NEGF formalism coupled self-consistently with the Poisson equation in the ballistic limit [8–10]. The proposed transistor is endowed with linearly graded binary metal alloy (LGBMA) gate in order to alleviate the band to band tunneling (BTBT) effects, which adversely affect the CNTFET performance [21]. The possibility to fabricate a LGBMA-based gate is established through several reported methods [31], among other we cite a suggested technique for a continuous compositional spread thin film, which is mainly based on pulsed laser deposition. In comparison to the conventional JL CNTFET, the proposed design exhibits better switching behavior, where an improvement in terms of subthreshold swing, ION/IOFF ratio, intrinsic delay, and power-delay product (PDP), has been recorded. The obtained results make the proposed JL WFEG CNTFET as a promising candidate for high-speed and low-power electronics applications. The rest of this paper is organized as follows. In Section 2, we introduce the structure of the proposed JL WFEG CNTFET. In Section 3, we briefly describe the quantum simulation approach, which is based on self-consistent solutions of the Poisson equation (electrostatics) coupled with the non-equilibrium Green's function formalism in the ballistic limit. In Section 4, we discuss the numerical results while emphasizing the improvements attributed to the suggested design. Finally, we summarize the conclusions in Section 5.
2. Device structure Fig. 1 shows the lengthwise cut view of the proposed n-type JL WFEG CNTFET including the device's constituents and the geometrical parameters. The channel is a (16,0) Z-CNT, which corresponds to a radius of 0.63 nm and a bandgap (EG) of approximately 0.667 eV. The CNT throughout the device is uniformly n-type doped with a concentration (NCNT) of 2 nm−1. The whole Z-CNT is coaxially sandwiched by the hafnium oxide (HfO2) as the dielectric layer with a thickness (tOX) of 2 nm and a relative dielectric constant of εOX = 16. Unlike the conventional device that possesses an ordinary gate, the proposed device is endowed with coaxial linearly graded binary metal alloy (LGBMA) gate having a linearly graded work function. Note that the CNT length LS (LD) near the source (drain) is not covered by the coaxial gate that have a length LG. In fact, the linearly graded gate work function is inspired by extending the concept of multi-metal gate structures (e.g. dual-material and tri-material gate design) up to extremely dissimilar levels [28,29]. This concept can be concretized via a binary metal alloy (AγB1-γ) gate electrode, which is characterized by a continuous
Fig. 1. Lengthwise cut view of the proposed JL WFEG CNTFET with coaxial gate. 253
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concentration change from the left metal alloy side (100% A) to its right side (100% B) [29–31]. Note that many research efforts have been reported on the fabrication of such kind of metal alloys as well as on its use to multi-objective optimization of different FETs [29–41]. In this work, we attempt to alleviate the undesirable effects of band to band tunneling in JL CNTFET using the LGBMA-based coaxial gate (see Fig. 1) by adjusting the potential profile via the electrostatic gating. In this context, the LGBMA gate work function at the source side (ΦGA) is specified at the same value as the standard JL CNTFET, which is taken to be equal to ΦCNT, while the work function at the drain side (ΦGB) is taken to be less than ΦGA (ΦGA > ΦGB) with a difference of ΔΦG = 0.4 eV (ΔΦG = ΦGA-ΦGB). 3. Simulation approach The computational approach used in this work is based on solving the Schrödinger equation using the non-equilibrium Green's function formalism coupled self-consistently with the Poisson's equation. The ballistic transport is considered by neglecting the scattering self-energy (ΣSCAT = 0). The mode space (MS) representation is employed in order to avoid the computational burden [42,43], where only the relevant modes have been considered. The Hamiltonian (H) is based on the atomistic nearest neighbor pzorbital tight-binding approximation [8–10], and it can be expressed in the MS approach as follows [10].
⎡ U1 b2q ⎤ ⎢ b2q U2 t ⎥ 0 ⎢ ⎥ t U b 3 2q ⎥ H=⎢ ⎢ ⎥ ⋱ ⎢ 0 t UN − 1 b2q ⎥ ⎢ ⎥ ⎢ b2q UN ⎥ ⎣ ⎦N × N
(1)
where UN is the electrostatic potential at the Nth carbon ring, t ≈ 3 eV is the nearest neighbor hopping parameter, b2q = 2tcos(πq/n), and N is the number of carbon rings along the x-direction. After the establishment of the Hamiltonian matrix, the retarded Green's function can be computed as [12].
G (E ) = [(E + iη+) I − H − ΣS − ΣD]−1
(2)
where E, η , I, and ΣS(D) are the energy, infinitesimal positive value, identity matrix, and the source (drain) self-energy, respectively. The local density of states (LDOS) can be written as [12]. +
DS (D) = GΓS (D) G †
(3)
†
where G represents the Hermitean conjugate of G, and ΓS(D) is the energy level broadening, which is defined by the following relation [12].
ΓS (D) = i (ΣS (D) − ΣS†(D) )
(4)
Based on the described equations, the charge density in the CNT channel can be computed as [8–10].
Q (x ) = (−q)
+∞
∫−∞
dE ⋅ sgn[E − EN (x )] × {DS (E , x ) f (sgn[E − EN (x )](E − EFS )) + DD (E , x ) f (sgn[E − EN (x )](E − EFD ))} (5)
where sgn is the sign function and f(sgn[E−EN].(E−EFS(FD))) is the source (drain) Fermi function corresponding to the Fermi level EFS(FD). The charge neutrality level EN is at the midgap energy because the conduction and valence bands are symmetric in carbon nanotube. At this stage, in order to evaluate the device electrostatics, the computed charge density is inserted in the two-dimensional Poisson equation for the cylindrical FET geometry given by Refs. [8–10].
∇2 U (x , r ) = −
ρ (x , r ) ε
(6)
where ρ(r, x) is the net charge density distribution including the doping concentration, ε is the dielectric constant, and U is the electrostatic potential. All external boundaries are obeyed to the Neumann boundary condition [43], excepting the gate contacts that consider the Dirichlet boundary condition (DBC) using the following expression [41]. (7)
V = VG + ΦCNT − ΦGEFF
where VG is the gate voltage, ΦGEFF is the effective work function of the LGBMA gate electrode that varies linearly, and ΦCNT is CNT work function. Here, the LGBMA work function quantity decreases linearly (node by node) from ΦA to ΦB in transport direction (X), and hence the potential distribution on DBC nodes can be fixed using (7) and the following relation [30–35].
ΦGEFF = (x / LG ) ΦB + (1 − x / LG ) ΦA
(8)
Applying the boundary conditions, we obtain
ΦGEFF = ΦA (ΦB ) when
x = 0(LG )
(9)
The Poisson equation is normally solved using the finite difference method, and the obtained on-site electrostatic potential will update the NEGF solver until a convergence. After the achievement of self-consistency, the drain current can be computed using the 254
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Fig. 2. (a) The IDS-VGS transfer characteristics (in linear and logarithmic scale) of the proposed JL WFEG CNTFET and the conventional JL CNTFET. (b) The subthreshold swing versus ΔΦG for the two structures.
Landauer-Büttiker formula given by Refs. [8–10]. +∞
I=
4e dE T (E )[f (E − EFS ) − f (E − EFD )] ℏ −∞
∫
(10)
where e is the electron charge, h is Planck's constant, and T(E) is the transmission coefficient given by
T (E ) = Tr [ΓS GΓD G †]
(11)
where Tr is the trace operator. For a detailed description and a deeper view about the NEGF quantum simulation and its implementation, we refer to the classics in the field [12,44–46]. It is worth mentioning that the simulations are carried out at room temperature (T = 300 K). The simulation program is developed in MATLAB 7.2 and all computations are carried out on an Intel (R) core (TM) i7–3770 Processor (3.4 GHz) 8–GB–RAM computer operating under Windows 7. 4. Results and discussion Fig. 2(a) shows the transfer characteristics of the proposed and conventional JL CNTFETs after the alignment of their threshold voltages for a fair comparison. Note that after applying the gate work function engineering, a shift in threshold voltage of about 0.073 V has been recorded toward the negative direction. This behavior is attributed to the graded work function engineering that makes the potential barrier weakened in front of carrier transport. Inspecting the same figure, we can clearly see that the ambipolar behavior and the minimum leakage current of the proposed device are reduced in comparison to those of the conventional device, which alludes to an improvement in terms of ION/IOFF current ratio. Fig. 2(b) shows the behavior of subthreshold swing (SS) as a function of the difference in work function between the two extremities of LGBMA gate. It is worth noting that the subthreshold swing, which is defined as the necessitated variation in effective gate voltage that leads to an order-of-magnitude change in the subthreshold current [43], has been numerically drawn within the subthreshold domain as (ΔVGS/Δlog (IDS)). Inspecting the same figure, we can see that the increase in ΔΦG improves the swing factor, where the best value is recorded at ΔΦG = 0.4 eV. As one can see that the improvement in subthreshold swing decreases for ΔΦG > 0.4 eV. This behavior is probably attributed to the decrease in barrier width, which supports the source-to-drain direct tunneling components through channel potential barrier. In order to understand the obtained improvements, we plot Fig. 3 that shows the electron density per unit energy (dn/dE) in function of the longitudinal position for both structures, where the biasing conditions were intentionally chosen in subthreshold domain (at VDS = 0.5 V and VGS = −0.45 V). In both figures, the valence and conduction band edges are clearly seen by the solid white lines, note that the bandgap region can be identified with quite weak electron population between the bands. In addition, we can see that the electron population near the source (drain) is filled up to the source (drain) Fermi level, where the interference patterns are clearly observed. Fig. 3(a) shows that the conventional JL CNTFET exhibits a BTBT of carriers between the valance band of the channel (under gate) and the conduction band of the drain (the CNT part near the drain). This pronounced BTBT is the main origin of the ambipolar behavior and its detrimental effects. It is to note that the so-called hole-induced barrier lowering (HIBL) is the responsible effect for the degradation of subthreshold swing, especially when high drain-to-source voltage is applied [47]. We can see in Fig. 3(b) that the proposed device benefits from the linearly graded gate work function, which makes the BTBT distances wider (see 255
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Fig. 3. The carrier density versus the longitudinal position at different energy levels for (a) the conventional JL CNTFET and (b) the proposed JL WFEG CNTFET.
the surrounded regions in Fig. 3(b)) than those of the conventional device leading to a decrease in BTBT, and hence a decrease in ambipolar behavior, minimum leakage current, and subthreshold swing, as shown previously in Fig. 2. Fig. 4 shows the ION/IOFF ratio as a function of on-state current at VDS = 0.5 V for the proposed and conventional devices. Note
Fig. 4. ION/IOFF ratio versus ION for JL WFEG CNTFET and JL CNTFET at VDS = 0.5 V. 256
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Fig. 5. (a) the intrinsic delay and (b) the power-delay product, as a function of on-state current for the two considered designs.
that the curves have been drawn from IDS-VGS transfer characteristics by sweeping a window, which has as extremities VGS(ON) = VGS and VGS(OFF) = VGS-0.5 V corresponding to ION and IOFF, respectively. Note that at each sweeping step, one point of each curve is obtained. We can see that the proposed device provides a current ratio higher than that of the conventional device over a wide ION range (i.e. ION≤35 μA; see Fig. 2(a)). In addition, we can observe that the maximum reachable ratio of the JL WFEG CNTFET is greater than that of standard JL CNTFET by about one order of magnitude. In order to further study the On-Off behavior, we assess the intrinsic delay (τ) and power-delay product (PDP), which can be defined simply as the switching speed and the switching energy necessitated for an On-Off transition, respectively. These key switching parameters can be computed as [18,27].
τ = (QON − QOFF )/ ION
(12)
PDP = (QON − QOFF ) VDD
(13)
where QON(QOFF) is the total CNT charge in the On-state (Off-state) and VDD is the power-supply voltage. Note that QON and QOFF are similarly computed as ION and IOFF while considering a constant VDD-bias window (VDD = 0.5 V in our case). It is also worth indicating that the total charge is computed throughout the CNT channel from source contact to drain contact. Fig. 5 shows the intrinsic delay and the power-delay product as a function of ION at VDS = 0.5 V for the proposed and conventional devices. Note that these two figures have been plotted in the same way as Fig. 4 [18,27]. As shown in Fig. 5(a), our proposed device 257
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exhibits the shortest delay time over a wide ION range (ION≤35 μA). The same behavior is mapped in Fig. 5(b), where the JL WFEG CNTFET has the smallest energy consumption per switching event in comparison to the conventional JL CNTFET over approximately the same range. These improvements in switching behavior make the JL CNTFET with LGBMA gate as a promising candidate for future low-power and high-speed applications. 5. Conclusion In this paper, a new junctionless carbon nanotube field-effect transistor endowed with linearly graded binary metal alloy gate has been proposed, assessed, and compared with its conventional counterpart. The presented investigation is based on a rigorous quantum simulation that uses the self-consistent solutions of the couple MS NEGF-Poisson in the ballistic limit. The LGBMA-based gate, which provides a linearly graded work function, has been used in order to alleviate the band to band tunneling at drain side. It has been found that the electrostatic control of JL CNTFET using a LGBMA gate can improve the ambipolarity of the current transfer characteristic, tunneling leakage current, subthreshold swing, on-state to off-state current ratio, intrinsic delay, and power-delay product. The obtained results indicate that the LGBMA-based gate work function engineering can be considered as a potential alternative to the approaches that use the channel doping engineering and/or the gates constituted by the laterally amalgamation of multi-material to improve such nanoscale transistors. References [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35]
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